static int __devinit stm_sbc_rtc_probe(struct platform_device *pdev)
{
struct stm_sbc_rtc *rtc;
int ret = 0;
rtc = devm_kzalloc(&pdev->dev,
sizeof(struct stm_sbc_rtc), GFP_KERNEL);
if (unlikely(!rtc))
return -ENOMEM;
rtc_time_to_tm(get_time_in_sec(), &rtc->tm_cur);
device_set_wakeup_capable(&pdev->dev, 1);
platform_set_drvdata(pdev, rtc);
rtc->rtc_dev = rtc_device_register(DRV_NAME, &pdev->dev,
&stm_sbc_rtc_ops, THIS_MODULE);
if (IS_ERR(rtc->rtc_dev)) {
ret = PTR_ERR(rtc->rtc_dev);
goto err_badreg;
}
return ret;
err_badreg:
device_set_wakeup_capable(&pdev->dev, 0);
platform_set_drvdata(pdev, NULL);
return ret;
}
/* ==========================================================================*/
static void __init ambarella_init_filbert(void)
{
int i;
ambarella_init_machine("Filbert");
platform_add_devices(ambarella_devices, ARRAY_SIZE(ambarella_devices));
for (i = 0; i < ARRAY_SIZE(ambarella_devices); i++) {
device_set_wakeup_capable(&ambarella_devices[i]->dev, 1);
device_set_wakeup_enable(&ambarella_devices[i]->dev, 0);
}
/* Config Eth0*/
ambarella_eth0_platform_info.mii_reset.gpio_id = GPIO(124);
ambarella_eth0_platform_info.mii_reset.active_level = GPIO_LOW;
ambarella_eth0_platform_info.mii_reset.active_delay = 20;
/* Config Eth1*/
ambarella_eth1_platform_info.mii_reset.gpio_id = GPIO(125);
ambarella_eth1_platform_info.mii_reset.active_level = GPIO_LOW;
ambarella_eth1_platform_info.mii_reset.active_delay = 20;
/* Config SD*/
fio_default_owner = SELECT_FIO_SDIO;
ambarella_platform_sd_controller0.clk_limit = 48000000;
ambarella_platform_sd_controller0.slot[0].cd_delay = HZ;
ambarella_platform_sd_controller0.slot[0].use_bounce_buffer = 1;
ambarella_platform_sd_controller0.slot[0].max_blk_sz = SD_BLK_SZ_128KB;
ambarella_platform_sd_controller0.slot[1].cd_delay = HZ;
ambarella_platform_sd_controller0.slot[1].gpio_cd.irq_gpio = GPIO(75);
ambarella_platform_sd_controller0.slot[1].gpio_cd.irq_line = gpio_to_irq(75);
ambarella_platform_sd_controller0.slot[1].gpio_cd.irq_type = IRQ_TYPE_EDGE_BOTH;
ambarella_platform_sd_controller0.slot[1].gpio_wp.gpio_id = GPIO(76);
}
/**
* zynq_gpio_remove - Driver removal function
* @pdev: platform device instance
*
* Return: 0 always
*/
static int zynq_gpio_remove(struct platform_device *pdev)
{
struct zynq_gpio *gpio = platform_get_drvdata(pdev);
clk_disable_unprepare(gpio->clk);
device_set_wakeup_capable(&pdev->dev, 0);
return 0;
}
static int __devexit stm_sbc_rtc_remove(struct platform_device *pdev)
{
struct stm_sbc_rtc *rtc = platform_get_drvdata(pdev);
rtc_device_unregister(rtc->rtc_dev);
device_set_wakeup_capable(&pdev->dev, 0);
platform_set_drvdata(pdev, NULL);
return 0;
}
static int hym8563_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct hym8563 *hym8563;
int ret;
hym8563 = devm_kzalloc(&client->dev, sizeof(*hym8563), GFP_KERNEL);
if (!hym8563)
return -ENOMEM;
hym8563->client = client;
i2c_set_clientdata(client, hym8563);
device_set_wakeup_capable(&client->dev, true);
ret = hym8563_init_device(client);
if (ret) {
dev_err(&client->dev, "could not init device, %d\n", ret);
return ret;
}
ret = devm_request_threaded_irq(&client->dev, client->irq,
NULL, hym8563_irq,
IRQF_TRIGGER_LOW | IRQF_ONESHOT,
client->name, hym8563);
if (ret < 0) {
dev_err(&client->dev, "irq %d request failed, %d\n",
client->irq, ret);
return ret;
}
/* check state of calendar information */
ret = i2c_smbus_read_byte_data(client, HYM8563_SEC);
if (ret < 0)
return ret;
hym8563->valid = !(ret & HYM8563_SEC_VL);
dev_dbg(&client->dev, "rtc information is %s\n",
hym8563->valid ? "valid" : "invalid");
hym8563->rtc = devm_rtc_device_register(&client->dev, client->name,
&hym8563_rtc_ops, THIS_MODULE);
if (IS_ERR(hym8563->rtc))
return PTR_ERR(hym8563->rtc);
/* the hym8563 alarm only supports a minute accuracy */
hym8563->rtc->uie_unsupported = 1;
#ifdef CONFIG_COMMON_CLK
hym8563_clkout_register_clk(hym8563);
#endif
return 0;
}
void tegra_pd_add_device(struct device *dev)
{
struct generic_pm_domain *master = tegra_pd_get_domain(dev_name(dev));
if (!master)
return;
device_set_wakeup_capable(dev, 1);
pm_genpd_add_device(master, dev);
pm_genpd_dev_need_save(dev, false);
pm_genpd_add_callbacks(dev, &tegra_pd_ops, NULL);
}
int uart_add_one_port(struct uart_driver *drv, struct uart_port *uport)
{
struct uart_state *state;
struct tty_port *port;
int ret = 0;
struct device *tty_dev;
BUG_ON(in_interrupt());
if (uport->line >= drv->nr)
return -EINVAL;
state = drv->state + uport->line;
port = &state->port;
mutex_lock(&port_mutex);
mutex_lock(&port->mutex);
if (state->uart_port) {
ret = -EINVAL;
goto out;
}
state->uart_port = uport;
state->pm_state = -1;
uport->cons = drv->cons;
uport->state = state;
if (!(uart_console(uport) && (uport->cons->flags & CON_ENABLED))) {
spin_lock_init(&uport->lock);
lockdep_set_class(&uport->lock, &port_lock_key);
}
uart_configure_port(drv, state, uport);
tty_dev = tty_register_device(drv->tty_driver, uport->line, uport->dev);
if (likely(!IS_ERR(tty_dev))) {
device_set_wakeup_capable(tty_dev, 1);
} else {
printk(KERN_ERR "Cannot register tty device on line %d\n",
uport->line);
}
uport->flags &= ~UPF_DEAD;
out:
mutex_unlock(&port->mutex);
mutex_unlock(&port_mutex);
return ret;
}
static int ds1374_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct ds1374 *ds1374;
int ret;
ds1374 = kzalloc(sizeof(struct ds1374), GFP_KERNEL);
if (!ds1374)
return -ENOMEM;
ds1374->client = client;
i2c_set_clientdata(client, ds1374);
INIT_WORK(&ds1374->work, ds1374_work);
mutex_init(&ds1374->mutex);
ret = ds1374_check_rtc_status(client);
if (ret)
goto out_free;
if (client->irq > 0) {
ret = request_irq(client->irq, ds1374_irq, 0,
"ds1374", client);
if (ret) {
dev_err(&client->dev, "unable to request IRQ\n");
goto out_free;
}
device_set_wakeup_capable(&client->dev, 1);
}
ds1374->rtc = rtc_device_register(client->name, &client->dev,
&ds1374_rtc_ops, THIS_MODULE);
if (IS_ERR(ds1374->rtc)) {
ret = PTR_ERR(ds1374->rtc);
dev_err(&client->dev, "unable to register the class device\n");
goto out_irq;
}
return 0;
out_irq:
if (client->irq > 0)
free_irq(client->irq, client);
out_free:
i2c_set_clientdata(client, NULL);
kfree(ds1374);
return ret;
}
static ssize_t hsic_remoteWakeup_store(struct device *dev,
struct device_attribute *attr, const char *buf, size_t size)
{
int retval;
int org_req;
if (size > HSIC_ENABLE_SIZE) {
dev_dbg(dev, "Invalid, size = %d\n", size);
return -EINVAL;
}
if (sscanf(buf, "%d", &org_req) != 1) {
dev_dbg(dev, "Invalid, value\n");
return -EINVAL;
}
mutex_lock(&hsic.hsic_mutex);
hsic.remoteWakeup_enable = org_req;
if ((hsic.modem_dev != NULL) &&
(hsic.rh_dev != NULL)) {
if (hsic.remoteWakeup_enable) {
dev_dbg(dev, "Modem dev remote wakeup enabled\n");
device_set_wakeup_capable(&hsic.modem_dev->dev, 1);
device_set_wakeup_capable(&hsic.rh_dev->dev, 1);
} else {
dev_dbg(dev, "Modem dev remote wakeup disabled\n");
device_set_wakeup_capable(&hsic.modem_dev->dev, 0);
device_set_wakeup_capable(&hsic.rh_dev->dev, 0);
}
pm_runtime_get_sync(&hsic.modem_dev->dev);
pm_runtime_put_sync(&hsic.modem_dev->dev);
}
mutex_unlock(&hsic.hsic_mutex);
return size;
}
static int ds3232_probe(struct device *dev, struct regmap *regmap, int irq,
const char *name)
{
struct ds3232 *ds3232;
int ret;
ds3232 = devm_kzalloc(dev, sizeof(*ds3232), GFP_KERNEL);
if (!ds3232)
return -ENOMEM;
ds3232->regmap = regmap;
ds3232->irq = irq;
ds3232->dev = dev;
dev_set_drvdata(dev, ds3232);
ret = ds3232_check_rtc_status(dev);
if (ret)
return ret;
if (ds3232->irq > 0)
device_init_wakeup(dev, 1);
ds3232_hwmon_register(dev, name);
ds3232->rtc = devm_rtc_device_register(dev, name, &ds3232_rtc_ops,
THIS_MODULE);
if (IS_ERR(ds3232->rtc))
return PTR_ERR(ds3232->rtc);
if (ds3232->irq > 0) {
ret = devm_request_threaded_irq(dev, ds3232->irq, NULL,
ds3232_irq,
IRQF_SHARED | IRQF_ONESHOT,
name, dev);
if (ret) {
device_set_wakeup_capable(dev, 0);
ds3232->irq = 0;
dev_err(dev, "unable to request IRQ\n");
}
}
return 0;
}
static int __devexit msm_serial_hsl_remove(struct platform_device *pdev)
{
struct msm_hsl_port *msm_hsl_port = platform_get_drvdata(pdev);
struct uart_port *port;
port = get_port_from_line(pdev->id);
pm_runtime_put_sync(&pdev->dev);
pm_runtime_disable(&pdev->dev);
device_set_wakeup_capable(&pdev->dev, 0);
platform_set_drvdata(pdev, NULL);
uart_remove_one_port(&msm_hsl_uart_driver, port);
clk_put(msm_hsl_port->pclk);
clk_put(msm_hsl_port->clk);
debugfs_remove(msm_hsl_port->loopback_dir);
return 0;
}
static int uhci_pci_init(struct usb_hcd *hcd)
{
struct uhci_hcd *uhci = hcd_to_uhci(hcd);
uhci->io_addr = (unsigned long) hcd->rsrc_start;
uhci->rh_numports = uhci_count_ports(hcd);
/* Intel controllers report the OverCurrent bit active on.
* VIA controllers report it active off, so we'll adjust the
* bit value. (It's not standardized in the UHCI spec.)
*/
if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_VIA)
uhci->oc_low = 1;
/* HP's server management chip requires a longer port reset delay. */
if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_HP)
uhci->wait_for_hp = 1;
/* Intel controllers use non-PME wakeup signalling */
if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_INTEL)
device_set_wakeup_capable(uhci_dev(uhci), true);
/* Set up pointers to PCI-specific functions */
uhci->reset_hc = uhci_pci_reset_hc;
uhci->check_and_reset_hc = uhci_pci_check_and_reset_hc;
uhci->configure_hc = uhci_pci_configure_hc;
uhci->resume_detect_interrupts_are_broken =
uhci_pci_resume_detect_interrupts_are_broken;
uhci->global_suspend_mode_is_broken =
uhci_pci_global_suspend_mode_is_broken;
/* Kick BIOS off this hardware and reset if the controller
* isn't already safely quiescent.
*/
check_and_reset_hc(uhci);
return 0;
}
/*!
* Register remote wakeup by this usb controller
*
* @param pdev: platform_device for this usb controller
*
* @return 0 or negative error code in case not supportted.
*/
static int usb_register_remote_wakeup(struct platform_device *pdev)
{
struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
struct resource *res;
int irq;
pr_debug("%s: pdev=0x%p \n", __func__, pdev);
if (!(pdata->wake_up_enable))
return -ECANCELED;
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (!res) {
dev_err(&pdev->dev,
"Found HC with no IRQ. Check %s setup!\n",
dev_name(&pdev->dev));
return -ENODEV;
}
irq = res->start;
device_set_wakeup_capable(&pdev->dev, true);
enable_irq_wake(irq);
return 0;
}
static int __devexit msm_serial_hsl_remove(struct platform_device *pdev)
{
struct msm_hsl_port *msm_hsl_port = platform_get_drvdata(pdev);
struct uart_port *port;
D("%s (): ir\n", __func__);
port = get_port_from_line(pdev->id);
#ifdef CONFIG_SERIAL_MSM_HSL_CONSOLE
device_remove_file(&pdev->dev, &dev_attr_console);
#endif
pm_runtime_put_sync(&pdev->dev);
pm_runtime_disable(&pdev->dev);
device_set_wakeup_capable(&pdev->dev, 0);
platform_set_drvdata(pdev, NULL);
uart_remove_one_port(&msm_hsl_uart_driver, port);
clk_put(msm_hsl_port->pclk);
clk_put(msm_hsl_port->clk);
debugfs_remove(msm_hsl_port->loopback_dir);
return 0;
}
/* the root hub will call this callback when device added/removed */
void hsic_notify(struct usb_device *udev, unsigned action)
{
int retval;
struct pci_dev *pdev = to_pci_dev(udev->bus->controller);
printk(KERN_ERR "pdev device ID: %d, portnum: %d",
pdev->device, udev->portnum);
/* Ignore and only valid for HSIC. Filter out
* the USB devices added by other USB2 host driver */
if (pdev->device != USH_PCI_ID)
return;
/* Ignore USB devices on external hub */
if (udev->parent && udev->parent->parent)
return;
switch (action) {
case USB_DEVICE_ADD:
pr_debug("Notify HSIC add device\n");
/* Root hub */
if (!udev->parent) {
if (udev->speed == USB_SPEED_HIGH) {
pr_debug("%s rh device set\n", __func__);
hsic.rh_dev = udev;
pr_debug("%s Disable autosuspend\n", __func__);
pm_runtime_set_autosuspend_delay(&udev->dev,
hsic.bus_inactivityDuration);
usb_disable_autosuspend(udev);
}
} else {
if (udev->portnum != HSIC_USH_PORT) {
pr_debug("%s ignore ush ports except port5\n",
__func__);
pr_debug("%s ush ports %d\n", __func__,
udev->portnum);
break;
}
/* Modem devices */
hsic.modem_dev = udev;
pm_runtime_set_autosuspend_delay
(&udev->dev, hsic.port_inactivityDuration);
if (hsic.remoteWakeup_enable) {
pr_debug("%s Modem dev remote wakeup enabled\n",
__func__);
device_set_wakeup_capable
(&hsic.modem_dev->dev, 1);
device_set_wakeup_capable
(&hsic.rh_dev->dev, 1);
} else {
pr_debug("%s Modem dev remote wakeup disabled\n",
__func__);
device_set_wakeup_capable
(&hsic.modem_dev->dev, 0);
device_set_wakeup_capable
(&hsic.rh_dev->dev, 0);
}
usb_disable_autosuspend(hsic.modem_dev);
usb_disable_autosuspend(hsic.rh_dev);
#if 0
if (hsic.autosuspend_enable) {
pr_debug("%s----> enable autosuspend\n",
__func__);
usb_enable_autosuspend(udev->parent);
hsic_wakeup_irq_init();
}
if (hsic.autosuspend_enable == 0) {
pr_debug("%s Modem dev autosuspend disable\n",
__func__);
usb_disable_autosuspend(hsic.modem_dev);
}
#endif
}
break;
case USB_DEVICE_REMOVE:
pr_debug("Notify HSIC delete device\n");
/* Root hub */
if (udev->speed != USB_SPEED_HIGH) {
pr_debug("%s ignore ss port\n", __func__);
break;
}
if (!udev->parent) {
pr_debug("%s rh_dev deleted\n", __func__);
hsic.rh_dev = NULL;
} else {
/* Modem devices */
pr_debug("%s----> modem dev deleted\n", __func__);
hsic.modem_dev = NULL;
usb_disable_autosuspend(hsic.rh_dev);
}
break;
case MODEM_WORK_FLUSH:
if (udev == hsic.modem_dev) {
pr_debug("Notify MODEM work flush\n");
synchronize_irq(gpio_to_irq(hsic.aux_gpio));
flush_work(&hsic.hsic_aux);
}
break;
default:
pr_debug("Notify action not supported\n");
break ;
}
return;
}
static int __devinit ds1305_probe(struct spi_device *spi)
{
struct ds1305 *ds1305;
int status;
u8 addr, value;
struct ds1305_platform_data *pdata = spi->dev.platform_data;
bool write_ctrl = false;
/* Sanity check board setup data. This may be hooked up
* in 3wire mode, but we don't care. Note that unless
* there's an inverter in place, this needs SPI_CS_HIGH!
*/
if ((spi->bits_per_word && spi->bits_per_word != 8)
|| (spi->max_speed_hz > 2000000)
|| !(spi->mode & SPI_CPHA))
return -EINVAL;
/* set up driver data */
ds1305 = kzalloc(sizeof *ds1305, GFP_KERNEL);
if (!ds1305)
return -ENOMEM;
ds1305->spi = spi;
spi_set_drvdata(spi, ds1305);
/* read and cache control registers */
addr = DS1305_CONTROL;
status = spi_write_then_read(spi, &addr, sizeof addr,
ds1305->ctrl, sizeof ds1305->ctrl);
if (status < 0) {
dev_dbg(&spi->dev, "can't %s, %d\n",
"read", status);
goto fail0;
}
dev_dbg(&spi->dev, "ctrl %s: %02x %02x %02x\n",
"read", ds1305->ctrl[0],
ds1305->ctrl[1], ds1305->ctrl[2]);
/* Sanity check register values ... partially compensating for the
* fact that SPI has no device handshake. A pullup on MISO would
* make these tests fail; but not all systems will have one. If
* some register is neither 0x00 nor 0xff, a chip is likely there.
*/
if ((ds1305->ctrl[0] & 0x38) != 0 || (ds1305->ctrl[1] & 0xfc) != 0) {
dev_dbg(&spi->dev, "RTC chip is not present\n");
status = -ENODEV;
goto fail0;
}
if (ds1305->ctrl[2] == 0)
dev_dbg(&spi->dev, "chip may not be present\n");
/* enable writes if needed ... if we were paranoid it would
* make sense to enable them only when absolutely necessary.
*/
if (ds1305->ctrl[0] & DS1305_WP) {
u8 buf[2];
ds1305->ctrl[0] &= ~DS1305_WP;
buf[0] = DS1305_WRITE | DS1305_CONTROL;
buf[1] = ds1305->ctrl[0];
status = spi_write_then_read(spi, buf, sizeof buf, NULL, 0);
dev_dbg(&spi->dev, "clear WP --> %d\n", status);
if (status < 0)
goto fail0;
}
/* on DS1305, maybe start oscillator; like most low power
* oscillators, it may take a second to stabilize
*/
if (ds1305->ctrl[0] & DS1305_nEOSC) {
ds1305->ctrl[0] &= ~DS1305_nEOSC;
write_ctrl = true;
dev_warn(&spi->dev, "SET TIME!\n");
}
/* ack any pending IRQs */
if (ds1305->ctrl[1]) {
ds1305->ctrl[1] = 0;
write_ctrl = true;
}
/* this may need one-time (re)init */
if (pdata) {
/* maybe enable trickle charge */
if (((ds1305->ctrl[2] & 0xf0) != DS1305_TRICKLE_MAGIC)) {
ds1305->ctrl[2] = DS1305_TRICKLE_MAGIC
| pdata->trickle;
write_ctrl = true;
}
/* on DS1306, configure 1 Hz signal */
if (pdata->is_ds1306) {
if (pdata->en_1hz) {
if (!(ds1305->ctrl[0] & DS1306_1HZ)) {
ds1305->ctrl[0] |= DS1306_1HZ;
write_ctrl = true;
}
} else {
if (ds1305->ctrl[0] & DS1306_1HZ) {
ds1305->ctrl[0] &= ~DS1306_1HZ;
write_ctrl = true;
}
}
}
}
if (write_ctrl) {
u8 buf[4];
buf[0] = DS1305_WRITE | DS1305_CONTROL;
buf[1] = ds1305->ctrl[0];
buf[2] = ds1305->ctrl[1];
buf[3] = ds1305->ctrl[2];
status = spi_write_then_read(spi, buf, sizeof buf, NULL, 0);
if (status < 0) {
dev_dbg(&spi->dev, "can't %s, %d\n",
"write", status);
goto fail0;
}
dev_dbg(&spi->dev, "ctrl %s: %02x %02x %02x\n",
"write", ds1305->ctrl[0],
ds1305->ctrl[1], ds1305->ctrl[2]);
}
/* see if non-Linux software set up AM/PM mode */
addr = DS1305_HOUR;
status = spi_write_then_read(spi, &addr, sizeof addr,
&value, sizeof value);
if (status < 0) {
dev_dbg(&spi->dev, "read HOUR --> %d\n", status);
goto fail0;
}
ds1305->hr12 = (DS1305_HR_12 & value) != 0;
if (ds1305->hr12)
dev_dbg(&spi->dev, "AM/PM\n");
/* register RTC ... from here on, ds1305->ctrl needs locking */
ds1305->rtc = rtc_device_register("ds1305", &spi->dev,
&ds1305_ops, THIS_MODULE);
if (IS_ERR(ds1305->rtc)) {
status = PTR_ERR(ds1305->rtc);
dev_dbg(&spi->dev, "register rtc --> %d\n", status);
goto fail0;
}
/* Maybe set up alarm IRQ; be ready to handle it triggering right
* away. NOTE that we don't share this. The signal is active low,
* and we can't ack it before a SPI message delay. We temporarily
* disable the IRQ until it's acked, which lets us work with more
* IRQ trigger modes (not all IRQ controllers can do falling edge).
*/
if (spi->irq) {
INIT_WORK(&ds1305->work, ds1305_work);
status = request_irq(spi->irq, ds1305_irq,
0, dev_name(&ds1305->rtc->dev), ds1305);
if (status < 0) {
dev_dbg(&spi->dev, "request_irq %d --> %d\n",
spi->irq, status);
goto fail1;
}
device_set_wakeup_capable(&spi->dev, 1);
}
/* export NVRAM */
status = sysfs_create_bin_file(&spi->dev.kobj, &nvram);
if (status < 0) {
dev_dbg(&spi->dev, "register nvram --> %d\n", status);
goto fail2;
}
return 0;
fail2:
free_irq(spi->irq, ds1305);
fail1:
rtc_device_unregister(ds1305->rtc);
fail0:
kfree(ds1305);
return status;
}
/* called during probe() after chip reset completes */
static int ehci_pci_setup(struct usb_hcd *hcd)
{
struct ehci_hcd *ehci = hcd_to_ehci(hcd);
struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
struct pci_dev *p_smbus;
u8 rev;
u32 temp;
int retval;
switch (pdev->vendor) {
case PCI_VENDOR_ID_TOSHIBA_2:
/* celleb's companion chip */
if (pdev->device == 0x01b5) {
#ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO
ehci->big_endian_mmio = 1;
#else
ehci_warn(ehci,
"unsupported big endian Toshiba quirk\n");
#endif
}
break;
}
ehci->caps = hcd->regs;
ehci->regs = hcd->regs +
HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
dbg_hcs_params(ehci, "reset");
dbg_hcc_params(ehci, "reset");
/* ehci_init() causes memory for DMA transfers to be
* allocated. Thus, any vendor-specific workarounds based on
* limiting the type of memory used for DMA transfers must
* happen before ehci_init() is called. */
switch (pdev->vendor) {
case PCI_VENDOR_ID_NVIDIA:
/* NVidia reports that certain chips don't handle
* QH, ITD, or SITD addresses above 2GB. (But TD,
* data buffer, and periodic schedule are normal.)
*/
switch (pdev->device) {
case 0x003c: /* MCP04 */
case 0x005b: /* CK804 */
case 0x00d8: /* CK8 */
case 0x00e8: /* CK8S */
if (pci_set_consistent_dma_mask(pdev,
DMA_BIT_MASK(31)) < 0)
ehci_warn(ehci, "can't enable NVidia "
"workaround for >2GB RAM\n");
break;
}
break;
}
/* cache this readonly data; minimize chip reads */
ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
retval = ehci_halt(ehci);
if (retval)
return retval;
if ((pdev->vendor == PCI_VENDOR_ID_AMD && pdev->device == 0x7808) ||
(pdev->vendor == PCI_VENDOR_ID_ATI && pdev->device == 0x4396)) {
/* EHCI controller on AMD SB700/SB800/Hudson-2/3 platforms may
* read/write memory space which does not belong to it when
* there is NULL pointer with T-bit set to 1 in the frame list
* table. To avoid the issue, the frame list link pointer
* should always contain a valid pointer to a inactive qh.
*/
ehci->use_dummy_qh = 1;
ehci_info(ehci, "applying AMD SB700/SB800/Hudson-2/3 EHCI "
"dummy qh workaround\n");
}
/* data structure init */
retval = ehci_init(hcd);
if (retval)
return retval;
switch (pdev->vendor) {
case PCI_VENDOR_ID_NEC:
ehci->need_io_watchdog = 0;
break;
case PCI_VENDOR_ID_INTEL:
ehci->need_io_watchdog = 0;
ehci->fs_i_thresh = 1;
if (pdev->device == 0x27cc) {
ehci->broken_periodic = 1;
ehci_info(ehci, "using broken periodic workaround\n");
}
if (pdev->device == 0x0806 || pdev->device == 0x0811
|| pdev->device == 0x0829) {
ehci_info(ehci, "disable lpm for langwell/penwell\n");
ehci->has_lpm = 0;
}
if (pdev->device == PCI_DEVICE_ID_INTEL_CE4100_USB) {
hcd->has_tt = 1;
tdi_reset(ehci);
}
if (pdev->subsystem_vendor == PCI_VENDOR_ID_ASUSTEK) {
/* EHCI #1 or #2 on 6 Series/C200 Series chipset */
if (pdev->device == 0x1c26 || pdev->device == 0x1c2d) {
ehci_info(ehci, "broken D3 during system sleep on ASUS\n");
hcd->broken_pci_sleep = 1;
device_set_wakeup_capable(&pdev->dev, false);
}
}
break;
case PCI_VENDOR_ID_TDI:
if (pdev->device == PCI_DEVICE_ID_TDI_EHCI) {
hcd->has_tt = 1;
tdi_reset(ehci);
}
break;
case PCI_VENDOR_ID_AMD:
/* AMD PLL quirk */
if (usb_amd_find_chipset_info())
ehci->amd_pll_fix = 1;
/* AMD8111 EHCI doesn't work, according to AMD errata */
if (pdev->device == 0x7463) {
ehci_info(ehci, "ignoring AMD8111 (errata)\n");
retval = -EIO;
goto done;
}
break;
case PCI_VENDOR_ID_NVIDIA:
switch (pdev->device) {
/* Some NForce2 chips have problems with selective suspend;
* fixed in newer silicon.
*/
case 0x0068:
if (pdev->revision < 0xa4)
ehci->no_selective_suspend = 1;
break;
/* MCP89 chips on the MacBookAir3,1 give EPROTO when
* fetching device descriptors unless LPM is disabled.
* There are also intermittent problems enumerating
* devices with PPCD enabled.
*/
case 0x0d9d:
ehci_info(ehci, "disable lpm/ppcd for nvidia mcp89");
ehci->has_lpm = 0;
ehci->has_ppcd = 0;
ehci->command &= ~CMD_PPCEE;
break;
}
break;
case PCI_VENDOR_ID_VIA:
if (pdev->device == 0x3104 && (pdev->revision & 0xf0) == 0x60) {
u8 tmp;
/* The VT6212 defaults to a 1 usec EHCI sleep time which
* hogs the PCI bus *badly*. Setting bit 5 of 0x4B makes
* that sleep time use the conventional 10 usec.
*/
pci_read_config_byte(pdev, 0x4b, &tmp);
if (tmp & 0x20)
break;
pci_write_config_byte(pdev, 0x4b, tmp | 0x20);
}
break;
case PCI_VENDOR_ID_ATI:
/* AMD PLL quirk */
if (usb_amd_find_chipset_info())
ehci->amd_pll_fix = 1;
/* SB600 and old version of SB700 have a bug in EHCI controller,
* which causes usb devices lose response in some cases.
*/
if ((pdev->device == 0x4386) || (pdev->device == 0x4396)) {
p_smbus = pci_get_device(PCI_VENDOR_ID_ATI,
PCI_DEVICE_ID_ATI_SBX00_SMBUS,
NULL);
if (!p_smbus)
break;
rev = p_smbus->revision;
if ((pdev->device == 0x4386) || (rev == 0x3a)
|| (rev == 0x3b)) {
u8 tmp;
ehci_info(ehci, "applying AMD SB600/SB700 USB "
"freeze workaround\n");
pci_read_config_byte(pdev, 0x53, &tmp);
pci_write_config_byte(pdev, 0x53, tmp | (1<<3));
}
pci_dev_put(p_smbus);
}
break;
case PCI_VENDOR_ID_NETMOS:
/* MosChip frame-index-register bug */
ehci_info(ehci, "applying MosChip frame-index workaround\n");
ehci->frame_index_bug = 1;
break;
}
/* optional debug port, normally in the first BAR */
temp = pci_find_capability(pdev, 0x0a);
if (temp) {
pci_read_config_dword(pdev, temp, &temp);
temp >>= 16;
if ((temp & (3 << 13)) == (1 << 13)) {
temp &= 0x1fff;
ehci->debug = ehci_to_hcd(ehci)->regs + temp;
temp = ehci_readl(ehci, &ehci->debug->control);
ehci_info(ehci, "debug port %d%s\n",
HCS_DEBUG_PORT(ehci->hcs_params),
(temp & DBGP_ENABLED)
? " IN USE"
: "");
if (!(temp & DBGP_ENABLED))
ehci->debug = NULL;
}
}
ehci_reset(ehci);
/* at least the Genesys GL880S needs fixup here */
temp = HCS_N_CC(ehci->hcs_params) * HCS_N_PCC(ehci->hcs_params);
temp &= 0x0f;
if (temp && HCS_N_PORTS(ehci->hcs_params) > temp) {
ehci_dbg(ehci, "bogus port configuration: "
"cc=%d x pcc=%d < ports=%d\n",
HCS_N_CC(ehci->hcs_params),
HCS_N_PCC(ehci->hcs_params),
HCS_N_PORTS(ehci->hcs_params));
switch (pdev->vendor) {
case 0x17a0: /* GENESYS */
/* GL880S: should be PORTS=2 */
temp |= (ehci->hcs_params & ~0xf);
ehci->hcs_params = temp;
break;
case PCI_VENDOR_ID_NVIDIA:
/* NF4: should be PCC=10 */
break;
}
}
/* Serial Bus Release Number is at PCI 0x60 offset */
pci_read_config_byte(pdev, 0x60, &ehci->sbrn);
if (pdev->vendor == PCI_VENDOR_ID_STMICRO
&& pdev->device == PCI_DEVICE_ID_STMICRO_USB_HOST)
ehci->sbrn = 0x20; /* ConneXT has no sbrn register */
/* Keep this around for a while just in case some EHCI
* implementation uses legacy PCI PM support. This test
* can be removed on 17 Dec 2009 if the dev_warn() hasn't
* been triggered by then.
*/
if (!device_can_wakeup(&pdev->dev)) {
u16 port_wake;
pci_read_config_word(pdev, 0x62, &port_wake);
if (port_wake & 0x0001) {
dev_warn(&pdev->dev, "Enabling legacy PCI PM\n");
device_set_wakeup_capable(&pdev->dev, 1);
}
}
#ifdef CONFIG_USB_SUSPEND
/* REVISIT: the controller works fine for wakeup iff the root hub
* itself is "globally" suspended, but usbcore currently doesn't
* understand such things.
*
* System suspend currently expects to be able to suspend the entire
* device tree, device-at-a-time. If we failed selective suspend
* reports, system suspend would fail; so the root hub code must claim
* success. That's lying to usbcore, and it matters for runtime
* PM scenarios with selective suspend and remote wakeup...
*/
if (ehci->no_selective_suspend && device_can_wakeup(&pdev->dev))
ehci_warn(ehci, "selective suspend/wakeup unavailable\n");
#endif
ehci_port_power(ehci, 1);
retval = ehci_pci_reinit(ehci, pdev);
done:
return retval;
}
static int __init msm_serial_hsl_probe(struct platform_device *pdev)
{
struct msm_hsl_port *msm_hsl_port;
struct resource *uart_resource;
struct resource *gsbi_resource;
struct uart_port *port;
struct msm_serial_hslite_platform_data *pdata = pdev->dev.platform_data;
int ret;
if (unlikely(pdev->id < 0 || pdev->id >= UART_NR))
return -ENXIO;
printk(KERN_INFO "msm_serial_hsl: detected port #%d\n", pdev->id);
port = get_port_from_line(pdev->id);
port->dev = &pdev->dev;
msm_hsl_port = UART_TO_MSM(port);
if (pdata && pdata->config_gpio) {
ret = gpio_request(pdata->uart_tx_gpio, "UART_TX_GPIO");
if (unlikely(ret)) {
printk(KERN_ERR "%s: gpio request failed for:"
"%d\n", __func__, pdata->uart_tx_gpio);
return ret;
}
ret = gpio_request(pdata->uart_rx_gpio, "UART_RX_GPIO");
if (unlikely(ret)) {
printk(KERN_ERR "%s: gpio request failed for:"
"%d\n", __func__, pdata->uart_rx_gpio);
gpio_free(pdata->uart_tx_gpio);
return ret;
}
}
if (msm_serial_hsl_has_gsbi()) {
gsbi_resource =
platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"gsbi_resource");
if (unlikely(!gsbi_resource))
return -ENXIO;
msm_hsl_port->clk = clk_get(&pdev->dev, "gsbi_uart_clk");
msm_hsl_port->pclk = clk_get(&pdev->dev, "gsbi_pclk");
} else {
msm_hsl_port->clk = clk_get(&pdev->dev, "uartdm_clk");
msm_hsl_port->pclk = NULL;
}
if (unlikely(IS_ERR(msm_hsl_port->clk))) {
printk(KERN_ERR "%s: Error getting clk\n", __func__);
return PTR_ERR(msm_hsl_port->clk);
}
if (unlikely(IS_ERR(msm_hsl_port->pclk))) {
printk(KERN_ERR "%s: Error getting pclk\n", __func__);
return PTR_ERR(msm_hsl_port->pclk);
}
/* Set up the MREG/NREG/DREG/MNDREG */
ret = clk_set_rate(msm_hsl_port->clk, 7372800);
if (ret) {
printk(KERN_WARNING "Error setting clock rate on UART\n");
return ret;
}
uart_resource = platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"uartdm_resource");
if (unlikely(!uart_resource)) {
printk(KERN_ERR "getting uartdm_resource failed\n");
return -ENXIO;
}
port->mapbase = uart_resource->start;
port->irq = platform_get_irq(pdev, 0);
if (unlikely(port->irq < 0)) {
printk(KERN_ERR "%s: getting irq failed\n", __func__);
return -ENXIO;
}
device_set_wakeup_capable(&pdev->dev, 1);
platform_set_drvdata(pdev, port);
pm_runtime_enable(port->dev);
ret = uart_add_one_port(&msm_hsl_uart_driver, port);
return ret;
}
static int __devinit stm_rtc_probe(struct platform_device *pdev)
{
struct stm_plat_rtc_lpc *plat_data;
struct stm_rtc *rtc;
struct resource *res;
int size;
int ret = 0;
struct rtc_time tm_check;
rtc = kzalloc(sizeof(struct stm_rtc), GFP_KERNEL);
if (unlikely(!rtc))
return -ENOMEM;
spin_lock_init(&rtc->lock);
plat_data = pdev->dev.platform_data;
if (unlikely(plat_data == NULL)) {
dev_err(&pdev->dev, "No platform data\n");
ret = -ENOENT;
goto err_badres;
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (unlikely(res == NULL)) {
dev_err(&pdev->dev, "No IO resource\n");
ret = -ENOENT;
goto err_badres;
}
size = res->end - res->start + 1;
rtc->res = request_mem_region(res->start, size, pdev->name);
if (!rtc->res) {
ret = -EBUSY;
goto err_badres;
}
rtc->ioaddr = ioremap_nocache(res->start, size);
if (!rtc->ioaddr) {
ret = -EINVAL;
goto err_badmap;
}
if (plat_data->clk_id)
rtc->clk = clk_get(&pdev->dev, plat_data->clk_id);
else
rtc->clk = clk_get(&pdev->dev, "lpc_clk");
if (IS_ERR(rtc->clk)) {
pr_err("clk lpc_clk not found\n");
ret = PTR_ERR(rtc->clk);
goto err_badreg;
}
clk_enable(rtc->clk);
if (plat_data->force_clk_rate)
clk_set_rate(rtc->clk, plat_data->force_clk_rate);
pr_debug("%s: is using clk: %s @ %lu\n",
DRV_NAME, rtc->clk->name, clk_get_rate(rtc->clk));
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (!res) {
pr_err("%s Request irq %d not done\n",
__func__, res->start);
return -ENODEV;
}
rtc->irq = res->start;
irq_set_irq_type(rtc->irq, plat_data->irq_edge_level);
enable_irq_wake(rtc->irq);
if (devm_request_irq(&pdev->dev, rtc->irq, stm_rtc_irq,
IRQF_DISABLED, DRV_NAME, rtc) < 0){
pr_err("%s: Request irq not done\n", __func__);
return -ENODEV;
}
disable_irq(rtc->irq);
device_set_wakeup_capable(&pdev->dev, 1);
platform_set_drvdata(pdev, rtc);
/*
* The RTC-LPC is able to manage date.year > 2038
* but currently the kernel can not manage this date!
* If the RTC-LPC has a date.year > 2038 then
* it's set to the epoch "Jan 1st 2000"
*/
stm_rtc_read_time(&pdev->dev, &tm_check);
if (tm_check.tm_year >= (2038 - 1900)) {
memset(&tm_check, 0, sizeof(tm_check));
tm_check.tm_year = 100;
/*
* FIXME:
* the 'tm_check.tm_mday' should be set to zero but the func-
* tions rtc_tm_to_time and rtc_time_to_time aren't coherent.
*/
tm_check.tm_mday = 1;
stm_rtc_set_time(&pdev->dev, &tm_check);
}
rtc->rtc_dev = rtc_device_register(DRV_NAME, &pdev->dev,
&stm_rtc_ops, THIS_MODULE);
if (IS_ERR(rtc->rtc_dev)) {
ret = PTR_ERR(rtc->rtc_dev);
goto err_badreg;
}
return ret;
err_badreg:
iounmap(rtc->ioaddr);
err_badmap:
release_resource(rtc->res);
err_badres:
kfree(rtc);
platform_set_drvdata(pdev, NULL);
return ret;
}
static int tc3589x_keypad_probe(struct platform_device *pdev)
{
struct tc3589x *tc3589x = dev_get_drvdata(pdev->dev.parent);
struct tc_keypad *keypad;
struct input_dev *input;
const struct tc3589x_keypad_platform_data *plat;
int error, irq;
plat = tc3589x->pdata->keypad;
if (!plat) {
dev_err(&pdev->dev, "invalid keypad platform data\n");
return -EINVAL;
}
irq = platform_get_irq(pdev, 0);
if (irq < 0)
return irq;
keypad = kzalloc(sizeof(struct tc_keypad), GFP_KERNEL);
input = input_allocate_device();
if (!keypad || !input) {
dev_err(&pdev->dev, "failed to allocate keypad memory\n");
error = -ENOMEM;
goto err_free_mem;
}
keypad->board = plat;
keypad->input = input;
keypad->tc3589x = tc3589x;
input->id.bustype = BUS_I2C;
input->name = pdev->name;
input->dev.parent = &pdev->dev;
input->open = tc3589x_keypad_open;
input->close = tc3589x_keypad_close;
error = matrix_keypad_build_keymap(plat->keymap_data, NULL,
TC3589x_MAX_KPROW, TC3589x_MAX_KPCOL,
NULL, input);
if (error) {
dev_err(&pdev->dev, "Failed to build keymap\n");
goto err_free_mem;
}
keypad->keymap = input->keycode;
input_set_capability(input, EV_MSC, MSC_SCAN);
if (!plat->no_autorepeat)
__set_bit(EV_REP, input->evbit);
input_set_drvdata(input, keypad);
error = request_threaded_irq(irq, NULL,
tc3589x_keypad_irq, plat->irqtype,
"tc3589x-keypad", keypad);
if (error < 0) {
dev_err(&pdev->dev,
"Could not allocate irq %d,error %d\n",
irq, error);
goto err_free_mem;
}
error = input_register_device(input);
if (error) {
dev_err(&pdev->dev, "Could not register input device\n");
goto err_free_irq;
}
/* let platform decide if keypad is a wakeup source or not */
device_init_wakeup(&pdev->dev, plat->enable_wakeup);
device_set_wakeup_capable(&pdev->dev, plat->enable_wakeup);
platform_set_drvdata(pdev, keypad);
return 0;
err_free_irq:
free_irq(irq, keypad);
err_free_mem:
input_free_device(input);
kfree(keypad);
return error;
}
/* called during probe() after chip reset completes */
static int ehci_pci_setup(struct usb_hcd *hcd)
{
struct ehci_hcd *ehci = hcd_to_ehci(hcd);
struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
struct pci_dev *p_smbus;
u8 rev;
u32 temp;
int retval;
switch (pdev->vendor) {
case PCI_VENDOR_ID_TOSHIBA_2:
/* celleb's companion chip */
if (pdev->device == 0x01b5) {
#ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO
ehci->big_endian_mmio = 1;
#else
ehci_warn(ehci,
"unsupported big endian Toshiba quirk\n");
#endif
}
break;
}
ehci->caps = hcd->regs;
ehci->regs = hcd->regs +
HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase));
dbg_hcs_params(ehci, "reset");
dbg_hcc_params(ehci, "reset");
/* ehci_init() causes memory for DMA transfers to be
* allocated. Thus, any vendor-specific workarounds based on
* limiting the type of memory used for DMA transfers must
* happen before ehci_init() is called. */
switch (pdev->vendor) {
case PCI_VENDOR_ID_NVIDIA:
/* NVidia reports that certain chips don't handle
* QH, ITD, or SITD addresses above 2GB. (But TD,
* data buffer, and periodic schedule are normal.)
*/
switch (pdev->device) {
case 0x003c: /* MCP04 */
case 0x005b: /* CK804 */
case 0x00d8: /* CK8 */
case 0x00e8: /* CK8S */
if (pci_set_consistent_dma_mask(pdev,
DMA_31BIT_MASK) < 0)
ehci_warn(ehci, "can't enable NVidia "
"workaround for >2GB RAM\n");
break;
}
break;
}
/* cache this readonly data; minimize chip reads */
ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
retval = ehci_halt(ehci);
if (retval)
return retval;
/* data structure init */
retval = ehci_init(hcd);
if (retval)
return retval;
switch (pdev->vendor) {
case PCI_VENDOR_ID_TDI:
if (pdev->device == PCI_DEVICE_ID_TDI_EHCI) {
hcd->has_tt = 1;
tdi_reset(ehci);
}
break;
case PCI_VENDOR_ID_AMD:
/* AMD8111 EHCI doesn't work, according to AMD errata */
if (pdev->device == 0x7463) {
ehci_info(ehci, "ignoring AMD8111 (errata)\n");
retval = -EIO;
goto done;
}
break;
case PCI_VENDOR_ID_NVIDIA:
switch (pdev->device) {
/* Some NForce2 chips have problems with selective suspend;
* fixed in newer silicon.
*/
case 0x0068:
if (pdev->revision < 0xa4)
ehci->no_selective_suspend = 1;
break;
}
break;
case PCI_VENDOR_ID_VIA:
if (pdev->device == 0x3104 && (pdev->revision & 0xf0) == 0x60) {
u8 tmp;
/* The VT6212 defaults to a 1 usec EHCI sleep time which
* hogs the PCI bus *badly*. Setting bit 5 of 0x4B makes
* that sleep time use the conventional 10 usec.
*/
pci_read_config_byte(pdev, 0x4b, &tmp);
if (tmp & 0x20)
break;
pci_write_config_byte(pdev, 0x4b, tmp | 0x20);
}
break;
case PCI_VENDOR_ID_ATI:
/* SB600 and old version of SB700 have a bug in EHCI controller,
* which causes usb devices lose response in some cases.
*/
if ((pdev->device == 0x4386) || (pdev->device == 0x4396)) {
p_smbus = pci_get_device(PCI_VENDOR_ID_ATI,
PCI_DEVICE_ID_ATI_SBX00_SMBUS,
NULL);
if (!p_smbus)
break;
rev = p_smbus->revision;
if ((pdev->device == 0x4386) || (rev == 0x3a)
|| (rev == 0x3b)) {
u8 tmp;
ehci_info(ehci, "applying AMD SB600/SB700 USB "
"freeze workaround\n");
pci_read_config_byte(pdev, 0x53, &tmp);
pci_write_config_byte(pdev, 0x53, tmp | (1<<3));
}
pci_dev_put(p_smbus);
}
break;
}
ehci_reset(ehci);
/* at least the Genesys GL880S needs fixup here */
temp = HCS_N_CC(ehci->hcs_params) * HCS_N_PCC(ehci->hcs_params);
temp &= 0x0f;
if (temp && HCS_N_PORTS(ehci->hcs_params) > temp) {
ehci_dbg(ehci, "bogus port configuration: "
"cc=%d x pcc=%d < ports=%d\n",
HCS_N_CC(ehci->hcs_params),
HCS_N_PCC(ehci->hcs_params),
HCS_N_PORTS(ehci->hcs_params));
switch (pdev->vendor) {
case 0x17a0: /* GENESYS */
/* GL880S: should be PORTS=2 */
temp |= (ehci->hcs_params & ~0xf);
ehci->hcs_params = temp;
break;
case PCI_VENDOR_ID_NVIDIA:
/* NF4: should be PCC=10 */
break;
}
}
/* Serial Bus Release Number is at PCI 0x60 offset */
pci_read_config_byte(pdev, 0x60, &ehci->sbrn);
/* Keep this around for a while just in case some EHCI
* implementation uses legacy PCI PM support. This test
* can be removed on 17 Dec 2009 if the dev_warn() hasn't
* been triggered by then.
*/
if (!device_can_wakeup(&pdev->dev)) {
u16 port_wake;
pci_read_config_word(pdev, 0x62, &port_wake);
if (port_wake & 0x0001) {
dev_warn(&pdev->dev, "Enabling legacy PCI PM\n");
device_set_wakeup_capable(&pdev->dev, 1);
}
}
#ifdef CONFIG_USB_SUSPEND
/* REVISIT: the controller works fine for wakeup iff the root hub
* itself is "globally" suspended, but usbcore currently doesn't
* understand such things.
*
* System suspend currently expects to be able to suspend the entire
* device tree, device-at-a-time. If we failed selective suspend
* reports, system suspend would fail; so the root hub code must claim
* success. That's lying to usbcore, and it matters for for runtime
* PM scenarios with selective suspend and remote wakeup...
*/
if (ehci->no_selective_suspend && device_can_wakeup(&pdev->dev))
ehci_warn(ehci, "selective suspend/wakeup unavailable\n");
#endif
ehci_port_power(ehci, 1);
retval = ehci_pci_reinit(ehci, pdev);
done:
return retval;
}
static int olpc_battery_probe(struct platform_device *pdev)
{
struct power_supply_config bat_psy_cfg = {};
struct power_supply_config ac_psy_cfg = {};
struct olpc_battery_data *data;
uint8_t status;
uint8_t ecver;
int ret;
data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
platform_set_drvdata(pdev, data);
/* See if the EC is already there and get the EC revision */
ret = olpc_ec_cmd(EC_FIRMWARE_REV, NULL, 0, &ecver, 1);
if (ret)
return ret;
if (of_find_compatible_node(NULL, NULL, "olpc,xo1.75-ec")) {
/* XO 1.75 */
data->new_proto = true;
data->little_endian = true;
} else if (ecver > 0x44) {
/* XO 1 or 1.5 with a new EC firmware. */
data->new_proto = true;
} else if (ecver < 0x44) {
/*
* We've seen a number of EC protocol changes; this driver
* requires the latest EC protocol, supported by 0x44 and above.
*/
printk(KERN_NOTICE "OLPC EC version 0x%02x too old for "
"battery driver.\n", ecver);
return -ENXIO;
}
ret = olpc_ec_cmd(EC_BAT_STATUS, NULL, 0, &status, 1);
if (ret)
return ret;
/* Ignore the status. It doesn't actually matter */
ac_psy_cfg.of_node = pdev->dev.of_node;
ac_psy_cfg.drv_data = data;
data->olpc_ac = devm_power_supply_register(&pdev->dev, &olpc_ac_desc,
&ac_psy_cfg);
if (IS_ERR(data->olpc_ac))
return PTR_ERR(data->olpc_ac);
if (of_device_is_compatible(pdev->dev.of_node, "olpc,xo1.5-battery")) {
/* XO-1.5 */
olpc_bat_desc.properties = olpc_xo15_bat_props;
olpc_bat_desc.num_properties = ARRAY_SIZE(olpc_xo15_bat_props);
} else {
/* XO-1 */
olpc_bat_desc.properties = olpc_xo1_bat_props;
olpc_bat_desc.num_properties = ARRAY_SIZE(olpc_xo1_bat_props);
}
bat_psy_cfg.of_node = pdev->dev.of_node;
bat_psy_cfg.drv_data = data;
bat_psy_cfg.attr_grp = olpc_bat_sysfs_groups;
data->olpc_bat = devm_power_supply_register(&pdev->dev, &olpc_bat_desc,
&bat_psy_cfg);
if (IS_ERR(data->olpc_bat))
return PTR_ERR(data->olpc_bat);
if (olpc_ec_wakeup_available()) {
device_set_wakeup_capable(&data->olpc_ac->dev, true);
device_set_wakeup_capable(&data->olpc_bat->dev, true);
}
return 0;
}
/**
* xgpiops_probe - Initialization method for a xgpiops device
* @pdev: platform device instance
*
* This function allocates memory resources for the gpio device and registers
* all the banks of the device. It will also set up interrupts for the gpio
* pins.
* Note: Interrupts are disabled for all the banks during initialization.
* Returns 0 on success, negative error otherwise.
*/
static int xgpiops_probe(struct platform_device *pdev)
{
int ret;
unsigned int irq_num;
struct xgpiops *gpio;
struct gpio_chip *chip;
resource_size_t remap_size;
struct resource *mem_res = NULL;
int pin_num, bank_num, gpio_irq;
gpio = kzalloc(sizeof(struct xgpiops), GFP_KERNEL);
if (!gpio) {
dev_err(&pdev->dev,
"couldn't allocate memory for gpio private data\n");
return -ENOMEM;
}
spin_lock_init(&gpio->gpio_lock);
platform_set_drvdata(pdev, gpio);
mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!mem_res) {
dev_err(&pdev->dev, "No memory resource\n");
ret = -ENODEV;
goto err_free_gpio;
}
remap_size = mem_res->end - mem_res->start + 1;
if (!request_mem_region(mem_res->start, remap_size, pdev->name)) {
dev_err(&pdev->dev, "Cannot request IO\n");
ret = -ENXIO;
goto err_free_gpio;
}
gpio->base_addr = ioremap(mem_res->start, remap_size);
if (gpio->base_addr == NULL) {
dev_err(&pdev->dev, "Couldn't ioremap memory at 0x%08lx\n",
(unsigned long)mem_res->start);
ret = -ENOMEM;
goto err_release_region;
}
irq_num = platform_get_irq(pdev, 0);
gpio->irq = irq_num;
/* configure the gpio chip */
chip = &gpio->chip;
chip->label = "xgpiops";
chip->owner = THIS_MODULE;
chip->dev = &pdev->dev;
chip->get = xgpiops_get_value;
chip->set = xgpiops_set_value;
chip->request = xgpiops_request;
chip->free = xgpiops_free;
chip->direction_input = xgpiops_dir_in;
chip->direction_output = xgpiops_dir_out;
chip->to_irq = xgpiops_to_irq;
chip->dbg_show = NULL;
chip->base = 0; /* default pin base */
chip->ngpio = XGPIOPS_NR_GPIOS;
chip->can_sleep = 0;
gpio->irq_base = irq_alloc_descs(-1, 0, chip->ngpio, 0);
if (gpio->irq_base < 0) {
dev_err(&pdev->dev, "Couldn't allocate IRQ numbers\n");
ret = -ENODEV;
goto err_iounmap;
}
irq_domain = irq_domain_add_legacy(pdev->dev.of_node,
chip->ngpio, gpio->irq_base, 0,
&irq_domain_simple_ops, NULL);
/* report a bug if gpio chip registration fails */
ret = gpiochip_add(chip);
if (ret < 0) {
dev_err(&pdev->dev, "gpio chip registration failed\n");
goto err_iounmap;
} else {
dev_info(&pdev->dev, "gpio at 0x%08lx mapped to 0x%08lx\n",
(unsigned long)mem_res->start,
(unsigned long)gpio->base_addr);
}
/* Enable GPIO clock */
gpio->clk = clk_get(&pdev->dev, NULL);
if (IS_ERR(gpio->clk)) {
dev_err(&pdev->dev, "input clock not found.\n");
ret = PTR_ERR(gpio->clk);
goto err_chip_remove;
}
ret = clk_prepare_enable(gpio->clk);
if (ret) {
dev_err(&pdev->dev, "Unable to enable clock.\n");
goto err_clk_put;
}
/* disable interrupts for all banks */
for (bank_num = 0; bank_num < 4; bank_num++) {
xgpiops_writereg(0xffffffff, gpio->base_addr +
XGPIOPS_INTDIS_OFFSET(bank_num));
}
/*
* set the irq chip, handler and irq chip data for callbacks for
* each pin
*/
for (pin_num = 0; pin_num < min_t(int, XGPIOPS_NR_GPIOS,
(int)chip->ngpio); pin_num++) {
gpio_irq = irq_find_mapping(irq_domain, pin_num);
irq_set_chip_and_handler(gpio_irq, &xgpiops_irqchip,
handle_simple_irq);
irq_set_chip_data(gpio_irq, (void *)gpio);
set_irq_flags(gpio_irq, IRQF_VALID);
}
irq_set_handler_data(irq_num, (void *)gpio);
irq_set_chained_handler(irq_num, xgpiops_irqhandler);
xgpiops_pm_runtime_init(pdev);
device_set_wakeup_capable(&pdev->dev, 1);
return 0;
err_clk_put:
clk_put(gpio->clk);
err_chip_remove:
gpiochip_remove(chip);
err_iounmap:
iounmap(gpio->base_addr);
err_release_region:
release_mem_region(mem_res->start, remap_size);
err_free_gpio:
platform_set_drvdata(pdev, NULL);
kfree(gpio);
return ret;
}
/* the root hub will call this callback when device added/removed */
static void hsic_notify(struct usb_device *udev, unsigned action)
{
int retval;
struct pci_dev *pdev = to_pci_dev(udev->bus->controller);
/* Ignore and only valid for HSIC. Filter out
* the USB devices added by other USB2 host driver */
if (pdev->device != 0x119d)
return;
/* Ignore USB devices on external hub */
if (udev->parent && udev->parent->parent)
return;
/* Only valid for hsic port1 */
if (udev->portnum == 2) {
pr_debug("%s ignore hsic port2\n", __func__);
return;
}
switch (action) {
case USB_DEVICE_ADD:
pr_debug("Notify HSIC add device\n");
/* Root hub */
if (!udev->parent) {
hsic.rh_dev = udev;
pr_debug("%s Enable autosuspend\n", __func__);
pm_runtime_set_autosuspend_delay(&udev->dev,
hsic.bus_inactivityDuration);
hsic.autosuspend_enable = 1;
usb_enable_autosuspend(udev);
} else {
/* Modem devices */
hsic.modem_dev = udev;
pm_runtime_set_autosuspend_delay
(&udev->dev, hsic.port_inactivityDuration);
udev->persist_enabled = 0;
if (hsic.remoteWakeup_enable) {
pr_debug("%s Modem dev remote wakeup enabled\n",
__func__);
device_set_wakeup_capable
(&hsic.modem_dev->dev, 1);
device_set_wakeup_capable
(&hsic.rh_dev->dev, 1);
} else {
pr_debug("%s Modem dev remote wakeup disabled\n",
__func__);
device_set_wakeup_capable
(&hsic.modem_dev->dev, 0);
device_set_wakeup_capable
(&hsic.rh_dev->dev, 0);
}
pr_debug("%s Disable autosuspend\n", __func__);
usb_disable_autosuspend(hsic.modem_dev);
hsic.autosuspend_enable = 0;
pr_debug("%s----> Enable AUX irq\n", __func__);
retval = hsic_aux_irq_init();
if (retval)
dev_err(&pci_dev->dev,
"unable to request IRQ\n");
}
break;
case USB_DEVICE_REMOVE:
pr_debug("Notify HSIC delete device\n");
/* Root hub */
if (!udev->parent) {
pr_debug("%s rh_dev deleted\n", __func__);
hsic.rh_dev = NULL;
hsic.autosuspend_enable = 1;
} else {
/* Modem devices */
pr_debug("%s----> modem dev deleted\n", __func__);
hsic.modem_dev = NULL;
}
s3_wake_unlock();
break;
default:
pr_debug("Notify action not supported\n");
break ;
}
return;
}
static int keyscan_probe(struct platform_device *pdev)
{
struct st_keyscan *keypad_data;
struct input_dev *input_dev;
struct resource *res;
int error;
if (!pdev->dev.of_node) {
dev_err(&pdev->dev, "no DT data present\n");
return -EINVAL;
}
keypad_data = devm_kzalloc(&pdev->dev, sizeof(*keypad_data),
GFP_KERNEL);
if (!keypad_data)
return -ENOMEM;
input_dev = devm_input_allocate_device(&pdev->dev);
if (!input_dev) {
dev_err(&pdev->dev, "failed to allocate the input device\n");
return -ENOMEM;
}
input_dev->name = pdev->name;
input_dev->phys = "keyscan-keys/input0";
input_dev->dev.parent = &pdev->dev;
input_dev->open = keyscan_open;
input_dev->close = keyscan_close;
input_dev->id.bustype = BUS_HOST;
error = keypad_matrix_key_parse_dt(keypad_data);
if (error)
return error;
error = matrix_keypad_build_keymap(NULL, NULL,
keypad_data->n_rows,
keypad_data->n_cols,
NULL, input_dev);
if (error) {
dev_err(&pdev->dev, "failed to build keymap\n");
return error;
}
input_set_drvdata(input_dev, keypad_data);
keypad_data->input_dev = input_dev;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
keypad_data->base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(keypad_data->base))
return PTR_ERR(keypad_data->base);
keypad_data->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(keypad_data->clk)) {
dev_err(&pdev->dev, "cannot get clock\n");
return PTR_ERR(keypad_data->clk);
}
error = clk_enable(keypad_data->clk);
if (error) {
dev_err(&pdev->dev, "failed to enable clock\n");
return error;
}
keyscan_stop(keypad_data);
keypad_data->irq = platform_get_irq(pdev, 0);
if (keypad_data->irq < 0) {
dev_err(&pdev->dev, "no IRQ specified\n");
return -EINVAL;
}
error = devm_request_irq(&pdev->dev, keypad_data->irq, keyscan_isr, 0,
pdev->name, keypad_data);
if (error) {
dev_err(&pdev->dev, "failed to request IRQ\n");
return error;
}
error = input_register_device(input_dev);
if (error) {
dev_err(&pdev->dev, "failed to register input device\n");
return error;
}
platform_set_drvdata(pdev, keypad_data);
device_set_wakeup_capable(&pdev->dev, 1);
return 0;
}
static int __devinit msm_serial_hsl_probe(struct platform_device *pdev)
{
struct msm_hsl_port *msm_hsl_port;
struct resource *uart_resource;
struct resource *gsbi_resource;
struct uart_port *port;
int ret;
if (unlikely(pdev->id < 0 || pdev->id >= UART_NR))
return -ENXIO;
printk(KERN_INFO "msm_serial_hsl: detected port #%d\n", pdev->id);
port = get_port_from_line(pdev->id);
port->dev = &pdev->dev;
msm_hsl_port = UART_TO_MSM(port);
if (msm_serial_hsl_has_gsbi()) {
gsbi_resource =
platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"gsbi_resource");
if (unlikely(!gsbi_resource))
return -ENXIO;
msm_hsl_port->clk = clk_get(&pdev->dev, "gsbi_uart_clk");
msm_hsl_port->pclk = clk_get(&pdev->dev, "gsbi_pclk");
} else {
msm_hsl_port->clk = clk_get(&pdev->dev, "uartdm_clk");
msm_hsl_port->pclk = NULL;
}
if (unlikely(IS_ERR(msm_hsl_port->clk))) {
printk(KERN_ERR "%s: Error getting clk\n", __func__);
return PTR_ERR(msm_hsl_port->clk);
}
if (unlikely(IS_ERR(msm_hsl_port->pclk))) {
printk(KERN_ERR "%s: Error getting pclk\n", __func__);
return PTR_ERR(msm_hsl_port->pclk);
}
uart_resource = platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"uartdm_resource");
if (unlikely(!uart_resource)) {
printk(KERN_ERR "getting uartdm_resource failed\n");
return -ENXIO;
}
port->mapbase = uart_resource->start;
port->irq = platform_get_irq(pdev, 0);
if (unlikely(port->irq < 0)) {
printk(KERN_ERR "%s: getting irq failed\n", __func__);
return -ENXIO;
}
device_set_wakeup_capable(&pdev->dev, 1);
platform_set_drvdata(pdev, port);
pm_runtime_enable(port->dev);
msm_hsl_debugfs_init(msm_hsl_port, pdev->id);
ret = uart_add_one_port(&msm_hsl_uart_driver, port);
return ret;
}
static int lc709203f_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct lc709203f_chip *chip;
int ret;
/* Required PEC functionality */
client->flags = client->flags | I2C_CLIENT_PEC;
/* Check if device exist or not */
ret = i2c_smbus_read_word_data(client, LC709203F_NUM_OF_THE_PARAM);
if (ret < 0) {
dev_err(&client->dev, "device is not responding, %d\n", ret);
return ret;
}
dev_info(&client->dev, "Device Params 0x%04x\n", ret);
chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
if (!chip)
return -ENOMEM;
chip->client = client;
if (client->dev.of_node) {
chip->pdata = devm_kzalloc(&client->dev,
sizeof(*chip->pdata), GFP_KERNEL);
if (!chip->pdata)
return -ENOMEM;
of_lc709203f_parse_platform_data(client, chip->pdata);
} else {
chip->pdata = client->dev.platform_data;
}
if (!chip->pdata)
return -ENODATA;
mutex_init(&chip->mutex);
chip->shutdown_complete = 0;
i2c_set_clientdata(client, chip);
if (chip->pdata->initial_rsoc) {
ret = lc709203f_write_word(chip->client,
LC709203F_INITIAL_RSOC, chip->pdata->initial_rsoc);
if (ret < 0) {
dev_err(&client->dev,
"INITIAL_RSOC write failed: %d\n", ret);
return ret;
}
dev_info(&client->dev, "initial-rsoc: 0x%04x\n",
chip->pdata->initial_rsoc);
}
ret = lc709203f_write_word(chip->client,
LC709203F_ALARM_LOW_CELL_RSOC, chip->pdata->alert_low_rsoc);
if (ret < 0) {
dev_err(&client->dev, "LOW_RSOC write failed: %d\n", ret);
return ret;
}
ret = lc709203f_write_word(chip->client,
LC709203F_ALARM_LOW_CELL_VOLT, chip->pdata->alert_low_voltage);
if (ret < 0) {
dev_err(&client->dev, "LOW_VOLT write failed: %d\n", ret);
return ret;
}
if (chip->pdata->appli_adjustment) {
ret = lc709203f_write_word(chip->client,
LC709203F_ADJUSTMENT_PACK_APPLI,
chip->pdata->appli_adjustment);
if (ret < 0) {
dev_err(&client->dev,
"ADJUSTMENT_APPLI write failed: %d\n", ret);
return ret;
}
}
if (chip->pdata->tz_name || !chip->pdata->thermistor_beta)
goto skip_thermistor_config;
if (chip->pdata->therm_adjustment) {
ret = lc709203f_write_word(chip->client,
LC709203F_ADJUSTMENT_PACK_THERM,
chip->pdata->therm_adjustment);
if (ret < 0) {
dev_err(&client->dev,
"ADJUSTMENT_THERM write failed: %d\n", ret);
return ret;
}
}
ret = lc709203f_write_word(chip->client,
LC709203F_THERMISTOR_B, chip->pdata->thermistor_beta);
if (ret < 0) {
dev_err(&client->dev, "THERMISTOR_B write failed: %d\n", ret);
return ret;
}
ret = lc709203f_write_word(chip->client, LC709203F_STATUS_BIT, 0x1);
if (ret < 0) {
dev_err(&client->dev, "STATUS_BIT write failed: %d\n", ret);
return ret;
}
skip_thermistor_config:
lc709203f_update_soc_voltage(chip);
chip->battery.name = "battery";
chip->battery.type = POWER_SUPPLY_TYPE_BATTERY;
chip->battery.get_property = lc709203f_get_property;
chip->battery.properties = lc709203f_battery_props;
chip->battery.num_properties = ARRAY_SIZE(lc709203f_battery_props);
chip->status = POWER_SUPPLY_STATUS_DISCHARGING;
chip->lasttime_status = POWER_SUPPLY_STATUS_DISCHARGING;
chip->charge_complete = 0;
/* Remove current property if it is not supported */
if (!chip->pdata->support_battery_current)
chip->battery.num_properties--;
ret = power_supply_register(&client->dev, &chip->battery);
if (ret) {
dev_err(&client->dev, "failed: power supply register\n");
goto error;
}
lc709203f_bgi.tz_name = chip->pdata->tz_name;
chip->bg_dev = battery_gauge_register(&client->dev, &lc709203f_bgi,
chip);
if (IS_ERR(chip->bg_dev)) {
ret = PTR_ERR(chip->bg_dev);
dev_err(&client->dev, "battery gauge register failed: %d\n",
ret);
goto bg_err;
}
INIT_DEFERRABLE_WORK(&chip->work, lc709203f_work);
schedule_delayed_work(&chip->work, 0);
lc709203f_debugfs_init(client);
if (client->irq) {
ret = devm_request_threaded_irq(&client->dev, client->irq,
NULL, lc709203f_irq,
IRQF_ONESHOT | IRQF_TRIGGER_FALLING,
dev_name(&client->dev), chip);
if (ret < 0) {
dev_err(&client->dev,
"%s: request IRQ %d fail, err = %d\n",
__func__, client->irq, ret);
client->irq = 0;
goto irq_reg_error;
}
}
device_set_wakeup_capable(&client->dev, 1);
dev_info(&client->dev, "Battery Voltage %dmV and SoC %d%%\n",
chip->vcell, chip->soc);
return 0;
irq_reg_error:
cancel_delayed_work_sync(&chip->work);
bg_err:
power_supply_unregister(&chip->battery);
error:
mutex_destroy(&chip->mutex);
return ret;
}
static int __init msm_serial_hsl_probe(struct platform_device *pdev)
{
struct msm_hsl_port *msm_hsl_port;
struct resource *uart_resource;
struct resource *gsbi_resource;
struct uart_port *port;
int ret;
if (unlikely(pdev->id < 0 || pdev->id >= UART_NR))
return -ENXIO;
printk(KERN_INFO "msm_serial_hsl: detected port #%d\n", pdev->id);
port = get_port_from_line(pdev->id);
port->dev = &pdev->dev;
msm_hsl_port = UART_TO_MSM(port);
if (msm_serial_hsl_has_gsbi()) {
gsbi_resource =
platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"gsbi_resource");
if (unlikely(!gsbi_resource))
return -ENXIO;
msm_hsl_port->clk = clk_get(&pdev->dev, "gsbi_uart_clk");
msm_hsl_port->pclk = clk_get(&pdev->dev, "gsbi_pclk");
} else {
msm_hsl_port->clk = clk_get(&pdev->dev, "uartdm_clk");
msm_hsl_port->pclk = NULL;
}
if (unlikely(IS_ERR(msm_hsl_port->clk))) {
printk(KERN_ERR "%s: Error getting clk\n", __func__);
return PTR_ERR(msm_hsl_port->clk);
}
if (unlikely(IS_ERR(msm_hsl_port->pclk))) {
printk(KERN_ERR "%s: Error getting pclk\n", __func__);
return PTR_ERR(msm_hsl_port->pclk);
}
/* Set up the MREG/NREG/DREG/MNDREG */
#ifdef CONFIG_LGE_FELICA
ret = clk_set_rate(msm_hsl_port->clk, 7372800);
if (ret) {
printk(KERN_WARNING "Error setting clock rate on UART\n");
return ret;
}
#else // [email protected] 30550g original, remove clk_set_rate
#endif
uart_resource = platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"uartdm_resource");
if (unlikely(!uart_resource)) {
printk(KERN_ERR "getting uartdm_resource failed\n");
return -ENXIO;
}
port->mapbase = uart_resource->start;
port->irq = platform_get_irq(pdev, 0);
if (unlikely(port->irq < 0)) {
printk(KERN_ERR "%s: getting irq failed\n", __func__);
return -ENXIO;
}
device_set_wakeup_capable(&pdev->dev, 1);
platform_set_drvdata(pdev, port);
pm_runtime_enable(port->dev);
ret = uart_add_one_port(&msm_hsl_uart_driver, port);
return ret;
}
static int __init tegra_uart_probe(struct platform_device *pdev)
{
struct tegra_uart_port *t;
struct uart_port *u;
struct tegra_uart_platform_data *pdata;
struct resource *resource;
struct resource *iomem;
int ret;
char name[64];
if (pdev->id < 0 || pdev->id > tegra_uart_driver.nr) {
pr_err("Invalid Uart instance (%d)\n", pdev->id);
return -ENODEV;
}
t = kzalloc(sizeof(struct tegra_uart_port), GFP_KERNEL);
if (!t) {
pr_err("%s: Failed to allocate memory\n", __func__);
return -ENOMEM;
}
u = &t->uport;
u->dev = &pdev->dev;
platform_set_drvdata(pdev, u);
u->line = pdev->id;
u->ops = &tegra_uart_ops;
u->type = PORT_TEGRA;
u->fifosize = 32;
pdata = u->dev->platform_data;
if (pdata && pdata->is_irda) {
dev_info(&pdev->dev, "Initialized UART %d as SIR PHY\n",
u->line);
t->is_irda = pdata->is_irda;
t->irda_init = pdata->irda_init;
t->irda_start = pdata->irda_start;
t->irda_mode_switch = pdata->irda_mode_switch;
t->irda_shutdown = pdata->irda_shutdown;
t->irda_remove = pdata->irda_remove;
if (t->irda_init)
t->irda_init();
}
resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (unlikely(!resource)) {
ret = -ENXIO;
goto fail;
}
u->mapbase = resource->start;
iomem = request_mem_region(u->mapbase, resource_size(resource),
pdev->name);
if (!iomem) {
dev_err(&pdev->dev, "UART region already claimed\n");
ret = -EBUSY;
goto fail;
}
u->membase = ioremap(iomem->start, resource_size(iomem));
if (unlikely(!u->membase)) {
dev_err(&pdev->dev, "Cannot ioremap UART region\n");
ret = -ENOMEM;
goto fail;
}
u->iotype = UPIO_MEM32;
u->irq = platform_get_irq(pdev, 0);
if (unlikely((int)(u->irq) < 0)) {
ret = -ENXIO;
goto fail;
}
device_set_wakeup_capable(u->dev, 1);
u->regshift = 2;
t->clk = clk_get(&pdev->dev, NULL);
if (IS_ERR_OR_NULL(t->clk)) {
dev_err(&pdev->dev, "Couldn't get the clock\n");
ret = -ENODEV;
goto fail;
}
ret = uart_add_one_port(&tegra_uart_driver, u);
if (ret) {
pr_err("%s: Failed(%d) to add uart port %s%d\n",
__func__, ret, tegra_uart_driver.dev_name, u->line);
goto fail;
}
snprintf(name, sizeof(name), "tegra_hsuart_%d", u->line);
pr_info("Registered UART port %s%d\n",
tegra_uart_driver.dev_name, u->line);
t->uart_state = TEGRA_UART_CLOSED;
if (!RX_FORCE_PIO) {
ret = tegra_uart_init_rx_dma_buffer(t);
if (ret < 0) {
pr_err("%s: Failed(%d) to allocate rx dma buffer "
"%s%d\n", __func__, ret,
tegra_uart_driver.dev_name, u->line);
goto rx_dma_buff_fail;
}
}
tasklet_init(&t->tlet, tegra_uart_tasklet_action, (unsigned long) t);
pm_runtime_enable((&t->uport)->dev);
return ret;
rx_dma_buff_fail:
uart_remove_one_port(&tegra_uart_driver, u);
fail:
if (t->clk)
clk_put(t->clk);
platform_set_drvdata(pdev, NULL);
kfree(t);
return ret;
}
static void hsicdev_add(struct usb_device *udev)
{
pr_debug("Notify HSIC add device\n");
if (is_ush_hsic(udev) == 0) {
pr_debug("Not a USH HSIC device\n");
return;
}
/* Root hub */
if (!udev->parent) {
if (udev->speed == USB_SPEED_HIGH) {
pr_debug("%s rh device set\n", __func__);
hsic.rh_dev = udev;
pr_debug("%s Disable autosuspend\n", __func__);
pm_runtime_set_autosuspend_delay(&udev->dev,
hsic.bus_inactivityDuration);
usb_disable_autosuspend(udev);
hsic.autosuspend_enable = 0;
}
} else {
if (udev->portnum != HSIC_USH_PORT) {
pr_debug("%s ignore ush ports %d\n",
__func__, udev->portnum);
return;
}
/* Modem devices */
hsic.port_disconnect = 0;
hsic.modem_dev = udev;
pm_runtime_set_autosuspend_delay
(&udev->dev, hsic.port_inactivityDuration);
if (hsic.remoteWakeup_enable) {
pr_debug("%s Modem dev remote wakeup enabled\n",
__func__);
device_set_wakeup_capable
(&hsic.modem_dev->dev, 1);
device_set_wakeup_capable
(&hsic.rh_dev->dev, 1);
} else {
pr_debug("%s Modem dev remote wakeup disabled\n",
__func__);
device_set_wakeup_capable
(&hsic.modem_dev->dev, 0);
device_set_wakeup_capable
(&hsic.rh_dev->dev, 0);
}
hsic.autosuspend_enable = HSIC_AUTOSUSPEND;
if (hsic.autosuspend_enable) {
pr_debug("%s----> enable autosuspend\n",
__func__);
usb_enable_autosuspend(hsic.modem_dev);
usb_enable_autosuspend(hsic.rh_dev);
hsic_wakeup_irq_init();
}
if (hsic.autosuspend_enable == 0) {
pr_debug("%s Modem dev autosuspend disable\n",
__func__);
usb_disable_autosuspend(hsic.modem_dev);
usb_disable_autosuspend(hsic.rh_dev);
}
}
}
