#include "de_clock.h"
#define disp_clk_inf(clk_id, clk_name, clk_src_name, clk_freq) {.id = clk_id, .name = clk_name, .src_name = clk_src_name, .freq = clk_freq}
__disp_clk_t disp_clk_pll_tbl[] =
{
disp_clk_inf(SYS_CLK_PLL3, "pll3", NULL, 297000000),
disp_clk_inf(SYS_CLK_PLL10, "pll10", NULL, 468000000),
disp_clk_inf(SYS_CLK_MIPIPLL, "pll_mipi", "pll3", 0),
};
__disp_clk_t disp_clk_mod_tbl[] =
{
disp_clk_inf(MOD_CLK_DEBE0, "debe0", "pll10", 117000000),
disp_clk_inf(MOD_CLK_DEFE0, "defe0", "pll10", 234000000),
disp_clk_inf(MOD_CLK_LCD0CH0, "lcd0ch0", "pll_mipi", 0),
disp_clk_inf(MOD_CLK_MIPIDSIS, "mipidsi", "pll_mipi", 297000000),
disp_clk_inf(MOD_CLK_IEPDRC0, "drc0", "pll10", 156000000),
disp_clk_inf(MOD_CLK_LVDS, "lvds", NULL, 0),
};
DE_TOP_CFG(MOD_CLK_DEFE0, 396000000, 0xf3000008, 0, 0xf300000c, 0, 0xf3000004, 0, 0xf3000000, 0, 0xf3000020, 0)
DE_TOP_CFG(MOD_CLK_DEFE1, 396000000, 0xf3000008, 1, 0xf300000c, 1, 0xf3000004, 1, 0xf3000000, 1, 0xf3000020, 4)
DE_TOP_CFG(MOD_CLK_DEFE2, 396000000, 0xf3000008, 2, 0xf300000c, 2, 0xf3000004, 2, 0xf3000000, 2, 0xf3000020, 8)
DE_TOP_CFG(MOD_CLK_IEPDEU0, 0, 0xf3000008, 4, 0xf300000c, 4, 0xf3000004, 4, 0xf3000000, 4, 0x0, 32)
DE_TOP_CFG(MOD_CLK_IEPDEU1, 0, 0xf3000008, 5, 0xf300000c, 5, 0xf3000004, 5, 0xf3000000, 5, 0x0, 32)
DE_TOP_CFG(MOD_CLK_IEPDRC0, 0, 0xf3000008, 12, 0xf300000c, 12, 0xf3000004, 12, 0xf3000000, 12, 0x0, 32)
DE_TOP_CFG(MOD_CLK_IEPDRC1, 0, 0xf3000008, 13, 0xf300000c, 13, 0xf3000004, 13, 0xf3000000, 13, 0x0, 32)
DE_TOP_CFG(MOD_CLK_MERGE, 0, 0x0 , 32, 0xf300000c, 20, 0x0, 32, 0xf3000000, 20, 0x0, 32)
};
#define disp_clk_inf(clk_id, clk_name, clk_src_name, clk_freq)\
{.id = clk_id, .name = clk_name, .src_name = clk_src_name, .freq = clk_freq}
__disp_clk_t disp_clk_pll_tbl[] =
{
disp_clk_inf(SYS_CLK_PLL7, "pll7", NULL, 0),
disp_clk_inf(SYS_CLK_PLL8, "pll8", NULL, 297000000),
disp_clk_inf(SYS_CLK_PLL10, "pll10", NULL, 0),
};
__disp_clk_t disp_clk_mod_tbl[] =
{
disp_clk_inf(MOD_CLK_DE_TOP, "de", "pll10", 396000000),
disp_clk_inf(MOD_CLK_LCD0CH0, "lcd0", "pll7", 0),
disp_clk_inf(MOD_CLK_LCD0CH1, "lcd0", "pll7", 0),
disp_clk_inf(MOD_CLK_LCD1CH0, "lcd1", "pll7", 0),
disp_clk_inf(MOD_CLK_LCD1CH1, "lcd1", "pll8", 0),
disp_clk_inf(MOD_CLK_HDMI, "hdmi", "pll8", 0),
disp_clk_inf(MOD_CLK_HDMI_DDC, "hdmi_slow", "pll8", 0),
disp_clk_inf(MOD_CLK_MIPIDSIS, "mipi_dsi0", "pll7", 0),
disp_clk_inf(MOD_CLK_MIPIDSIP, "mipi_dsi1", "pll7", 0),
* Version : V1.00
* Date : 2011/3/25 20:25
* Description :
* Update : date author version notes
********************************************************************************
*/
#include "OSAL.h"
#include "OSAL_Clock.h"
#ifndef __OSAL_CLOCK_MASK__
#define disp_clk_inf(clk_id, clk_name) {.id = clk_id, .name = clk_name}
__disp_clk_t disp_clk_tbl[] =
{
disp_clk_inf(SYS_CLK_PLL3, CLK_SYS_PLL3 ),
disp_clk_inf(SYS_CLK_PLL7, CLK_SYS_PLL7 ),
disp_clk_inf(SYS_CLK_PLL3X2, CLK_SYS_PLL3X2 ),
disp_clk_inf(SYS_CLK_PLL5P, CLK_SYS_PLL5P ),
disp_clk_inf(SYS_CLK_PLL6, CLK_SYS_PLL6 ),
disp_clk_inf(SYS_CLK_PLL6M, CLK_SYS_PLL6M ),
disp_clk_inf(SYS_CLK_PLL7X2, CLK_SYS_PLL7X2 ),
disp_clk_inf(MOD_CLK_DEBE0, CLK_MOD_DEBE0 ),
disp_clk_inf(MOD_CLK_DEBE1, CLK_MOD_DEBE1 ),
disp_clk_inf(MOD_CLK_DEFE0, CLK_MOD_DEFE0 ),
disp_clk_inf(MOD_CLK_DEFE1, CLK_MOD_DEFE1 ),
disp_clk_inf(MOD_CLK_LCD0CH0, CLK_MOD_LCD0CH0 ),
disp_clk_inf(MOD_CLK_LCD0CH1_S1,CLK_MOD_LCD0CH1_S1 ),
disp_clk_inf(MOD_CLK_LCD0CH1_S2,CLK_MOD_LCD0CH1_S2 ),
disp_clk_inf(MOD_CLK_LCD1CH0, CLK_MOD_LCD1CH0 ),
********************************************************************************
*/
#include "OSAL.h"
#include "OSAL_Clock.h"
#include <linux/clk/sunxi.h>
#include <linux/clk-private.h>
#ifndef __OSAL_CLOCK_MASK__
#define disp_clk_inf(clk_id, clk_name) {.id = clk_id, .name = clk_name}
#if defined CONFIG_ARCH_SUN8IW1P1
__disp_clk_t disp_clk_tbl[] =
{
disp_clk_inf(SYS_CLK_PLL3, "pll3" ),
disp_clk_inf(SYS_CLK_PLL7, "pll7" ),
disp_clk_inf(SYS_CLK_PLL9, "pll9" ),
disp_clk_inf(SYS_CLK_PLL10, "pll10" ),
disp_clk_inf(SYS_CLK_PLL3X2, "pll3x2" ),
disp_clk_inf(SYS_CLK_PLL6, "pll6" ),
disp_clk_inf(SYS_CLK_PLL6x2, "pll6x2" ),
disp_clk_inf(SYS_CLK_PLL7X2, "pll7x2" ),
disp_clk_inf(SYS_CLK_MIPIPLL, "pll_mipi" ),
disp_clk_inf(MOD_CLK_DEBE0, "debe0" ),
disp_clk_inf(MOD_CLK_DEBE1, "debe1" ),
disp_clk_inf(MOD_CLK_DEFE0, "defe0" ),
disp_clk_inf(MOD_CLK_DEFE1, "defe1" ),
disp_clk_inf(MOD_CLK_LCD0CH0, "lcd0ch0" ),
disp_clk_inf(MOD_CLK_LCD0CH1, "lcd0ch1" ),
* Version : V1.00
* Date : 2011/3/25 20:25
* Description :
* Update : date author version notes
********************************************************************************
*/
#include "OSAL.h"
#include "OSAL_Clock.h"
#ifndef __OSAL_CLOCK_MASK__
#define disp_clk_inf(clk_id, clk_name) {.id = clk_id, .name = clk_name}
__disp_clk_t disp_clk_tbl[] =
{
disp_clk_inf(SYS_CLK_PLL3, CLK_SYS_PLL3 ),
disp_clk_inf(SYS_CLK_PLL7, CLK_SYS_PLL7 ),
disp_clk_inf(SYS_CLK_PLL9, CLK_SYS_PLL9 ),
disp_clk_inf(SYS_CLK_PLL10, CLK_SYS_PLL10 ),
disp_clk_inf(SYS_CLK_PLL3X2, CLK_SYS_PLL3X2 ),
disp_clk_inf(SYS_CLK_PLL6, CLK_SYS_PLL6 ),
disp_clk_inf(SYS_CLK_PLL6x2, CLK_SYS_PLL6X2 ),
disp_clk_inf(SYS_CLK_PLL7X2, CLK_SYS_PLL7X2 ),
disp_clk_inf(SYS_CLK_MIPIPLL, CLK_SYS_MIPI_PLL ),
disp_clk_inf(MOD_CLK_DEBE0, CLK_MOD_DEBE0 ),
disp_clk_inf(MOD_CLK_DEBE1, CLK_MOD_DEBE1 ),
disp_clk_inf(MOD_CLK_DEFE0, CLK_MOD_DEFE0 ),
disp_clk_inf(MOD_CLK_DEFE1, CLK_MOD_DEFE1 ),
disp_clk_inf(MOD_CLK_DEMIX, CLK_MOD_DEMP ),
disp_clk_inf(MOD_CLK_LCD0CH0, CLK_MOD_LCD0CH0 ),
