Beispiel #1
0
static void
finish_erasing_chip(device *me,
		    hw_eeprom_device *eeprom)
{
  DTRACE(eeprom, ("finish-erasing-chip\n"));
  memset(eeprom->memory, 0xff, eeprom->sizeof_memory);
  dump_eeprom(me, eeprom);
}
Beispiel #2
0
/**
 *	smc911x_eeprom - our application's main() function
 */
int smc911x_eeprom(int argc, char *argv[])
{
	/* Print the ABI version */
	app_startup(argv);
	if (XF_VERSION != get_version()) {
		printf("Expects ABI version %d\n", XF_VERSION);
		printf("Actual U-Boot ABI version %lu\n", get_version());
		printf("Can't run\n\n");
		return 1;
	}

	/* Initialize the MAC/EEPROM somewhat */
	puts("\n");
	if (smc911x_init())
		return 1;

	/* Dump helpful usage information */
	puts("\n");
	usage();
	puts("\n");

	while (1) {
		char *line;

		/* Send the prompt and wait for a line */
		puts("eeprom> ");
		line = getline();

		/* Got a ctrl+c */
		if (!line)
			return 0;

		/* Eat leading space */
		line = skip_space(line);

		/* Empty line, try again */
		if (!line[0])
			continue;

		/* Only accept 1 letter commands */
		if (line[0] && line[1] && line[1] != ' ' && line[1] != '\t')
			goto unknown_cmd;

		/* Now parse the command */
		switch (line[0]) {
		case 'W': write_stuff(line);  break;
		case 'D': dump_eeprom();      break;
		case 'M': dump_regs();        break;
		case 'C': copy_from_eeprom(); break;
		case 'P': print_macaddr();    break;
		unknown_cmd:
		default:  puts("ERROR: Unknown command!\n\n");
		case '?':
		case 'H': usage();            break;
		case 'Q': return 0;
		}
	}
}
Beispiel #3
0
static void
finish_programming_byte(device *me,
			hw_eeprom_device *eeprom)
{
  DTRACE(eeprom, ("finish-programming-byte - address 0x%lx, byte 0x%lx\n",
		  (unsigned long)eeprom->byte_program_address,
		  (unsigned long)eeprom->byte_program_byte));
  eeprom->memory[eeprom->byte_program_address] = eeprom->byte_program_byte;
  dump_eeprom(me, eeprom);
}
Beispiel #4
0
static void
finish_erasing_sector(device *me,
		      hw_eeprom_device *eeprom)
{
  int sector;
  DTRACE(eeprom, ("finish-erasing-sector\n"));
  for (sector = 0; sector < eeprom->nr_sectors; sector++) {
    if (eeprom->sectors[sector]) {
      eeprom->sectors[sector] = 0;
      memset(eeprom->memory + sector * eeprom->sizeof_sector,
	     0xff, eeprom->sizeof_sector);
    }
  }
  dump_eeprom(me, eeprom);
}
Beispiel #5
0
static int
hw_eeprom_instance_write(device_instance *instance,
			 const void *buf,
			 unsigned_word len)
{
  hw_eeprom_instance *data = device_instance_data(instance);
  int i;
  if (data->eeprom->state != read_reset)
    DITRACE(eeprom, ("eeprom not idle during instance write\n"));
  for (i = 0; i < len; i++) {
    data->eeprom->memory[data->pos] = ((unsigned8*)buf)[i];
    data->pos = (data->pos + 1) % data->eeprom->sizeof_memory;
  }
  dump_eeprom(data->me, data->eeprom);
  return len;
}
Beispiel #6
0
static int do_geeprom(int fd, struct ifreq *ifr)
{
	int err;
	struct ethtool_drvinfo drvinfo;
	struct ethtool_eeprom *eeprom;

	drvinfo.cmd = ETHTOOL_GDRVINFO;
	ifr->ifr_data = (caddr_t)&drvinfo;
	err = ioctl(fd, SIOCETHTOOL, ifr);
	if (err < 0) {
		perror("Cannot get driver information");
		return 74;
	}

	if (geeprom_length <= 0)
		geeprom_length = drvinfo.eedump_len;

	if (drvinfo.eedump_len < geeprom_offset + geeprom_length)
		geeprom_length = drvinfo.eedump_len - geeprom_offset;

	eeprom = calloc(1, sizeof(*eeprom)+geeprom_length);
	if (!eeprom) {
		perror("Cannot allocate memory for EEPROM data");
		return 75;
	}
	eeprom->cmd = ETHTOOL_GEEPROM;
	eeprom->len = geeprom_length;
	eeprom->offset = geeprom_offset;
	ifr->ifr_data = (caddr_t)eeprom;
	err = ioctl(fd, SIOCETHTOOL, ifr);
	if (err < 0) {
		perror("Cannot get EEPROM data");
		free(eeprom);
		return 74;
	}
	err = dump_eeprom(&drvinfo, eeprom);
	free(eeprom);

	return err;
}
Beispiel #7
0
static int __devinit myri_sbus_probe(struct platform_device *op)
{
	struct device_node *dp = op->dev.of_node;
	static unsigned version_printed;
	struct net_device *dev;
	struct myri_eth *mp;
	const void *prop;
	static int num;
	int i, len;

	DET(("myri_ether_init(%p,%d):\n", op, num));
	dev = alloc_etherdev(sizeof(struct myri_eth));
	if (!dev)
		return -ENOMEM;

	if (version_printed++ == 0)
;

	SET_NETDEV_DEV(dev, &op->dev);

	mp = netdev_priv(dev);
	spin_lock_init(&mp->irq_lock);
	mp->myri_op = op;

	/* Clean out skb arrays. */
	for (i = 0; i < (RX_RING_SIZE + 1); i++)
		mp->rx_skbs[i] = NULL;

	for (i = 0; i < TX_RING_SIZE; i++)
		mp->tx_skbs[i] = NULL;

	/* First check for EEPROM information. */
	prop = of_get_property(dp, "myrinet-eeprom-info", &len);

	if (prop)
		memcpy(&mp->eeprom, prop, sizeof(struct myri_eeprom));
	if (!prop) {
		/* No eeprom property, must cook up the values ourselves. */
		DET(("No EEPROM: "));
		mp->eeprom.bus_type = BUS_TYPE_SBUS;
		mp->eeprom.cpuvers =
			of_getintprop_default(dp, "cpu_version", 0);
		mp->eeprom.cval =
			of_getintprop_default(dp, "clock_value", 0);
		mp->eeprom.ramsz = of_getintprop_default(dp, "sram_size", 0);
		if (!mp->eeprom.cpuvers)
			mp->eeprom.cpuvers = CPUVERS_2_3;
		if (mp->eeprom.cpuvers < CPUVERS_3_0)
			mp->eeprom.cval = 0;
		if (!mp->eeprom.ramsz)
			mp->eeprom.ramsz = (128 * 1024);

		prop = of_get_property(dp, "myrinet-board-id", &len);
		if (prop)
			memcpy(&mp->eeprom.id[0], prop, 6);
		else
			set_boardid_from_idprom(mp, num);

		prop = of_get_property(dp, "fpga_version", &len);
		if (prop)
			memcpy(&mp->eeprom.fvers[0], prop, 32);
		else
			memset(&mp->eeprom.fvers[0], 0, 32);

		if (mp->eeprom.cpuvers == CPUVERS_4_1) {
			if (mp->eeprom.ramsz == (128 * 1024))
				mp->eeprom.ramsz = (256 * 1024);
			if ((mp->eeprom.cval == 0x40414041) ||
			    (mp->eeprom.cval == 0x90449044))
				mp->eeprom.cval = 0x50e450e4;
		}
	}
#ifdef DEBUG_DETECT
	dump_eeprom(mp);
#endif

	for (i = 0; i < 6; i++)
		dev->dev_addr[i] = mp->eeprom.id[i];

	determine_reg_space_size(mp);

	/* Map in the MyriCOM register/localram set. */
	if (mp->eeprom.cpuvers < CPUVERS_4_0) {
		/* XXX Makes no sense, if control reg is non-existent this
		 * XXX driver cannot function at all... maybe pre-4.0 is
		 * XXX only a valid version for PCI cards?  Ask feldy...
		 */
		DET(("Mapping regs for cpuvers < CPUVERS_4_0\n"));
		mp->regs = of_ioremap(&op->resource[0], 0,
				      mp->reg_size, "MyriCOM Regs");
		if (!mp->regs) {
;
			goto err;
		}
		mp->lanai = mp->regs + (256 * 1024);
		mp->lregs = mp->lanai + (0x10000 * 2);
	} else {
		DET(("Mapping regs for cpuvers >= CPUVERS_4_0\n"));
		mp->cregs = of_ioremap(&op->resource[0], 0,
				       PAGE_SIZE, "MyriCOM Control Regs");
		mp->lregs = of_ioremap(&op->resource[0], (256 * 1024),
					 PAGE_SIZE, "MyriCOM LANAI Regs");
		mp->lanai = of_ioremap(&op->resource[0], (512 * 1024),
				       mp->eeprom.ramsz, "MyriCOM SRAM");
	}
	DET(("Registers mapped: cregs[%p] lregs[%p] lanai[%p]\n",
	     mp->cregs, mp->lregs, mp->lanai));

	if (mp->eeprom.cpuvers >= CPUVERS_4_0)
		mp->shmem_base = 0xf000;
	else
		mp->shmem_base = 0x8000;

	DET(("Shared memory base is %04x, ", mp->shmem_base));

	mp->shmem = (struct myri_shmem __iomem *)
		(mp->lanai + (mp->shmem_base * 2));
	DET(("shmem mapped at %p\n", mp->shmem));

	mp->rqack	= &mp->shmem->channel.recvqa;
	mp->rq		= &mp->shmem->channel.recvq;
	mp->sq		= &mp->shmem->channel.sendq;

	/* Reset the board. */
	DET(("Resetting LANAI\n"));
	myri_reset_off(mp->lregs, mp->cregs);
	myri_reset_on(mp->cregs);

	/* Turn IRQ's off. */
	myri_disable_irq(mp->lregs, mp->cregs);

	/* Reset once more. */
	myri_reset_on(mp->cregs);

	/* Get the supported DVMA burst sizes from our SBUS. */
	mp->myri_bursts = of_getintprop_default(dp->parent,
						"burst-sizes", 0x00);
	if (!sbus_can_burst64())
		mp->myri_bursts &= ~(DMA_BURST64);

	DET(("MYRI bursts %02x\n", mp->myri_bursts));

	/* Encode SBUS interrupt level in second control register. */
	i = of_getintprop_default(dp, "interrupts", 0);
	if (i == 0)
		i = 4;
	DET(("prom_getint(interrupts)==%d, irqlvl set to %04x\n",
	     i, (1 << i)));

	sbus_writel((1 << i), mp->cregs + MYRICTRL_IRQLVL);

	mp->dev = dev;
	dev->watchdog_timeo = 5*HZ;
	dev->irq = op->archdata.irqs[0];
	dev->netdev_ops = &myri_ops;

	/* Register interrupt handler now. */
	DET(("Requesting MYRIcom IRQ line.\n"));
	if (request_irq(dev->irq, myri_interrupt,
			IRQF_SHARED, "MyriCOM Ethernet", (void *) dev)) {
;
		goto err;
	}

	dev->mtu		= MYRINET_MTU;
	dev->header_ops		= &myri_header_ops;

	dev->hard_header_len	= (ETH_HLEN + MYRI_PAD_LEN);

	/* Load code onto the LANai. */
	DET(("Loading LANAI firmware\n"));
	if (myri_load_lanai(mp)) {
;
		goto err_free_irq;
	}

	if (register_netdev(dev)) {
;
		goto err_free_irq;
	}

	dev_set_drvdata(&op->dev, mp);

	num++;

//	printk("%s: MyriCOM MyriNET Ethernet %pM\n",
;

	return 0;

err_free_irq:
	free_irq(dev->irq, dev);
err:
	/* This will also free the co-allocated private data*/
	free_netdev(dev);
	return -ENODEV;
}
Beispiel #8
0
static int __init myri_ether_init(struct net_device *dev, struct sbus_dev *sdev, int num)
{
	static unsigned version_printed = 0;
	struct myri_eth *mp;
	unsigned char prop_buf[32];
	int i;

	DET(("myri_ether_init(%p,%p,%d):\n", dev, sdev, num));
	dev = init_etherdev(0, sizeof(struct myri_eth));

	if (version_printed++ == 0)
		printk(version);

	printk("%s: MyriCOM MyriNET Ethernet ", dev->name);

	mp = (struct myri_eth *) dev->priv;
	mp->myri_sdev = sdev;

	/* Clean out skb arrays. */
	for (i = 0; i < (RX_RING_SIZE + 1); i++)
		mp->rx_skbs[i] = NULL;

	for (i = 0; i < TX_RING_SIZE; i++)
		mp->tx_skbs[i] = NULL;

	/* First check for EEPROM information. */
	i = prom_getproperty(sdev->prom_node, "myrinet-eeprom-info",
			     (char *)&mp->eeprom, sizeof(struct myri_eeprom));
	DET(("prom_getprop(myrinet-eeprom-info) returns %d\n", i));
	if (i == 0 || i == -1) {
		/* No eeprom property, must cook up the values ourselves. */
		DET(("No EEPROM: "));
		mp->eeprom.bus_type = BUS_TYPE_SBUS;
		mp->eeprom.cpuvers = prom_getintdefault(sdev->prom_node,"cpu_version",0);
		mp->eeprom.cval = prom_getintdefault(sdev->prom_node,"clock_value",0);
		mp->eeprom.ramsz = prom_getintdefault(sdev->prom_node,"sram_size",0);
		DET(("cpuvers[%d] cval[%d] ramsz[%d]\n", mp->eeprom.cpuvers,
		     mp->eeprom.cval, mp->eeprom.ramsz));
		if (mp->eeprom.cpuvers == 0) {
			DET(("EEPROM: cpuvers was zero, setting to %04x\n",CPUVERS_2_3));
			mp->eeprom.cpuvers = CPUVERS_2_3;
		}
		if (mp->eeprom.cpuvers < CPUVERS_3_0) {
			DET(("EEPROM: cpuvers < CPUVERS_3_0, clockval set to zero.\n"));
			mp->eeprom.cval = 0;
		}
		if (mp->eeprom.ramsz == 0) {
			DET(("EEPROM: ramsz == 0, setting to 128k\n"));
			mp->eeprom.ramsz = (128 * 1024);
		}
		i = prom_getproperty(sdev->prom_node, "myrinet-board-id",
				     &prop_buf[0], 10);
		DET(("EEPROM: prom_getprop(myrinet-board-id) returns %d\n", i));
		if ((i != 0) && (i != -1))
			memcpy(&mp->eeprom.id[0], &prop_buf[0], 6);
		else
			set_boardid_from_idprom(mp, num);
		i = prom_getproperty(sdev->prom_node, "fpga_version",
				     &mp->eeprom.fvers[0], 32);
		DET(("EEPROM: prom_getprop(fpga_version) returns %d\n", i));
		if (i == 0 || i == -1)
			memset(&mp->eeprom.fvers[0], 0, 32);

		if (mp->eeprom.cpuvers == CPUVERS_4_1) {
			DET(("EEPROM: cpuvers CPUVERS_4_1, "));
			if (mp->eeprom.ramsz == (128 * 1024)) {
				DET(("ramsize 128k, setting to 256k, "));
				mp->eeprom.ramsz = (256 * 1024);
			}
			if ((mp->eeprom.cval==0x40414041)||(mp->eeprom.cval==0x90449044)){
				DET(("changing cval from %08x to %08x ",
				     mp->eeprom.cval, 0x50e450e4));
				mp->eeprom.cval = 0x50e450e4;
			}
			DET(("\n"));
		}
	}
#ifdef DEBUG_DETECT
	dump_eeprom(mp);
#endif

	for (i = 0; i < 6; i++)
		printk("%2.2x%c",
		       dev->dev_addr[i] = mp->eeprom.id[i],
		       i == 5 ? ' ' : ':');
	printk("\n");

	determine_reg_space_size(mp);

	/* Map in the MyriCOM register/localram set. */
	if (mp->eeprom.cpuvers < CPUVERS_4_0) {
		/* XXX Makes no sense, if control reg is non-existant this
		 * XXX driver cannot function at all... maybe pre-4.0 is
		 * XXX only a valid version for PCI cards?  Ask feldy...
		 */
		DET(("Mapping regs for cpuvers < CPUVERS_4_0\n"));
		mp->regs = sbus_ioremap(&sdev->resource[0], 0,
					mp->reg_size, "MyriCOM Regs");
		if (!mp->regs) {
			printk("MyriCOM: Cannot map MyriCOM registers.\n");
			return -ENODEV;
		}
		mp->lanai = (unsigned short *) (mp->regs + (256 * 1024));
		mp->lanai3 = (unsigned int *) mp->lanai;
		mp->lregs = (unsigned long) &mp->lanai[0x10000];
	} else {
		DET(("Mapping regs for cpuvers >= CPUVERS_4_0\n"));
		mp->cregs = sbus_ioremap(&sdev->resource[0], 0,
					 PAGE_SIZE, "MyriCOM Control Regs");
		mp->lregs = sbus_ioremap(&sdev->resource[0], (256 * 1024),
					 PAGE_SIZE, "MyriCOM LANAI Regs");
		mp->lanai = (unsigned short *)
			sbus_ioremap(&sdev->resource[0], (512 * 1024),
				     mp->eeprom.ramsz, "MyriCOM SRAM");
		mp->lanai3 = (unsigned int *) mp->lanai;
	}
	DET(("Registers mapped: cregs[%lx] lregs[%lx] lanai[%p] lanai3[%p]\n",
	     mp->cregs, mp->lregs, mp->lanai, mp->lanai3));

	if (mp->eeprom.cpuvers >= CPUVERS_4_0)
		mp->shmem_base = 0xf000;
	else
		mp->shmem_base = 0x8000;

	DET(("Shared memory base is %04x, ", mp->shmem_base));

	mp->shmem = (struct myri_shmem *) &mp->lanai[mp->shmem_base];
	DET(("shmem mapped at %p\n", mp->shmem));

	mp->rqack	= &mp->shmem->channel.recvqa;
	mp->rq		= &mp->shmem->channel.recvq;
	mp->sq		= &mp->shmem->channel.sendq;

	/* Reset the board. */
	DET(("Resetting LANAI\n"));
	myri_reset_off(mp->lregs, mp->cregs);
	myri_reset_on(mp->cregs);

	/* Turn IRQ's off. */
	myri_disable_irq(mp->lregs, mp->cregs);

	/* Reset once more. */
	myri_reset_on(mp->cregs);

	/* Get the supported DVMA burst sizes from our SBUS. */
	mp->myri_bursts = prom_getintdefault(mp->myri_sdev->bus->prom_node,
					     "burst-sizes", 0x00);

	if (!sbus_can_burst64(sdev))
		mp->myri_bursts &= ~(DMA_BURST64);

	DET(("MYRI bursts %02x\n", mp->myri_bursts));

	/* Encode SBUS interrupt level in second control register. */
	i = prom_getint(sdev->prom_node, "interrupts");
	if (i == 0)
		i = 4;
	DET(("prom_getint(interrupts)==%d, irqlvl set to %04x\n",
	     i, (1 << i)));

	sbus_writel((1 << i), mp->cregs + MYRICTRL_IRQLVL);

	mp->dev = dev;
	dev->open = &myri_open;
	dev->stop = &myri_close;
	dev->hard_start_xmit = &myri_start_xmit;
	dev->tx_timeout = &myri_tx_timeout;
	dev->watchdog_timeo = 5*HZ;
	dev->get_stats = &myri_get_stats;
	dev->set_multicast_list = &myri_set_multicast;
	dev->irq = sdev->irqs[0];

	/* Register interrupt handler now. */
	DET(("Requesting MYRIcom IRQ line.\n"));
	if (request_irq(dev->irq, &myri_interrupt,
			SA_SHIRQ, "MyriCOM Ethernet", (void *) dev)) {
		printk("MyriCOM: Cannot register interrupt handler.\n");
		return -ENODEV;
	}

	DET(("ether_setup()\n"));
	ether_setup(dev);

	dev->mtu		= MYRINET_MTU;
	dev->change_mtu		= myri_change_mtu;
	dev->hard_header	= myri_header;
	dev->rebuild_header	= myri_rebuild_header;
	dev->hard_header_len	= (ETH_HLEN + MYRI_PAD_LEN);
	dev->hard_header_cache 	= myri_header_cache;
	dev->header_cache_update= myri_header_cache_update;

	/* Load code onto the LANai. */
	DET(("Loading LANAI firmware\n"));
	myri_load_lanai(mp);

#ifdef MODULE
	dev->ifindex = dev_new_index();
	mp->next_module = root_myri_dev;
	root_myri_dev = mp;
#endif
	return 0;
}
Beispiel #9
0
void main (void) 
{
   char keypress;

   WDTCN = 0xde;                    // disable watchdog timer
   WDTCN = 0xad;


   SYSCLK_Init ();                     // initialize oscillator
   //PORT_Init ();                       // initialize crossbar and GPIO
   UART0_Init ();                      // initialize UART0

   //OSCICN |= 0x03;                  // Set internal oscillator to highest setting
                                    // (16 MHz)


   XBR0 = 0x05;                     // Route SMBus to GPIO pins through crossbar
   XBR2 = 0x44;                     // Enable crossbar and weak pull-ups
   P1MDOUT = 0x03;

   SMB0CN = 0x44;                   // Enable SMBus with ACKs on acknowledge 
                                    // cycle
   SMB0CR = -80;                    // SMBus clock rate = 100kHz.

   EIE1 |= 2;                       // SMBus interrupt enable
   EA = 1;                          // Global interrupt enable

   SM_BUSY = 0;                     // Free SMBus for first transfer.
   

   //SMBus_Init();
   //Timer3_Init();
   //Interrupts_Init();
   //SI = 0;

   printf ("EE587 Experiment #3\n");
   printf ("Initialization Complete...\n");
  
   while (1) {

       printf("what would you like to do? (d,b,r,w):");
    
       keypress = getchar();

       printf("\n");

    
       switch(keypress) {
           case 'd': dump_eeprom(); break;
           case 'b': block_fill(); break;
           case 'r': read_eeprom(); break;
           case 'w': write_eeprom(); break;
           case ' ':;
           default:
               printf("Invalid Command '%c'\n",keypress);
               break;
       }
    
    
    
    }  // while(1)
    
}  // main
Beispiel #10
0
static int __devinit myri_sbus_probe(struct of_device *op, const struct of_device_id *match)
{
	struct device_node *dp = op->node;
	static unsigned version_printed;
	struct net_device *dev;
	struct myri_eth *mp;
	const void *prop;
	static int num;
	int i, len;

	DET(("myri_ether_init(%p,%d):\n", op, num));
	dev = alloc_etherdev(sizeof(struct myri_eth));
	if (!dev)
		return -ENOMEM;

	if (version_printed++ == 0)
		printk(version);

	SET_NETDEV_DEV(dev, &op->dev);

	mp = netdev_priv(dev);
	spin_lock_init(&mp->irq_lock);
	mp->myri_op = op;

	
	for (i = 0; i < (RX_RING_SIZE + 1); i++)
		mp->rx_skbs[i] = NULL;

	for (i = 0; i < TX_RING_SIZE; i++)
		mp->tx_skbs[i] = NULL;

	
	prop = of_get_property(dp, "myrinet-eeprom-info", &len);

	if (prop)
		memcpy(&mp->eeprom, prop, sizeof(struct myri_eeprom));
	if (!prop) {
		
		DET(("No EEPROM: "));
		mp->eeprom.bus_type = BUS_TYPE_SBUS;
		mp->eeprom.cpuvers =
			of_getintprop_default(dp, "cpu_version", 0);
		mp->eeprom.cval =
			of_getintprop_default(dp, "clock_value", 0);
		mp->eeprom.ramsz = of_getintprop_default(dp, "sram_size", 0);
		if (!mp->eeprom.cpuvers)
			mp->eeprom.cpuvers = CPUVERS_2_3;
		if (mp->eeprom.cpuvers < CPUVERS_3_0)
			mp->eeprom.cval = 0;
		if (!mp->eeprom.ramsz)
			mp->eeprom.ramsz = (128 * 1024);

		prop = of_get_property(dp, "myrinet-board-id", &len);
		if (prop)
			memcpy(&mp->eeprom.id[0], prop, 6);
		else
			set_boardid_from_idprom(mp, num);

		prop = of_get_property(dp, "fpga_version", &len);
		if (prop)
			memcpy(&mp->eeprom.fvers[0], prop, 32);
		else
			memset(&mp->eeprom.fvers[0], 0, 32);

		if (mp->eeprom.cpuvers == CPUVERS_4_1) {
			if (mp->eeprom.ramsz == (128 * 1024))
				mp->eeprom.ramsz = (256 * 1024);
			if ((mp->eeprom.cval == 0x40414041) ||
			    (mp->eeprom.cval == 0x90449044))
				mp->eeprom.cval = 0x50e450e4;
		}
	}
#ifdef DEBUG_DETECT
	dump_eeprom(mp);
#endif

	for (i = 0; i < 6; i++)
		dev->dev_addr[i] = mp->eeprom.id[i];

	determine_reg_space_size(mp);

	
	if (mp->eeprom.cpuvers < CPUVERS_4_0) {
		
		DET(("Mapping regs for cpuvers < CPUVERS_4_0\n"));
		mp->regs = of_ioremap(&op->resource[0], 0,
				      mp->reg_size, "MyriCOM Regs");
		if (!mp->regs) {
			printk("MyriCOM: Cannot map MyriCOM registers.\n");
			goto err;
		}
		mp->lanai = mp->regs + (256 * 1024);
		mp->lregs = mp->lanai + (0x10000 * 2);
	} else {
		DET(("Mapping regs for cpuvers >= CPUVERS_4_0\n"));
		mp->cregs = of_ioremap(&op->resource[0], 0,
				       PAGE_SIZE, "MyriCOM Control Regs");
		mp->lregs = of_ioremap(&op->resource[0], (256 * 1024),
					 PAGE_SIZE, "MyriCOM LANAI Regs");
		mp->lanai = of_ioremap(&op->resource[0], (512 * 1024),
				       mp->eeprom.ramsz, "MyriCOM SRAM");
	}
	DET(("Registers mapped: cregs[%p] lregs[%p] lanai[%p]\n",
	     mp->cregs, mp->lregs, mp->lanai));

	if (mp->eeprom.cpuvers >= CPUVERS_4_0)
		mp->shmem_base = 0xf000;
	else
		mp->shmem_base = 0x8000;

	DET(("Shared memory base is %04x, ", mp->shmem_base));

	mp->shmem = (struct myri_shmem __iomem *)
		(mp->lanai + (mp->shmem_base * 2));
	DET(("shmem mapped at %p\n", mp->shmem));

	mp->rqack	= &mp->shmem->channel.recvqa;
	mp->rq		= &mp->shmem->channel.recvq;
	mp->sq		= &mp->shmem->channel.sendq;

	
	DET(("Resetting LANAI\n"));
	myri_reset_off(mp->lregs, mp->cregs);
	myri_reset_on(mp->cregs);

	
	myri_disable_irq(mp->lregs, mp->cregs);

	
	myri_reset_on(mp->cregs);

	
	mp->myri_bursts = of_getintprop_default(dp->parent,
						"burst-sizes", 0x00);
	if (!sbus_can_burst64())
		mp->myri_bursts &= ~(DMA_BURST64);

	DET(("MYRI bursts %02x\n", mp->myri_bursts));

	
	i = of_getintprop_default(dp, "interrupts", 0);
	if (i == 0)
		i = 4;
	DET(("prom_getint(interrupts)==%d, irqlvl set to %04x\n",
	     i, (1 << i)));

	sbus_writel((1 << i), mp->cregs + MYRICTRL_IRQLVL);

	mp->dev = dev;
	dev->watchdog_timeo = 5*HZ;
	dev->irq = op->irqs[0];
	dev->netdev_ops = &myri_ops;

	
	DET(("Requesting MYRIcom IRQ line.\n"));
	if (request_irq(dev->irq, &myri_interrupt,
			IRQF_SHARED, "MyriCOM Ethernet", (void *) dev)) {
		printk("MyriCOM: Cannot register interrupt handler.\n");
		goto err;
	}

	dev->mtu		= MYRINET_MTU;
	dev->header_ops		= &myri_header_ops;

	dev->hard_header_len	= (ETH_HLEN + MYRI_PAD_LEN);

	
	DET(("Loading LANAI firmware\n"));
	if (myri_load_lanai(mp)) {
		printk(KERN_ERR "MyriCOM: Cannot Load LANAI firmware.\n");
		goto err_free_irq;
	}

	if (register_netdev(dev)) {
		printk("MyriCOM: Cannot register device.\n");
		goto err_free_irq;
	}

	dev_set_drvdata(&op->dev, mp);

	num++;

	printk("%s: MyriCOM MyriNET Ethernet %pM\n",
	       dev->name, dev->dev_addr);

	return 0;

err_free_irq:
	free_irq(dev->irq, dev);
err:
	
	free_netdev(dev);
	return -ENODEV;
}
int
main(int argc, char *argv[])
{
	int ret = 1, i, idx, fd, num_apps = 0;
	char *dev_file = "/dev/uhid0", *banner, *file;
	dldev_t dev;
	appinfo *app = NULL;
	u8 *data;
	u16 len;

	/* for data security */
	/*
	umask(S_IRWXG | S_IRWXO);
	*/

	while((i = getopt(argc, argv, "hd:")) != -1){
		switch(i){
		case 'd':
			dev_file = optarg;
			break;
		case 'h':
		default:
			usage();
			break;
		}
	}
	argc -= optind;
	argv += optind;

#ifdef USB_USBHID
	dev.usb.file = dev_file;
#endif

	BEGIN_OPT()
		APP_OPT("rom", -3)
		APP_OPT("eeprom", -2)
		APP_OPT("wristapp", -1)
		APP_OPT("contact", APP_CONTACT)
		APP_OPT("note", APP_NOTE)
		APP_OPT("appt", APP_APPT)
		APP_OPT("alarm", APP_ALARM)
		APP_OPT("schedule", APP_SCHEDULE)
		APP_OPT("occasion", APP_OCCASION)
		APP_OPT("chrono", APP_CHRONO)
		APP_OPT("countdn", APP_TIMER)
		APP_OPT("interval", APP_TIMER | 0x100)
#if 0
		APP_OPT("synchro", APP_SYNCHRO)
#endif
		APP_OPT("option", APP_OPTION)
	END_OPT()

	if(!num_apps)
		usage();

	if(open_dev(&dev)){
		ERROR("open_dev");
		goto exit;
	}

	tucp_progress(1);

	if(start_session(&dev)){
		ERROR("read_app_info");
		goto exit;
	}

/******************************************************************************/
#ifdef DEBUG
	for(i = 0; i < NUM_APPS; i++){
		if(!dev.app[i].acd.app_idx)
			continue;
		printf("%2d: %d%d%d%d%d%d%d%d %02x %02x %04x %04x %04x %04x %04x %04x %s\n", i,
				dev.app[i].acd.app_idx,
				dev.app[i].acd.code_loc,
				dev.app[i].acd.db_loc,
				dev.app[i].acd.code_invalid,
				dev.app[i].acd.db_modified,
				dev.app[i].acd.db_invalid,
				dev.app[i].acd.passwd_req,
				dev.app[i].acd.mode_name,

				dev.app[i].acb.app_type,
				dev.app[i].acb.app_inst,
				dev.app[i].acb.asd_addr,
				dev.app[i].acb.add_addr,
				dev.app[i].acb.state_mgr_addr,
				dev.app[i].acb.refresh_addr,
				dev.app[i].acb.banner_addr,
				dev.app[i].acb.code_addr,
				dev.app[i].banner
		);
	}
#endif
/******************************************************************************/

	for(i = 0; i < num_apps; i++){
		if(app[i].file[0])
			fprintf(stderr, "%s\n", app[i].file);
		else
			continue;

		banner = NULL;
		file = app[i].file;

		switch(app[i].app){
		case -3:
			if(dump_rom(&dev, &data, &len)){
				ERROR("dump_rom");
				goto end;
			}
			break;
		case -2:
			if(dump_eeprom(&dev, &data, &len)){
				ERROR("dump_eeprom");
				goto end;
			}
			break;
		case -1:
			banner = file;
			for(; *file && *file != '='; file++);
			if(*file)
				*file++ = 0;
			if(!(*file)){
				ERROR("%s: no file name specified", banner);
				goto end;
			}
			for(; *banner; banner++)
				*banner = toupper(*banner);
			banner = app[i].file;
			break;
		case APP_CONTACT:
			banner = "CONTACT";
			break;
		case APP_NOTE:
			banner = "NOTE";
			break;
		case APP_APPT:
			banner = "APPT";
			break;
		case APP_ALARM:
			banner = "ALARM";
			break;
		case APP_SCHEDULE:
			banner = "SCHEDULE";
			break;
		case APP_OCCASION:
			banner = "OCCASION";
			break;
		case APP_CHRONO:
			banner = "CHRONO";
			break;
		case APP_TIMER:
			banner = "COUNTDN TIMER";
			break;
		case APP_TIMER | 0x100:
			banner = "INTERVAL TIMER";
			break;
#if 0
		case APP_SYNCHRO:
			banner = "SYNCHRO";
			break;
#endif
		case APP_OPTION:
			len = 15;
			data = (u8 *)malloc(len);
			if(read_abs_addr(&dev, dev.sysmap.opt_addr, int_mem,
						data, len)){
				ERROR("read_abs_addr");
				goto end;
			}
			break;
		}

		if(banner){
			if((idx = find_app(&dev, banner)) < 0){
				ERROR("%s application not found", banner);
				goto end;
			}
			if(dump_add(&dev, idx, &data, &len)){
				ERROR("dump_add");
				goto end;
			}
		}

		if((fd = open(file, O_WRITE, S_IRWUSR)) < 0){
			ERROR("%s: open failed", file);
			goto end;
		}
		if(write(fd, data, len) != len){
			ERROR("%s: write failed", file);
			goto end;
		}
		close(fd);
		free(data);
	}

/******************************************************************************/
end:
	if(end_session(&dev)){
		ERROR("end_session");
		goto exit;
	}

	tucp_progress(0);

	ret = 0;
exit:
	close_dev(&dev);

	exit(ret);
}