int main(void)
{
mailbox = (unsigned *)0x00006000;
mailbox1 = (unsigned *)0x00006100;
// Initialize the mailbox
mailbox[0] = 0x00000000;
mailbox1[0] = 0x00000000;
// Preparing for the interrupt
// Attach the ISR with this interrupt
e_irq_attach(E_MESSAGE_INT, int_isr);
// Clear the IMASK
e_irq_mask(E_MESSAGE_INT, E_FALSE);
// Enable the global interrupt
e_irq_global_mask(E_FALSE);
// Making slave_core into idle and wait for the finishing transfer interrupt
__asm__ __volatile__("idle");
// Showing coming back from the interrupt
mailbox1[0] = 0xffffffff;
// Set the IMASK
e_irq_mask(E_MESSAGE_INT, E_TRUE);
// Disable the global interrupt
e_irq_global_mask(E_TRUE);
return 0;
}
int main(void)
{
unsigned i;
*signal = start;
//attach the isr handlers
e_irq_attach(E_SW_EXCEPTION, swexception_isr);
e_irq_attach(E_MEM_FAULT, memfault_isr);
e_irq_attach(E_TIMER0_INT, timer0_isr);
e_irq_attach(E_TIMER1_INT, timer1_isr);
e_irq_attach(E_DMA0_INT, dma0_isr);
e_irq_attach(E_DMA1_INT, dma1_isr);
e_irq_attach(E_USER_INT, user_isr);
//enable interrupts
e_irq_global_mask(E_FALSE);
e_reg_write(E_REG_IMASK,0x0);
//initialize the target mem
result = (unsigned *)resultbase;
for(i=0;i<7;i++)
{
result[i] = 0x0;
}
//wait for the finished signal from master
while(*signal != finish) ;
return EXIT_SUCCESS;
}
int main(void) {
int i;
int *pt;
e_irq_attach(E_SW_EXCEPTION, swexception_isr);
e_irq_attach(E_MEM_FAULT, memfault_isr);
e_irq_attach(E_TIMER0_INT, timer0_isr);
e_irq_attach(E_TIMER1_INT, timer1_isr);
e_irq_attach(E_DMA0_INT, dma0_isr);
e_irq_attach(E_DMA1_INT, dma1_isr);
e_irq_attach(E_USER_INT, user_isr);
e_irq_global_mask(E_FALSE);
e_reg_write(E_REG_IMASK,0x0);
//reset the target mem
pt = (int *)0x5200;
for(i=0;i<7;i++)
{
pt[i] = 0x0;
}
while(1) ;
return EXIT_SUCCESS;
}
/**
* Start trace, but wait until all processors on this chip are ready and waiting to start
*/
int trace_start_wait_all()
{
e_irq_attach(E_WAND_INT, wand_trace_isr);
e_irq_mask(E_WAND_INT, 0);
__asm__ __volatile__("wand"); // Set our WAND bit
__asm__ __volatile__("idle"); // Idle and wait for an interrupt
e_ctimer_start(E_CTIMER_1, E_CTIMER_CLK); // Start counting
return 0;
}
int trace_start_wait_all()
{
unsigned irqState;
e_irq_global_mask(E_FALSE);
e_irq_attach(E_WAND_INT, wand_trace_isr);
e_irq_mask(E_WAND_INT, E_FALSE);
__asm__ __volatile__("wand"); // Set our WAND bit
__asm__ __volatile__("idle"); // Idle and wait for an interrupt
irqState = e_reg_read(E_REG_STATUS);
irqState = irqState & (~0x8); // This is the WAND interrupt flag
e_reg_write(E_REG_FSTATUS, irqState);
//e_ctimer_start(E_CTIMER_1, E_CTIMER_CLK); // Start counting
return 0;
}
static void sync(void)
{
uint32_t irq_state;
/* enable WAND interrupt */
e_irq_attach(WAND_BIT, wand_trace_isr);
e_irq_mask(WAND_BIT, E_FALSE);
/* WAND + IDLE */
__asm__ __volatile__("wand");
__asm__ __volatile__("idle");
/* acknowledge interrupt */
irq_state = e_reg_read(E_REG_STATUS);
irq_state &= ~WAND_BIT;
e_reg_write(E_REG_STATUS, irq_state);
}
/**
* Initialize data structures, call this first before using trace functions
*/
int trace_init()
{
// If I am the master
if(e_get_coreid() == TRACE_MASTER_ID) {
// setup my DMA engine
setupDMA2(); // REMEMBER TO CHANGE
}
//register timer ISR
e_irq_global_mask(0);
e_irq_attach(E_TIMER1_INT, timer1_trace_isr);
e_irq_mask(E_TIMER1_INT, 0);
// setup timer 1 for work
e_ctimer_stop(E_CTIMER_1);
e_ctimer_set(E_CTIMER_1, E_CTIMER_MAX);
logCoreid = (e_get_coreid()& 0xFFF) << 8; // make it easy to use core-id
return 0;
}
int main(void) {
//initialize
int i;
unsigned row, col, delay, num;
unsigned *ivt;
e_irq_global_mask(E_FALSE);
e_irq_attach(E_WAND_INT, wand_isr);
e_irq_mask(E_WAND_INT, E_FALSE);
row = e_group_config.core_row;
col = e_group_config.core_col;
num = row * e_group_config.group_cols + col;
pause = (volatile uint32_t *) (0x7000);
result = (volatile unsigned *) (0x8f000000 + 0x4*num);
delay = 0x2000 * num + 0x2000;
if (num == 0)
*pause = 0;
*result = 0xdeadbeef;
for(i=0; i<0x10000; i++)
{
*result = i;
e_wait(E_CTIMER_0, delay);
if (num == 0)
while ((*pause));
__asm__ __volatile__("wand");
__asm__ __volatile__("idle");
// clear wand bit
state = e_reg_read(E_REG_STATUS);
state = state & (~0x8);
e_reg_write(E_REG_FSTATUS, state);
}
return EXIT_SUCCESS;
}
