// Common interrupt handling void cmn_int_handler( elua_int_id id, elua_int_resnum resnum ) { elua_int_add( id, resnum ); #ifdef BUILD_C_INT_HANDLERS elua_int_c_handler phnd = elua_int_get_c_handler( id ); if( phnd ) phnd( resnum ); #endif }
// This should be called from the platform's timer interrupt at VTMR_FREQ_HZ void cmn_virtual_timer_cb() { unsigned i; for( i = 0; i < VTMR_NUM_TIMERS; i ++ ) { vtmr_counters[ i ] ++; #ifdef BUILD_LUA_INT_HANDLERS if( ( vtmr_int_enabled[ i >> 3 ] & ( 1 << ( i & 0x07 ) ) ) && ( vtmr_counters[ i ] == vtmr_period_limit[ i ] ) ) { vtmr_int_enabled[ i >> 3 ] &= ( u8 )~( 1 << ( i & 0x07 ) ); elua_int_add( INT_TMR_MATCH, i + VTMR_FIRST_ID ); } #endif // #ifdef BUILD_LUA_INT_HANDLERS } if( vtmr_reset_idx != -1 ) { vtmr_counters[ vtmr_reset_idx ] = 0; vtmr_reset_idx = -1; } }
// This should be called from the platform's timer interrupt at VTMR_FREQ_HZ void cmn_virtual_timer_cb(void) { unsigned i; #ifdef CMN_TIMER_INT_SUPPORT u8 msk; #endif for( i = 0; i < VTMR_NUM_TIMERS; i ++ ) { vtmr_counters[ i ] ++; #ifdef CMN_TIMER_INT_SUPPORT msk = 1 << ( i & 0x07 ); if( vtmr_counters[ i ] >= vtmr_period_limit[ i ] ) { vtmr_int_flag[ i >> 3 ] |= msk; if( vtmr_int_enabled[ i >> 3 ] & msk ) elua_int_add( INT_TMR_MATCH, i + VTMR_FIRST_ID ); if( vtmr_int_periodic_flag[ i >> 3 ] & msk ) vtmr_counters[ i ] = 0; else vtmr_int_enabled[ i >> 3 ] &= ( u8 )~msk; }