static int cpm_serial_open(void)
{
disable_port();
out_8(¶m->rfcr, 0x10);
out_8(¶m->tfcr, 0x10);
out_be16(¶m->mrblr, 1);
out_be16(¶m->maxidl, 0);
out_be16(¶m->brkec, 0);
out_be16(¶m->brkln, 0);
out_be16(¶m->brkcr, 0);
rbdf = cbd_addr;
rbdf->addr = (u8 *)rbdf - 1;
rbdf->sc = 0xa000;
rbdf->len = 1;
tbdf = rbdf + 1;
tbdf->addr = (u8 *)rbdf - 2;
tbdf->sc = 0x2000;
tbdf->len = 1;
sync();
out_be16(¶m->rbase, cbd_offset);
out_be16(¶m->tbase, cbd_offset + sizeof(struct cpm_bd));
do_cmd(CPM_CMD_INIT_RX_TX);
enable_port();
return 0;
}
/**
* @brief pin setup
*
* @param pin STM32PIN() encoded pin ID
* @param func SoC specific function assignment
* @param clk optional clock device
*
* @return 0 on success, error otherwise
*/
int z_pinmux_stm32_set(u32_t pin, u32_t func,
struct device *clk)
{
/* make sure to enable port clock first */
if (enable_port(STM32_PORT(pin), clk)) {
return -EIO;
}
return stm32_pin_configure(pin, func, func & STM32_AFR_MASK);
}
/*---------------------------------------------------------------------------*/
extern void lac_init_port(Lac_system *system, Port_no port_no,
Boolean lacp_enabled)
{
Lac_port *p;
if (find_port(system, port_no, &p))
{
init_port(p, lacp_enabled);
enable_port(p);
}
}
/**
* @brief pin setup
*
* @param pin STM32PIN() encoded pin ID
* @param func SoC specific function assignment
* @param clk optional clock device
*
* @return 0 on success, error otherwise
*/
int _pinmux_stm32_set(u32_t pin, u32_t func,
struct device *clk)
{
int config;
/* make sure to enable port clock first */
if (enable_port(STM32_PORT(pin), clk)) {
return -EIO;
}
/* determine config for alternate function */
config = stm32_get_pin_config(pin, func);
return stm32_pin_configure(pin, config, func);
}
int gpio_config(unsigned nr, unsigned flags)
{
uint port = GPIO_PORT(nr);
uint pin = GPIO_PIN(nr);
enable_port(port);
GPIO_InitTypeDef init;
init.GPIO_Speed = GPIO_Speed_50MHz;
init.GPIO_Pin = (1 << pin);
init.GPIO_PuPd = GPIO_PuPd_NOPULL;
if (flags & GPIO_INPUT) {
init.GPIO_Mode = GPIO_Mode_IN;
} else if (flags & GPIO_OUTPUT) {
init.GPIO_Mode = GPIO_Mode_OUT;
} else if (flags & GPIO_STM32_AF) {
init.GPIO_Mode = GPIO_Mode_AF;
GPIO_PinAFConfig(port_to_pointer(port), pin, GPIO_AFNUM(flags));
}
if (flags & GPIO_PULLUP) {
init.GPIO_PuPd = GPIO_PuPd_UP;
} else if (flags & GPIO_PULLDOWN) {
init.GPIO_PuPd = GPIO_PuPd_DOWN;
}
if (flags & GPIO_STM32_OD) {
init.GPIO_OType = GPIO_OType_OD;
} else {
init.GPIO_OType = GPIO_OType_PP;
}
GPIO_Init(port_to_pointer(port), &init);
return 0;
}
int gpio_config(unsigned nr, unsigned flags)
{
uint port = GPIO_PORT(nr);
uint pin = GPIO_PIN(nr);
enable_port(port);
GPIO_InitTypeDef init;
init.GPIO_Speed = GPIO_Speed_50MHz;
init.GPIO_Pin = (1 << pin);
if (flags & GPIO_STM32_AF) {
if (flags & GPIO_STM32_OD)
init.GPIO_Mode = GPIO_Mode_Out_OD;
else
init.GPIO_Mode = GPIO_Mode_AF_PP;
} else if (flags & GPIO_OUTPUT) {
if (flags & GPIO_STM32_OD)
init.GPIO_Mode = GPIO_Mode_Out_OD;
else
init.GPIO_Mode = GPIO_Mode_Out_PP;
} else { // GPIO_INPUT
if (flags & GPIO_PULLUP) {
init.GPIO_Mode = GPIO_Mode_IPU;
} else if (flags & GPIO_PULLDOWN) {
init.GPIO_Mode = GPIO_Mode_IPD;
} else {
init.GPIO_Mode = GPIO_Mode_IN_FLOATING;
}
}
GPIO_Init(port_to_pointer(port), &init);
return 0;
}
/** Wrapper for registering attached device to the hub.
*
* The @p enable_port function is expected to enable signaling on given
* port.
* The argument can have arbitrary meaning and it is not touched at all
* by this function (it is passed as is to the @p enable_port function).
*
* If the @p enable_port fails (i.e. does not return EOK), the device
* addition is canceled.
* The return value is then returned (it is good idea to use different
* error codes than those listed as return codes by this function itself).
*
* The @p connection representing connection with host controller does not
* need to be started.
* This function duplicates the connection to allow simultaneous calls of
* this function (i.e. from different fibrils).
*
* @param[in] parent Parent device (i.e. the hub device).
* @param[in] connection Connection to host controller. Must be non-null.
* @param[in] dev_speed New device speed.
* @param[in] enable_port Function for enabling signaling through the port the
* device is attached to.
* @param[in] arg Any data argument to @p enable_port.
* @param[out] assigned_address USB address of the device.
* @param[in] dev_ops Child device ops. Will use default if not provided.
* @param[in] new_dev_data Arbitrary pointer to be stored in the child
* as @c driver_data. Will allocate and assign usb_hub_attached_device_t
* structure if NULL.
* @param[out] new_fun Storage where pointer to allocated child function
* will be written. Must be non-null.
* @return Error code.
* @retval EINVAL Either connection or new_fun is a NULL pointer.
* @retval ENOENT Connection to HC not opened.
* @retval EADDRNOTAVAIL Failed retrieving free address from host controller.
* @retval EBUSY Failed reserving default USB address.
* @retval ENOTCONN Problem connecting to the host controller via USB pipe.
* @retval ESTALL Problem communication with device (either SET_ADDRESS
* request or requests for descriptors when creating match ids).
*/
int usb_hc_new_device_wrapper(ddf_dev_t *parent,
usb_hc_connection_t *hc_conn, usb_speed_t dev_speed,
int (*enable_port)(void *arg), void *arg, usb_address_t *assigned_address,
ddf_dev_ops_t *dev_ops, void *new_dev_data, ddf_fun_t **new_fun)
{
if ((new_fun == NULL) || (hc_conn == NULL))
return EINVAL;
int rc;
struct timeval start_time;
rc = gettimeofday(&start_time, NULL);
if (rc != EOK) {
return rc;
}
/* We are gona do a lot of communication better open it in advance. */
rc = usb_hc_connection_open(hc_conn);
if (rc != EOK) {
return rc;
}
/* Request a new address. */
usb_address_t dev_addr =
usb_hc_request_address(hc_conn, 0, false, dev_speed);
if (dev_addr < 0) {
rc = EADDRNOTAVAIL;
goto close_connection;
}
/* Initialize connection to device. */
usb_device_connection_t dev_conn;
rc = usb_device_connection_initialize(
&dev_conn, hc_conn, USB_ADDRESS_DEFAULT);
if (rc != EOK) {
rc = ENOTCONN;
goto leave_release_free_address;
}
/* Initialize control pipe on default address. Don't register yet. */
usb_pipe_t ctrl_pipe;
rc = usb_pipe_initialize_default_control(&ctrl_pipe, &dev_conn);
if (rc != EOK) {
rc = ENOTCONN;
goto leave_release_free_address;
}
/*
* The default address request might fail.
* That means that someone else is already using that address.
* We will simply wait and try again.
* (Someone else already wants to add a new device.)
*/
do {
rc = usb_hc_request_address(hc_conn, USB_ADDRESS_DEFAULT,
true, dev_speed);
if (rc == ENOENT) {
/* Do not overheat the CPU ;-). */
async_usleep(DEFAULT_ADDRESS_ATTEMPT_DELAY_USEC);
}
} while (rc == ENOENT);
if (rc < 0) {
goto leave_release_free_address;
}
/* Register control pipe on default address. 0 means no interval. */
rc = usb_pipe_register(&ctrl_pipe, 0);
if (rc != EOK) {
rc = ENOTCONN;
goto leave_release_default_address;
}
struct timeval end_time;
rc = gettimeofday(&end_time, NULL);
if (rc != EOK) {
goto leave_release_default_address;
}
/* According to the USB spec part 9.1.2 host allows 100ms time for
* the insertion process to complete. According to 7.1.7.1 this is the
* time between attach detected and port reset. However, the setup done
* above might use much of this time so we should only wait to fill
* up the 100ms quota*/
const suseconds_t elapsed = tv_sub(&end_time, &start_time);
if (elapsed < 100000) {
async_usleep(100000 - elapsed);
}
/* Endpoint is registered. We can enable the port and change address. */
rc = enable_port(arg);
if (rc != EOK) {
goto leave_release_default_address;
}
/* USB spec 7.1.7.1: The USB System Software guarantees a minimum of
* 10ms for reset recovery. Device response to any bus transactions
* addressed to the default device address during the reset recovery
* time is undefined.
*/
async_usleep(10000);
/* Get max_packet_size value. */
rc = usb_pipe_probe_default_control(&ctrl_pipe);
if (rc != EOK) {
rc = ESTALL;
goto leave_release_default_address;
}
rc = usb_request_set_address(&ctrl_pipe, dev_addr);
if (rc != EOK) {
rc = ESTALL;
goto leave_release_default_address;
}
/* Register the device with devman. */
/* FIXME: create device_register that will get opened ctrl pipe. */
ddf_fun_t *child_fun;
rc = usb_device_register_child_in_devman(&ctrl_pipe,
parent, dev_ops, new_dev_data, &child_fun);
if (rc != EOK) {
goto leave_release_free_address;
}
const usb_hub_attached_device_t new_device = {
.address = dev_addr,
.fun = child_fun,
};
/* Inform the host controller about the handle. */
rc = usb_hub_register_device(hc_conn, &new_device);
if (rc != EOK) {
/* We know nothing about that data. */
if (new_dev_data)
child_fun->driver_data = NULL;
/* The child function is already created. */
ddf_fun_destroy(child_fun);
rc = EDESTADDRREQ;
goto leave_release_free_address;
}
if (assigned_address != NULL) {
*assigned_address = dev_addr;
}
*new_fun = child_fun;
rc = EOK;
goto close_connection;
/*
* Error handling (like nested exceptions) starts here.
* Completely ignoring errors here.
*/
leave_release_default_address:
if (usb_hc_release_address(hc_conn, USB_ADDRESS_DEFAULT) != EOK)
usb_log_warning("%s: Failed to release defaut address.\n",
__FUNCTION__);
leave_release_free_address:
/* This might be either 0:0 or dev_addr:0 */
if (usb_pipe_unregister(&ctrl_pipe) != EOK)
usb_log_warning("%s: Failed to unregister default pipe.\n",
__FUNCTION__);
if (usb_hc_release_address(hc_conn, dev_addr) != EOK)
usb_log_warning("%s: Failed to release address: %d.\n",
__FUNCTION__, dev_addr);
close_connection:
if (usb_hc_connection_close(hc_conn) != EOK)
usb_log_warning("%s: Failed to close hc connection.\n",
__FUNCTION__);
return rc;
}
unsigned int assign_address(unsigned int addr1, unsigned int addr2, int mode)
{
unsigned long rhp1,rhp2;
unsigned int status;
unsigned int ccode=0;
rhp1=r32(HcRhP1);
rhp2=r32(HcRhP2);
enable_port();
// gotoxy(1,5);
if(mode==1)
{
printf("\nRhP1 = %8lX RhP2 = %8lX",rhp1,rhp2);
printf("\nPort1Speed = %2d",get_port_speed(1));
printf("\nPort2Speed = %2d",get_port_speed(2));
}
if( ((rhp1&0x01)==1) && ((rhp2&0x01)==1) )
{
if(mode==1)printf("\nBoth ports has USB device connected.");
w32(HcRhP1,0x00000010); //Resets port 1
// delay(500);
w32(HcRhP2,0x00000010); //Resets port 2
ccode=set_address(0,1,1);
status=0x0100|(ccode<<12);
enable_port();
// delay(200);
ccode=set_address(0,2,2);
status=0x0001|(ccode<<4);
}
else if( ((rhp1&0x01)==1) && ((rhp2&0x01)==0) )
{
if(mode==1)printf("\nPort 1 has USB device connected, assigning address 1...");
ccode=set_address(0,1,1);
status=0x0100|(ccode<<12);
}
else if( ((rhp1&0x01)==0) && ((rhp2&0x01)==1) )
{
if(mode==1)printf("\nPort 2 has USB device connected, assigning address 2...");
ccode=set_address(0,2,2);
status=0x0001|(ccode<<4);
}
else
{
if(mode==1)printf("\nNo device connected to ISP1362, aborting enumeration...");
status=0x0000;
}
return(status);
}
void operation<DEFAULT_MC_TYPE>::configure_multiport_subtests(
const std::vector<fapi2::Target<fapi2::TARGET_TYPE_DIMM>>& i_dimms)
{
// Constexpr's to beautify the code
constexpr uint64_t FIRST_ADDRESS = 0;
constexpr uint64_t MIDDLE_ADDRESS = 1;
constexpr uint64_t LAST_ADDRESS = 2;
// Get the port/DIMM information for the addresses. This is an integral value which allows us to index
// all the DIMM across a controller.
const uint64_t l_portdimm_start_address = iv_const.iv_start_address.get_port_dimm();
const uint64_t l_portdimm_end_address = iv_const.iv_end_address.get_port_dimm();
// Loop over all the DIMM on this MCBIST. Check the port/DIMM value for what to do.
FAPI_INF("Adding subtests for %d DIMMs on %s", i_dimms.size(), mss::c_str(iv_target));
for (const auto& d : i_dimms)
{
// The port/DIMM value for this DIMM is a three-bit field where the left-two are the relative position of the port
// and the right-most is the DIMM's index. We use this to decide how to process this dimm
// Due to this combination, the port/DIMM ID is just the relative position of the DIMM from the MCBIST
const uint64_t l_portdimm_this_dimm = mss::relative_pos<TARGET_TYPE_MCBIST>(d);
const auto l_mca = mss::find_target<fapi2::TARGET_TYPE_MCA>(d);
// The port and DIMM indexes are needed to set the addressing scheme below - compute them here
const auto l_port_for_dimm = mss::relative_pos<fapi2::TARGET_TYPE_MCBIST>(l_mca);
const auto l_dimm_index = mss::index(d);
FAPI_INF("%s port/dimm %d, port/dimm start: %d", mss::c_str(iv_target), l_portdimm_this_dimm, l_portdimm_start_address);
// No need to process DIMM which are lower as they're not between the start and the end of the port.
if (l_portdimm_this_dimm < l_portdimm_start_address)
{
FAPI_INF("%s Skipping adding the subtest for this DIMM %lu < %lu", mss::c_str(d), l_portdimm_this_dimm,
l_portdimm_start_address);
continue;
}
// Ok, we're gonna need to push on a subtest.
auto l_subtest = iv_subtest;
l_subtest.enable_port(l_port_for_dimm);
l_subtest.enable_dimm(l_dimm_index);
// Ok this is the starting point. We know it's address selection is config0
if (l_portdimm_this_dimm == l_portdimm_start_address)
{
l_subtest.change_addr_sel(FIRST_ADDRESS);
}
// If this DIMM represents the end, we know that's address config2
else if (l_portdimm_this_dimm == l_portdimm_end_address)
{
l_subtest.change_addr_sel(LAST_ADDRESS);
}
// Otherwise, we're someplace in between - address config1
else
{
l_subtest.change_addr_sel(MIDDLE_ADDRESS);
}
iv_program.iv_subtests.push_back(l_subtest);
FAPI_INF("adding subtest for %s (port: %d dimm %d dimm relative position to MCBIST: )", mss::c_str(iv_target),
l_port_for_dimm, l_dimm_index, l_portdimm_this_dimm);
}
FAPI_INF("Total subtests added: %d for %s", iv_program.iv_subtests.size(), mss::c_str(iv_target));
}
/*---------------------------------------------------------------------------*/
extern void lac_enable_port(Lac_system *system, Port_no port_no)
{
Lac_port *p;
if (find_port(system, port_no, &p)) enable_port(p);
}
