/**
* \brief
*
* \param
*
* \return void
*/
void f_config_handle(void)
{
uint32_t ul_last_page_addr = LAST_PAGE_ADDRESS;
uint32_t *pul_last_page = (uint32_t *) ul_last_page_addr;
uint32_t ul_page_buffer[IFLASH_PAGE_SIZE / sizeof(uint32_t)];
uint32_t unique_id[4];
memset( &f_ip_config, 0, sizeof(f_ip_config_t) );
/* Initialize flash: 6 wait states for flash writing. */
flash_init(FLASH_ACCESS_MODE_128, 6);
/* Unlock page */
flash_unlock(ul_last_page_addr, ul_last_page_addr + IFLASH_PAGE_SIZE - 1, 0, 0);
/* Read Flash page */
memcpy((uint8_t*)(&f_ip_config), (uint8_t*)pul_last_page, sizeof(f_ip_config_t));
flash_read_unique_id(unique_id, 4); /* read unique ID. */
f_ip_config.mac[0] = ETHERNET_CONF_ETHADDR0;
f_ip_config.mac[1] = ETHERNET_CONF_ETHADDR1;
f_ip_config.mac[2] = ETHERNET_CONF_ETHADDR2;
f_ip_config.mac[3] = ETHERNET_CONF_ETHADDR3;
f_ip_config.mac[4] = unique_id[3]>>8;
f_ip_config.mac[5] = unique_id[3];
f_ip_config.mask[0] = ETHERNET_CONF_NET_MASK0;
f_ip_config.mask[1] = ETHERNET_CONF_NET_MASK1;
f_ip_config.mask[2] = ETHERNET_CONF_NET_MASK2;
f_ip_config.mask[3] = ETHERNET_CONF_NET_MASK3;
if (( f_ip_config.alloc != IP_CONFIG_ALLOC_TRUE ) ||
( gpio_pin_is_low(RESTKEY_GPIO) == 1 )) /* net parameters init. */
{
f_ip_config.mode = IP_CONFIG_MODE_FIXEDIP;
f_ip_config.alloc = IP_CONFIG_ALLOC_TRUE; /* net parameters are occupied.. */
f_ip_config.ip[0] = ETHERNET_CONF_IPADDR0;
f_ip_config.ip[1] = ETHERNET_CONF_IPADDR1;
f_ip_config.ip[2] = ETHERNET_CONF_IPADDR2;
f_ip_config.ip[3] = ETHERNET_CONF_IPADDR3;
/* Copy information to FLASH buffer..*/
memcpy((uint8_t*)ul_page_buffer, (uint8_t *)(&f_ip_config), sizeof(f_ip_config_t));
/* Write page */
flash_write(ul_last_page_addr, ul_page_buffer, IFLASH_PAGE_SIZE, 1);
}
/* Lock page */
flash_lock(ul_last_page_addr, ul_last_page_addr + IFLASH_PAGE_SIZE - 1, 0, 0);
}
/**
* \brief Test flash device id interface.
*
* This test gets the device id of the flash.
*
* \param test Current test case.
*/
static void run_flash_device_id_test(const struct test_case *test)
{
uint32_t ul_rc;
uint32_t unique_id[4];
/* Read flash device id */
ul_rc = flash_read_unique_id(unique_id, 4);
/* Validate the get flash device id function */
test_assert_true(test, ul_rc == FLASH_RC_OK,
"Test flash device id: flash read device id error!");
}
int vhalInitNFO(void *data){
(void)data;
flash_read_unique_id((uint32_t*)vhal_uid, 4);
uint8_t *uid = vhal_uid;
int i;
for (i = 0; i < 16; i++) {
uint8_t n1 = uid[i] & 0x0f;
uint8_t n2 = (uid[i] & 0xf0) >> 4;
vhal_uidstr[2 * i] = (n1 < 10) ? ('0' + n1) : ('a' - 10 + n1);
vhal_uidstr[2 * i + 1] = (n2 < 10) ? ('0' + n2) : ('a' - 10 + n2);
}
vhal_uidstr[32] = 0;
return 0;
}
uint16_t cph_utils_get_shortid_candidate(void) {
uint32_t uid[4];
uint32_t seed = 0;
flash_read_unique_id(uid, 4);
seed ^= uid[0];
seed ^= uid[1];
seed ^= uid[2];
seed ^= uid[3];
// TRACE("seed: %08X\r\n", seed);
uint16_t shortid = 0;
srand(seed);
uint8_t select = (uint8_t)(seed & 0xFF);
for (int i=0;i<select;i++) {
shortid += rand() % 0xFFFF;
}
// TRACE("shortid: %04X\r\n", shortid);
return shortid;
}
/**
* \brief efc_unique_id_example Application entry point.
*
* \return Unused (ANSI-C compatibility).
*/
int main(void)
{
uint32_t ul_rc;
uint32_t unique_id[4];
/* Initialize the SAM system */
sysclk_init();
board_init();
/* Initialize the console uart */
configure_console();
/* Output example information */
puts(STRING_HEADER);
/* Initialize Flash service */
ul_rc = flash_init(FLASH_ACCESS_MODE_128, 4);
if (ul_rc != FLASH_RC_OK) {
printf("-F- Initialization error %lu\n\r", (UL)ul_rc);
return 0;
}
/* Read the unique ID */
puts("-I- Reading 128 bits Unique Identifier\r");
ul_rc = flash_read_unique_id(unique_id, 4);
if (ul_rc != FLASH_RC_OK) {
printf("-F- Read the Unique Identifier error %lu\n\r", (UL)ul_rc);
return 0;
}
printf("-I- ID: 0x%08lu, 0x%08lu, 0x%08lu, 0x%08lu\n\r",
(UL)unique_id[0], (UL)unique_id[1],
(UL)unique_id[2], (UL)unique_id[3]);
while (1) {
/* Do nothing */
}
}
/*! \brief Main function. Execution starts here.
*/
int main(void)
{
uint32_t serial_number[4];
// Read Device-ID from SAM3U. Do this before enabling interrupts etc.
flash_read_unique_id(serial_number, sizeof(serial_number));
configure_console();
irq_initialize_vectors();
cpu_irq_enable();
// Initialize the sleep manager
sleepmgr_init();
#if !SAMD21 && !SAMR21
sysclk_init();
board_init();
#else
system_init();
#endif
//Tri-state XPROG pins
XPROGTarget_DisableTargetPDI();
//Convert serial number to ASCII for USB Serial number
for(unsigned int i = 0; i < 4; i++){
sprintf(usb_serial_number+(i*8), "%08x", (unsigned int)serial_number[i]);
}
usb_serial_number[32] = 0;
printf("ChipWhisperer-Lite Online. Firmware build: %s/%s\n", __TIME__, __DATE__);
printf("Serial number: %s\n", usb_serial_number);
/* Enable SMC */
pmc_enable_periph_clk(ID_SMC);
gpio_configure_pin(PIN_EBI_DATA_BUS_D0, PIN_EBI_DATA_BUS_FLAG1);
gpio_configure_pin(PIN_EBI_DATA_BUS_D1, PIN_EBI_DATA_BUS_FLAG1);
gpio_configure_pin(PIN_EBI_DATA_BUS_D2, PIN_EBI_DATA_BUS_FLAG1);
gpio_configure_pin(PIN_EBI_DATA_BUS_D3, PIN_EBI_DATA_BUS_FLAG1);
gpio_configure_pin(PIN_EBI_DATA_BUS_D4, PIN_EBI_DATA_BUS_FLAG1);
gpio_configure_pin(PIN_EBI_DATA_BUS_D5, PIN_EBI_DATA_BUS_FLAG1);
gpio_configure_pin(PIN_EBI_DATA_BUS_D6, PIN_EBI_DATA_BUS_FLAG1);
gpio_configure_pin(PIN_EBI_DATA_BUS_D7, PIN_EBI_DATA_BUS_FLAG1);
gpio_configure_pin(PIN_EBI_NRD, PIN_EBI_NRD_FLAGS);
gpio_configure_pin(PIN_EBI_NWE, PIN_EBI_NWE_FLAGS);
gpio_configure_pin(PIN_EBI_NCS0, PIN_EBI_NCS0_FLAGS);
/* We don't use address mapping so don't enable this */
/*
gpio_configure_pin(PIN_EBI_ADDR_BUS_A1, PIN_EBI_ADDR_BUS_FLAG1);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A2, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A3, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A4, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A5, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A6, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A7, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A8, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A9, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A10, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A11, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A12, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A13, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A14, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A15, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A16, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A17, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A18, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A19, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A20, PIN_EBI_ADDR_BUS_FLAG2);
*/
/* Configure EBI I/O for PSRAM connection */
printf("Setting up FPGA Communication\n");
/* complete SMC configuration between PSRAM and SMC waveforms. */
smc_set_setup_timing(SMC, 0, SMC_SETUP_NWE_SETUP(0)
| SMC_SETUP_NCS_WR_SETUP(1)
| SMC_SETUP_NRD_SETUP(1)
| SMC_SETUP_NCS_RD_SETUP(1));
smc_set_pulse_timing(SMC, 0, SMC_PULSE_NWE_PULSE(1)
| SMC_PULSE_NCS_WR_PULSE(1)
| SMC_PULSE_NRD_PULSE(3)
| SMC_PULSE_NCS_RD_PULSE(1));
smc_set_cycle_timing(SMC, 0, SMC_CYCLE_NWE_CYCLE(2)
| SMC_CYCLE_NRD_CYCLE(4));
smc_set_mode(SMC, 0, SMC_MODE_READ_MODE | SMC_MODE_WRITE_MODE
| SMC_MODE_DBW_BIT_8);
ui_init();
// Start USB stack to authorize VBus monitoring
udc_start();
/* Enable PCLK0 at 96 MHz */
genclk_enable_config(GENCLK_PCK_0, GENCLK_PCK_SRC_MCK, GENCLK_PCK_PRES_1);
//Following is 60MHz version
//genclk_enable_config(GENCLK_PCK_0, GENCLK_PCK_SRC_PLLBCK, GENCLK_PCK_PRES_4);
printf("Event Loop Entered, waiting...\n");
// The main loop manages only the power mode
// because the USB management is done by interrupt
while (true) {
sleepmgr_enter_sleep();
}
}
/*! \brief Main function. Execution starts here.
*/
int main(void)
{
uint32_t serial_number[4];
// Read Device-ID from SAM3U. Do this before enabling interrupts etc.
flash_read_unique_id(serial_number, sizeof(serial_number));
configure_console();
irq_initialize_vectors();
cpu_irq_enable();
// Initialize the sleep manager
sleepmgr_init();
#if !SAMD21 && !SAMR21
sysclk_init();
board_init();
#else
system_init();
#endif
fpga_program_init();
tps56520_init();
//Init CDCE906 Chip
cdce906_init();
//Convert serial number to ASCII for USB Serial number
for(unsigned int i = 0; i < 4; i++){
sprintf(usb_serial_number+(i*8), "%08x", (unsigned int)serial_number[i]);
}
usb_serial_number[32] = 0;
printf("ChipWhisperer-CW305 Online. Firmware build: %s/%s\n", __TIME__, __DATE__);
printf("Serial number: %s\n", usb_serial_number);
/* Enable SMC */
pmc_enable_periph_clk(ID_SMC);
fpga_pins(true);
/* Configure EBI I/O for PSRAM connection */
printf("Setting up FPGA Communication\n");
/* complete SMC configuration between PSRAM and SMC waveforms. */
smc_set_setup_timing(SMC, 0, SMC_SETUP_NWE_SETUP(0)
| SMC_SETUP_NCS_WR_SETUP(1)
| SMC_SETUP_NRD_SETUP(1)
| SMC_SETUP_NCS_RD_SETUP(1));
smc_set_pulse_timing(SMC, 0, SMC_PULSE_NWE_PULSE(3)
| SMC_PULSE_NCS_WR_PULSE(1)
| SMC_PULSE_NRD_PULSE(3)
| SMC_PULSE_NCS_RD_PULSE(1));
smc_set_cycle_timing(SMC, 0, SMC_CYCLE_NWE_CYCLE(4)
| SMC_CYCLE_NRD_CYCLE(4));
smc_set_mode(SMC, 0, SMC_MODE_READ_MODE | SMC_MODE_WRITE_MODE
| SMC_MODE_DBW_BIT_8);
ui_init();
// Start USB stack to authorize VBus monitoring
udc_start();
/* Enable PCLK0 at 96 MHz */
genclk_enable_config(GENCLK_PCK_0, GENCLK_PCK_SRC_MCK, GENCLK_PCK_PRES_1);
//Following is 60MHz version
//genclk_enable_config(GENCLK_PCK_0, GENCLK_PCK_SRC_PLLBCK, GENCLK_PCK_PRES_4);
printf("Event Loop Entered, waiting...\n");
//Turn off FPGA pins for now, will be enabled in event loop
fpga_pins(false);
// The main loop manages only the power mode
// because the USB management is done by interrupt
while (true) {
sleepmgr_enter_sleep();
process_events();
}
}
