void genbc1tl_out(void) { #ifdef INTERPRET_BC1TL_OUT gencallinterp((unsigned int)BC1TL_OUT, 1); #else if (((dst->addr & 0xFFF) == 0xFFC && (dst->addr < 0x80000000 || dst->addr >= 0xC0000000))||no_compiled_jump) { gencallinterp((unsigned int)BC1TL_OUT, 1); return; } gencheck_cop1_unusable(); genbc1t_test(); free_all_registers(); gentestl_out(); #endif }
void genbc1tl_idle(void) { #ifdef INTERPRET_BC1TL_IDLE gencallinterp((unsigned int)BC1TL_IDLE, 1); #else if (((dst->addr & 0xFFF) == 0xFFC && (dst->addr < 0x80000000 || dst->addr >= 0xC0000000))||no_compiled_jump) { gencallinterp((unsigned int)BC1TL_IDLE, 1); return; } gencheck_cop1_unusable(); genbc1t_test(); gentest_idle(); genbc1tl(); #endif }
void genbc1t_out() { #ifdef INTERPRET_BC1T_OUT gencallinterp((u32)BC1T_OUT, 1); #else if (((dst->addr & 0xFFF) == 0xFFC && (dst->addr < 0x80000000 || dst->addr >= 0xC0000000))||no_compiled_jump) { gencallinterp((u32)BC1T_OUT, 1); return; } gencheck_cop1_unusable(); genbc1t_test(); gendelayslot(); gentest_out(); #endif }
void genbc1tl_idle(usf_state_t * state) { #ifdef INTERPRET_BC1TL_IDLE gencallinterp(state, (unsigned long long)state->current_instruction_table.BC1TL_IDLE, 1); #else if (((state->dst->addr & 0xFFF) == 0xFFC && (state->dst->addr < 0x80000000 || state->dst->addr >= 0xC0000000))||state->no_compiled_jump) { gencallinterp(state, (unsigned long long)state->current_instruction_table.BC1TL_IDLE, 1); return; } gencheck_cop1_unusable(state); genbc1t_test(state); gentest_idle(state); genbc1tl(state); #endif }
void genbc1tl(void) { #ifdef INTERPRET_BC1TL gencallinterp((native_type)cached_interpreter_table.BC1TL, 1); #else if (((dst->addr & 0xFFF) == 0xFFC && (dst->addr < 0x80000000 || dst->addr >= 0xC0000000))||no_compiled_jump) { gencallinterp((native_type)cached_interpreter_table.BC1TL, 1); return; } gencheck_cop1_unusable(); genbc1t_test(); free_all_registers(); gentestl(); #endif }
void genbc1tl_idle(void) { #ifdef INTERPRET_BC1TL_IDLE gencallinterp((unsigned int)cached_interpreter_table.BC1TL_IDLE, 1); #else if (((g_dev.r4300.recomp.dst->addr & 0xFFF) == 0xFFC && (g_dev.r4300.recomp.dst->addr < 0x80000000 || g_dev.r4300.recomp.dst->addr >= 0xC0000000))||g_dev.r4300.recomp.no_compiled_jump) { gencallinterp((unsigned int)cached_interpreter_table.BC1TL_IDLE, 1); return; } gencheck_cop1_unusable(); genbc1t_test(); gentest_idle(); genbc1tl(); #endif }
void genbc1tl_out(usf_state_t * state) { #if defined(COUNT_INSTR) inc_m32rel(state, &state->instr_count[103]); #endif #ifdef INTERPRET_BC1TL_OUT gencallinterp(state, (unsigned long long)state->current_instruction_table.BC1TL_OUT, 1); #else if (((state->dst->addr & 0xFFF) == 0xFFC && (state->dst->addr < 0x80000000 || state->dst->addr >= 0xC0000000))||state->no_compiled_jump) { gencallinterp(state, (unsigned long long)state->current_instruction_table.BC1TL_OUT, 1); return; } gencheck_cop1_unusable(state); genbc1t_test(state); free_all_registers(state); gentestl_out(state); #endif }