/**
* \brief Enable the USB generic clock
*
* \pre The USB generic clock must be configured to 48MHz.
* CONFIG_USBCLK_SOURCE and CONFIG_USBCLK_DIV must be defined with proper
* configuration. The selected clock source must also be configured.
*/
void sysclk_enable_usb(void)
{
// Note: the SYSCLK_PBB_BRIDGE clock is enabled by
// sysclk_enable_pbb_module().
sysclk_enable_pbb_module(SYSCLK_USBC_REGS);
sysclk_enable_hsb_module(SYSCLK_USBC_DATA);
genclk_enable_config(AVR32_USBC_GCLK_NUM, CONFIG_USBCLK_SOURCE, CONFIG_USBCLK_DIV);
}
int main(void)
{
sysclk_init();
board_init();
genclk_enable_config(GCLK_ID, GCLK_SOURCE, GCLK_DIV);
/* Enable GPIO Alternate to output GCLK */
ioport_set_pin_mode(GCLK_PIN, GCLK_FUNCTION);
ioport_disable_pin(GCLK_PIN);
while (1) {
/* Do nothing */
}
}
/**
* \brief Configure ADC with specified value.
*
* \param dev_inst Device structure pointer.
* \param cfg Pointer to ADC configuration.
*
*/
void adc_set_config(struct adc_dev_inst *const dev_inst,
struct adc_config *cfg)
{
/* Reset the controller. */
dev_inst->hw_dev->ADCIFE_CR = ADCIFE_CR_SWRST;
dev_inst->hw_dev->ADCIFE_CFG = ADCIFE_CFG_REFSEL(cfg->refsel) |
ADCIFE_CFG_SPEED(cfg->speed) |
ADCIFE_CFG_PRESCAL(cfg->prescal);
if (cfg->clksel) {
dev_inst->hw_dev->ADCIFE_CFG |= ADCIFE_CFG_CLKSEL;
} else {
genclk_enable_config(ADCIFE_GCLK_NUM, CONFIG_ADC_GENERIC_SRC,
CONFIG_ADC_GENERIC_DIV);
}
dev_inst->hw_dev->ADCIFE_TIM = ADCIFE_TIM_ENSTUP |
ADCIFE_TIM_STARTUP(cfg->start_up);
}
/**
* \brief Enable the USB generic clock
*
* \pre The USB generic clock must be configured to 48MHz.
* CONFIG_USBCLK_SOURCE and CONFIG_USBCLK_DIV must be defined with proper
* configuration. The selected clock source must also be configured.
*/
void sysclk_enable_usb(void)
{
genclk_enable_config(AVR32_USBC_GCLK_NUM, CONFIG_USBCLK_SOURCE, CONFIG_USBCLK_DIV);
}
static void tc_init_fast(volatile avr32_tc_t *tc)
{
// Options for waveform generation.
static const tc_waveform_opt_t waveform_opt_1 = {
.channel = FAST_TC_CHANNEL, // Channel selection.
.bswtrg = TC_EVT_EFFECT_NOOP, // Software trigger effect on TIOB.
.beevt = TC_EVT_EFFECT_NOOP, // External event effect on TIOB.
.bcpc = TC_EVT_EFFECT_NOOP, // RC compare effect on TIOB.
.bcpb = TC_EVT_EFFECT_NOOP, // RB compare effect on TIOB.
.aswtrg = TC_EVT_EFFECT_NOOP, // Software trigger effect on TIOA.
.aeevt = TC_EVT_EFFECT_NOOP, // External event effect on TIOA.
.acpc = TC_EVT_EFFECT_NOOP, // RC compare effect on TIOA.
.acpa = TC_EVT_EFFECT_NOOP, //RA compare effect on TIOA.
.wavsel = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER, //Waveform selection: Up mode with automatic trigger(reset)
.enetrg = false, //// External event trigger enable.
.eevt = 0, //// External event selection.
.eevtedg = TC_SEL_NO_EDGE, //// External event edge selection.
.cpcdis = false, // Counter disable when RC compare.
.cpcstop = false, // Counter clock stopped with RC compare.
.burst = false, // Burst signal selection
.clki = false, // Clock inversion.
.tcclks = TC_CLOCK_SOURCE_TC3 // Internal source clock 3, connected to fPBA / 8.
};
// Options for enabling TC interrupts
static const tc_interrupt_t tc_interrupt = {
.etrgs = 0,
.ldrbs = 0,
.ldras = 0,
.cpcs = 1, // Enable interrupt on RC compare alone
.cpbs = 0,
.cpas = 0,
.lovrs = 0,
.covfs = 0
};
// Initialize the timer/counter.
tc_init_waveform(tc, &waveform_opt_1);
tc_write_rc(tc, FAST_TC_CHANNEL, 10);
// configure the timer interrupt
tc_configure_interrupts(tc, FAST_TC_CHANNEL, &tc_interrupt);
}
static void tc_init_slow(volatile avr32_tc_t *tc)
{
// Options for waveform generation.
static const tc_waveform_opt_t waveform_opt_2 = {
.channel = SLOW_TC_fast_CHANNEL, // Channel selection.
.bswtrg = TC_EVT_EFFECT_NOOP, // Software trigger effect on TIOB.
.beevt = TC_EVT_EFFECT_NOOP, // External event effect on TIOB.
.bcpc = TC_EVT_EFFECT_NOOP, // RC compare effect on TIOB.
.bcpb = TC_EVT_EFFECT_NOOP, // RB compare effect on TIOB.
.aswtrg = TC_EVT_EFFECT_NOOP, // Software trigger effect on TIOA.
.aeevt = TC_EVT_EFFECT_NOOP, // External event effect on TIOA.
.acpc = TC_EVT_EFFECT_CLEAR, // RC compare effect on TIOA.
.acpa = TC_EVT_EFFECT_SET, // RA compare effect on TIOA.
.wavsel = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER, //Waveform selection: Up mode with automatic trigger(reset)
.enetrg = false, // External event trigger enable.
.eevt = 0, // External event selection.
.eevtedg = TC_SEL_NO_EDGE, // External event edge selection.
.cpcdis = false, // Counter disable when RC compare.
.cpcstop = false, // Counter clock stopped with RC compare.
.burst = false, // Burst signal selection.
.clki = false, // Clock inversion.
.tcclks = TC_CLOCK_SOURCE_TC3 // Internal source clock 3, connected to fPBA / 8.
};
// Initialize the timer/counter.
tc_init_waveform(tc, &waveform_opt_2);
tc_write_rc(tc, SLOW_TC_fast_CHANNEL, 7500); //counter will count milliseconds
tc_write_ra(tc, SLOW_TC_fast_CHANNEL, 3500); //configure ra so that TIOA0 is toggled
static const tc_waveform_opt_t waveform_opt_3 = {
.channel = SLOW_TC_slow_CHANNEL, // Channel selection.
.bswtrg = TC_EVT_EFFECT_NOOP, // Software trigger effect on TIOB.
.beevt = TC_EVT_EFFECT_NOOP, // External event effect on TIOB.
.bcpc = TC_EVT_EFFECT_NOOP, // RC compare effect on TIOB.
.bcpb = TC_EVT_EFFECT_NOOP, // RB compare effect on TIOB.
.aswtrg = TC_EVT_EFFECT_NOOP, // Software trigger effect on TIOA.
.aeevt = TC_EVT_EFFECT_NOOP, // External event effect on TIOA.
.acpc = TC_EVT_EFFECT_NOOP, // RC compare effect on TIOA.
.acpa = TC_EVT_EFFECT_NOOP, //RA compare effect on TIOA.
.wavsel = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER, //Waveform selection: Up mode with automatic trigger(reset)
.enetrg = false, //// External event trigger enable.
.eevt = 0, //// External event selection.
.eevtedg = TC_SEL_NO_EDGE, //// External event edge selection.
.cpcdis = false, // Counter disable when RC compare.
.cpcstop = false, // Counter clock stopped with RC compare.
.burst = false, // Burst signal selection.
.clki = false, // Clock inversion.
.tcclks = TC_CLOCK_SOURCE_XC0 // Use XC1 as clock source. Must configure TIOA0 to be XC1
};
tc_init_waveform(tc, &waveform_opt_3);
tc_write_rc(tc, SLOW_TC_slow_CHANNEL, 100); //
tc_select_external_clock(tc,SLOW_TC_slow_CHANNEL,AVR32_TC_BMR_TC0XC0S_TIOA1); //use TIOA1 as XC0
}
static void configure_hmatrix(uint32_t mode)
{
// Configure all Slave in Last Default Master
#if (defined AVR32_HMATRIX)
for(uint32_t i = 0; i < AVR32_HMATRIX_SLAVE_NUM; i++) {
AVR32_HMATRIX.SCFG[i].defmstr_type = mode;
}
#endif
#if (defined AVR32_HMATRIXB)
for(uint32_t i = 0;i < AVR32_HMATRIXB_SLAVE_NUM; i++) {
AVR32_HMATRIXB.SCFG[i].defmstr_type = mode;
}
#endif
}
void board_init(void)
{
/* This function is meant to contain board-specific initialization code
* for, e.g., the I/O pins. The initialization can rely on application-
* specific board configuration, found in conf_board.h.
*/
gpio_local_init();
static pcl_freq_param_t pcl_freq_param =
{
.cpu_f = CPU_SPEED,
.pba_f = PBA_SPEED,
.osc0_f = FOSC0,
.osc0_startup = OSC0_STARTUP
};
if (pcl_configure_clocks(&pcl_freq_param) != PASS)
while (true);
configure_hmatrix(AVR32_HMATRIXB_DEFMSTR_TYPE_NO_DEFAULT);
AVR32_LowLevelInit();
//configure all GPIO
gpio_local_enable_pin_output_driver(ADC_CONV_pin);
gpio_local_clr_gpio_pin(ADC_CONV_pin);
gpio_local_enable_pin_output_driver(DDS_IOUD_pin);
gpio_local_clr_gpio_pin(DDS_IOUD_pin);
gpio_local_enable_pin_output_driver(DDS_RESET_pin);
gpio_local_clr_gpio_pin(DDS_RESET_pin);
gpio_local_enable_pin_output_driver(DDS_PDN_pin);
gpio_local_set_gpio_pin(DDS_PDN_pin);
gpio_local_enable_pin_output_driver(DDS_P0_pin);
gpio_local_clr_gpio_pin(DDS_P0_pin);
gpio_local_enable_pin_output_driver(DDS_P1_pin);
gpio_local_clr_gpio_pin(DDS_P1_pin);
gpio_local_enable_pin_output_driver(DDS_P2_pin);
gpio_local_clr_gpio_pin(DDS_P2_pin);
gpio_local_enable_pin_output_driver(DDS_P3_pin);
gpio_local_clr_gpio_pin(DDS_P3_pin);
gpio_local_enable_pin_output_driver(RXSW_pin);
gpio_local_clr_gpio_pin(RXSW_pin);
gpio_local_enable_pin_output_driver(TXSW_pin);
gpio_local_clr_gpio_pin(TXSW_pin);
gpio_local_enable_pin_output_driver(TPAbias_pin);
gpio_local_clr_gpio_pin(TPAbias_pin);
gpio_local_enable_pin_output_driver(GEN1_pin);
gpio_local_clr_gpio_pin(GEN1_pin);
gpio_local_enable_pin_output_driver(GEN2_pin);
gpio_local_clr_gpio_pin(GEN2_pin);
gpio_local_enable_pin_output_driver(PWM0_pin);
gpio_local_clr_gpio_pin(PWM0_pin);
gpio_local_disable_pin_output_driver(SD_detect_pin);
//configure all peripheral IO
static const gpio_map_t GCLK_GPIO_MAP =
{
{AVR32_SCIF_GCLK_0_1_PIN, AVR32_SCIF_GCLK_0_1_FUNCTION}
};
gpio_enable_module(GCLK_GPIO_MAP,
sizeof(GCLK_GPIO_MAP) / sizeof(GCLK_GPIO_MAP[0]));
genclk_enable_config(9, GENCLK_SRC_CLK_CPU, 2);
static const gpio_map_t SPI_GPIO_MAP =
{
{SPI1_SCK_PIN, SPI1_SCK_FUNCTION},
{SPI1_MOSI_PIN, SPI1_MOSI_FUNCTION},
{SPI1_MISO_PIN, SPI1_MISO_FUNCTION},
{SPI1_NPCS2_PIN, SPI1_NPCS2_FUNCTION}
};
gpio_enable_module(SPI_GPIO_MAP,
sizeof(SPI_GPIO_MAP) / sizeof(SPI_GPIO_MAP[0]));
spi_options_t SPI1_OPTIONS_0 =
{
.reg = 0, //! The SPI channel to set up.
.baudrate = 30000000, //! Preferred baudrate for the SPI.
.bits =16, //! Number of bits in each character (8 to 16).
.spck_delay =0, //! Delay before first clock pulse after selecting slave (in PBA clock periods).
.trans_delay =0, //! Delay between each transfer/character (in PBA clock periods).
.stay_act =0, //! Sets this chip to stay active after last transfer to it.
.spi_mode =1, //! Which SPI mode to use when transmitting.
.modfdis =1 //! Disables the mode fault detection.
};
spi_options_t SPI1_OPTIONS_3 =
{
.reg = 3, //! The SPI channel to set up.
.baudrate = 30000000, //! Preferred baudrate for the SPI.
.bits =8, //! Number of bits in each character (8 to 16).
.spck_delay =0, //! Delay before first clock pulse after selecting slave (in PBA clock periods).
.trans_delay =0, //! Delay between each transfer/character (in PBA clock periods).
.stay_act =1, //! Sets this chip to stay active after last transfer to it.
.spi_mode =0, //! Which SPI mode to use when transmitting.
.modfdis =1 //! Disables the mode fault detection.
};
spi_initMaster(SPI1, &SPI1_OPTIONS_0);
spi_selectionMode(SPI1,1,0,0);
spi_enable(SPI1);
spi_setupChipReg(SPI1,&SPI1_OPTIONS_0,PBA_SPEED);
spi_setupChipReg(SPI1,&SPI1_OPTIONS_3,PBA_SPEED);
spi_selectChip(SPI1, 3);
static const gpio_map_t USB_USART_GPIO_MAP =
{
{USB_USART_RX_PIN, USB_USART_RX_FUNCTION},
{USB_USART_TX_PIN, USB_USART_TX_FUNCTION},
{USB_USART_RTS_PIN, USB_USART_RTS_FUNCTION},
{USB_USART_CTS_PIN, USB_USART_CTS_FUNCTION}
};
gpio_enable_module(USB_USART_GPIO_MAP,
sizeof(USB_USART_GPIO_MAP) / sizeof(USB_USART_GPIO_MAP[0]));
static const usart_options_t USB_USART_OPTIONS =
{
.baudrate = 3000000,
.charlength = 8,
.paritytype = USART_NO_PARITY,
.stopbits = USART_1_STOPBIT,
.channelmode = USART_NORMAL_CHMODE
};
usart_init_hw_handshaking(USB_USART, &USB_USART_OPTIONS, PBA_SPEED);
static const gpio_map_t LCD_USART_GPIO_MAP =
{
{LCD_USART_RX_PIN, LCD_USART_RX_FUNCTION},
{LCD_USART_TX_PIN, LCD_USART_TX_FUNCTION}
};
gpio_enable_module(LCD_USART_GPIO_MAP,
sizeof(LCD_USART_GPIO_MAP) / sizeof(LCD_USART_GPIO_MAP[0]));
static const usart_options_t LCD_USART_OPTIONS =
{
.baudrate = 115200,
.charlength = 8,
.paritytype = USART_NO_PARITY,
.stopbits = USART_1_STOPBIT,
.channelmode = USART_NORMAL_CHMODE
};
usart_init_rs232(LCD_USART, &LCD_USART_OPTIONS, PBA_SPEED);
LCD_USART->cr|=AVR32_USART_CR_STTTO_MASK; //set timeout to stop until new character is received
LCD_USART->rtor=230; //set to timeout in 2ms
my_pdca_init_channel(LCD_USART_RX_PDCA_CHANNEL, (uint32_t)(&LCD_USART_buffer),(uint32_t)(sizeof(LCD_USART_buffer)),LCD_USART_RX_PDCA_PID,0,0, PDCA_TRANSFER_SIZE_BYTE);
pdca_disable(LCD_USART_RX_PDCA_CHANNEL);
my_pdca_init_channel(USB_USART_RX_PDCA_CHANNEL, (uint32_t)(&host_USART_buffer),(uint32_t)(sizeof(host_USART_buffer)),USB_USART_RX_PDCA_PID,0,0, PDCA_TRANSFER_SIZE_BYTE);
pdca_disable(USB_USART_RX_PDCA_CHANNEL);
USB_USART->cr|=AVR32_USART_CR_STTTO_MASK; //set timeout to stop until new character is received
USB_USART->rtor=15000; //set to timeout in 1ms
// GPIO pins used for SD/MMC interface
static const gpio_map_t SD_MMC_SPI_GPIO_MAP =
{
{SPI0_SCK_PIN, SPI0_SCK_FUNCTION }, // SPI Clock.
{SPI0_MISO_PIN, SPI0_MISO_FUNCTION}, // MISO.
{SPI0_MOSI_PIN, SPI0_MOSI_FUNCTION}, // MOSI.
{SPI0_NPCS0_PIN, SPI0_NPCS0_FUNCTION} // Chip Select NPCS.
};
//SPI options.
spi_options_t SD_spiOptions =
{
.reg = SD_MMC_SPI_NPCS,
.baudrate = SD_SPI_SPEED, // Defined in conf_sd_mmc_spi.h.
.bits = 8, // Defined in conf_sd_mmc_spi.h.
.spck_delay = 0,
.trans_delay = 0,
.stay_act = 1,
.spi_mode = 0,
.modfdis = 1
};
// Assign I/Os to SPI.
gpio_enable_module(SD_MMC_SPI_GPIO_MAP,sizeof(SD_MMC_SPI_GPIO_MAP) / sizeof(SD_MMC_SPI_GPIO_MAP[0]));
// Initialize as master.
spi_initMaster(SPI0, &SD_spiOptions);
// Set SPI selection mode: variable_ps, pcs_decode, delay.
spi_selectionMode(SPI0, 0, 0, 0);
// Enable SPI module.
spi_enable(SPI0);
// Initialize SD/MMC driver with SPI clock (PBA).
sd_mmc_spi_init(SD_spiOptions, PBA_SPEED);
tc_init_fast(FAST_TC);
tc_init_slow(SLOW_TC);
static const gpio_map_t DACIFB_GPIO_MAP =
{
{AVR32_DACREF_PIN,AVR32_DACREF_FUNCTION},
{AVR32_ADCREFP_PIN,AVR32_ADCREFP_FUNCTION},
{AVR32_ADCREFN_PIN,AVR32_ADCREFN_FUNCTION},
{DAC0A_pin, DAC0A_FUNCTION},
{DAC1A_pin, DAC1A_FUNCTION}
};
gpio_enable_module(DACIFB_GPIO_MAP, sizeof(DACIFB_GPIO_MAP) / sizeof(DACIFB_GPIO_MAP[0]));
dacifb_opt_t dacifb_opt = {
.reference = DACIFB_REFERENCE_EXT , // VDDANA Reference
.channel_selection = DACIFB_CHANNEL_SELECTION_A, // Selection Channels A&B
.low_power = false, // Low Power Mode
.dual = false, // Dual Mode
.prescaler_clock_hz = DAC_PRESCALER_CLK // Prescaler Clock (Should be 500Khz)
};
// DAC Channel Configuration
dacifb_channel_opt_t dacifb_channel_opt = {
.auto_refresh_mode = true, // Auto Refresh Mode
.trigger_mode = DACIFB_TRIGGER_MODE_MANUAL, // Trigger selection
.left_adjustment = false, // Right Adjustment
.data_shift = 0, // Number of Data Shift
.data_round_enable = false // Data Rouding Mode };
};
volatile avr32_dacifb_t *dacifb0 = &AVR32_DACIFB0; // DACIFB IP registers address
volatile avr32_dacifb_t *dacifb1 = &AVR32_DACIFB1; // DACIFB IP registers address
//The factory calibration for DADIFB is broken, so use manual calibration
//dacifb_get_calibration_data(DAC0,&dacifb_opt,0);
dacifb_opt.gain_calibration_value=0x0090;
dacifb_opt.offset_calibration_value=0x0153;
// configure DACIFB0
dacifb_configure(DAC0,&dacifb_opt,PBA_SPEED);
dacifb_configure_channel(DAC0,DACIFB_CHANNEL_SELECTION_A,&dacifb_channel_opt,DAC_PRESCALER_CLK);
dacifb_start_channel(DAC0,DACIFB_CHANNEL_SELECTION_A,PBA_SPEED);
//The factory calibration for DADIFB is broken, so use manual calibration
dacifb_set_value(DAC0,DACIFB_CHANNEL_SELECTION_A,false,1024);
//dacifb_get_calibration_data(DAC1, &dacifb_opt,1);
dacifb_opt.gain_calibration_value=0x0084;
dacifb_opt.offset_calibration_value=0x0102;
// configure DACIFB1
dacifb_configure(DAC1,&dacifb_opt,PBA_SPEED);
dacifb_configure_channel(DAC1,DACIFB_CHANNEL_SELECTION_A,&dacifb_channel_opt,DAC_PRESCALER_CLK);
dacifb_start_channel(DAC1,DACIFB_CHANNEL_SELECTION_A,PBA_SPEED);
dacifb_set_value(DAC1,DACIFB_CHANNEL_SELECTION_A,false,1024);
DAC0->dr0=2048;
DAC1->dr0=4095;
}
/**
* \brief Enable the USB generic clock
*
* \pre The USB generic clock must be configured to 48MHz.
* CONFIG_USBCLK_SOURCE and CONFIG_USBCLK_DIV must be defined with proper
* configuration. The selected clock source must also be configured.
*/
void sysclk_enable_usb(void)
{
sysclk_enable_pbb_module(SYSCLK_USBB_REGS);
sysclk_enable_hsb_module(SYSCLK_USBB_DATA);
genclk_enable_config(AVR32_PM_GCLK_USBB, CONFIG_USBCLK_SOURCE, CONFIG_USBCLK_DIV);
}
/*! \brief Main function. Execution starts here.
*/
int main(void)
{
uint32_t serial_number[4];
// Read Device-ID from SAM3U. Do this before enabling interrupts etc.
flash_read_unique_id(serial_number, sizeof(serial_number));
configure_console();
irq_initialize_vectors();
cpu_irq_enable();
// Initialize the sleep manager
sleepmgr_init();
#if !SAMD21 && !SAMR21
sysclk_init();
board_init();
#else
system_init();
#endif
//Tri-state XPROG pins
XPROGTarget_DisableTargetPDI();
//Convert serial number to ASCII for USB Serial number
for(unsigned int i = 0; i < 4; i++){
sprintf(usb_serial_number+(i*8), "%08x", (unsigned int)serial_number[i]);
}
usb_serial_number[32] = 0;
printf("ChipWhisperer-Lite Online. Firmware build: %s/%s\n", __TIME__, __DATE__);
printf("Serial number: %s\n", usb_serial_number);
/* Enable SMC */
pmc_enable_periph_clk(ID_SMC);
gpio_configure_pin(PIN_EBI_DATA_BUS_D0, PIN_EBI_DATA_BUS_FLAG1);
gpio_configure_pin(PIN_EBI_DATA_BUS_D1, PIN_EBI_DATA_BUS_FLAG1);
gpio_configure_pin(PIN_EBI_DATA_BUS_D2, PIN_EBI_DATA_BUS_FLAG1);
gpio_configure_pin(PIN_EBI_DATA_BUS_D3, PIN_EBI_DATA_BUS_FLAG1);
gpio_configure_pin(PIN_EBI_DATA_BUS_D4, PIN_EBI_DATA_BUS_FLAG1);
gpio_configure_pin(PIN_EBI_DATA_BUS_D5, PIN_EBI_DATA_BUS_FLAG1);
gpio_configure_pin(PIN_EBI_DATA_BUS_D6, PIN_EBI_DATA_BUS_FLAG1);
gpio_configure_pin(PIN_EBI_DATA_BUS_D7, PIN_EBI_DATA_BUS_FLAG1);
gpio_configure_pin(PIN_EBI_NRD, PIN_EBI_NRD_FLAGS);
gpio_configure_pin(PIN_EBI_NWE, PIN_EBI_NWE_FLAGS);
gpio_configure_pin(PIN_EBI_NCS0, PIN_EBI_NCS0_FLAGS);
/* We don't use address mapping so don't enable this */
/*
gpio_configure_pin(PIN_EBI_ADDR_BUS_A1, PIN_EBI_ADDR_BUS_FLAG1);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A2, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A3, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A4, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A5, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A6, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A7, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A8, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A9, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A10, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A11, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A12, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A13, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A14, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A15, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A16, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A17, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A18, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A19, PIN_EBI_ADDR_BUS_FLAG2);
gpio_configure_pin(PIN_EBI_ADDR_BUS_A20, PIN_EBI_ADDR_BUS_FLAG2);
*/
/* Configure EBI I/O for PSRAM connection */
printf("Setting up FPGA Communication\n");
/* complete SMC configuration between PSRAM and SMC waveforms. */
smc_set_setup_timing(SMC, 0, SMC_SETUP_NWE_SETUP(0)
| SMC_SETUP_NCS_WR_SETUP(1)
| SMC_SETUP_NRD_SETUP(1)
| SMC_SETUP_NCS_RD_SETUP(1));
smc_set_pulse_timing(SMC, 0, SMC_PULSE_NWE_PULSE(1)
| SMC_PULSE_NCS_WR_PULSE(1)
| SMC_PULSE_NRD_PULSE(3)
| SMC_PULSE_NCS_RD_PULSE(1));
smc_set_cycle_timing(SMC, 0, SMC_CYCLE_NWE_CYCLE(2)
| SMC_CYCLE_NRD_CYCLE(4));
smc_set_mode(SMC, 0, SMC_MODE_READ_MODE | SMC_MODE_WRITE_MODE
| SMC_MODE_DBW_BIT_8);
ui_init();
// Start USB stack to authorize VBus monitoring
udc_start();
/* Enable PCLK0 at 96 MHz */
genclk_enable_config(GENCLK_PCK_0, GENCLK_PCK_SRC_MCK, GENCLK_PCK_PRES_1);
//Following is 60MHz version
//genclk_enable_config(GENCLK_PCK_0, GENCLK_PCK_SRC_PLLBCK, GENCLK_PCK_PRES_4);
printf("Event Loop Entered, waiting...\n");
// The main loop manages only the power mode
// because the USB management is done by interrupt
while (true) {
sleepmgr_enter_sleep();
}
}
/*! \brief Main function. Execution starts here.
*/
int main(void)
{
uint32_t serial_number[4];
// Read Device-ID from SAM3U. Do this before enabling interrupts etc.
flash_read_unique_id(serial_number, sizeof(serial_number));
configure_console();
irq_initialize_vectors();
cpu_irq_enable();
// Initialize the sleep manager
sleepmgr_init();
#if !SAMD21 && !SAMR21
sysclk_init();
board_init();
#else
system_init();
#endif
fpga_program_init();
tps56520_init();
//Init CDCE906 Chip
cdce906_init();
//Convert serial number to ASCII for USB Serial number
for(unsigned int i = 0; i < 4; i++){
sprintf(usb_serial_number+(i*8), "%08x", (unsigned int)serial_number[i]);
}
usb_serial_number[32] = 0;
printf("ChipWhisperer-CW305 Online. Firmware build: %s/%s\n", __TIME__, __DATE__);
printf("Serial number: %s\n", usb_serial_number);
/* Enable SMC */
pmc_enable_periph_clk(ID_SMC);
fpga_pins(true);
/* Configure EBI I/O for PSRAM connection */
printf("Setting up FPGA Communication\n");
/* complete SMC configuration between PSRAM and SMC waveforms. */
smc_set_setup_timing(SMC, 0, SMC_SETUP_NWE_SETUP(0)
| SMC_SETUP_NCS_WR_SETUP(1)
| SMC_SETUP_NRD_SETUP(1)
| SMC_SETUP_NCS_RD_SETUP(1));
smc_set_pulse_timing(SMC, 0, SMC_PULSE_NWE_PULSE(3)
| SMC_PULSE_NCS_WR_PULSE(1)
| SMC_PULSE_NRD_PULSE(3)
| SMC_PULSE_NCS_RD_PULSE(1));
smc_set_cycle_timing(SMC, 0, SMC_CYCLE_NWE_CYCLE(4)
| SMC_CYCLE_NRD_CYCLE(4));
smc_set_mode(SMC, 0, SMC_MODE_READ_MODE | SMC_MODE_WRITE_MODE
| SMC_MODE_DBW_BIT_8);
ui_init();
// Start USB stack to authorize VBus monitoring
udc_start();
/* Enable PCLK0 at 96 MHz */
genclk_enable_config(GENCLK_PCK_0, GENCLK_PCK_SRC_MCK, GENCLK_PCK_PRES_1);
//Following is 60MHz version
//genclk_enable_config(GENCLK_PCK_0, GENCLK_PCK_SRC_PLLBCK, GENCLK_PCK_PRES_4);
printf("Event Loop Entered, waiting...\n");
//Turn off FPGA pins for now, will be enabled in event loop
fpga_pins(false);
// The main loop manages only the power mode
// because the USB management is done by interrupt
while (true) {
sleepmgr_enter_sleep();
process_events();
}
}
/**
* \brief Main Application Routine
* -Initialize the system clocks \n
* -Configure and Enable the PWMA Generic clock \n
* -Configure and Enable the PWMA Module \n
* -Load Duty cycle value using Interlinked multi-value mode \n
* -Register and Enable the Interrupt \n
* -Enter into sleep mode \n
*/
int main (void)
{
uint32_t div;
bool config_status = FAIL;
bool set_value_status = FAIL;
/*
* Duty cycle value to be loaded. As Two channels are used
* in this example, two values has been assigned. Initialize the unused
* channel duty cycle value to 0, as it may take some garbage values
* and will return FAIL while updating duty cycle as the value might
* exceed the limit NOTE : Maximum four values can be loaded at a time,
* as the channel limitation for Interlinked multi-value mode is four.
*/
uint16_t duty_cycle[] = {11,5,0,0};
/* PWMA Pin and Function Map */
static const gpio_map_t PWMA_GPIO_MAP = {
{EXAMPLE_PWMA_PIN1, EXAMPLE_PWMA_FUNCTION1},
{EXAMPLE_PWMA_PIN2, EXAMPLE_PWMA_FUNCTION2},
};
/* Enable the PWMA Pins */
gpio_enable_module(PWMA_GPIO_MAP,
sizeof(PWMA_GPIO_MAP) / sizeof(PWMA_GPIO_MAP[0]));
/*
* Calculate the division factor value to be loaded and
* Enable the Generic clock
*/
div = div_ceil((sysclk_get_pba_hz()) , EXAMPLE_PWMA_GCLK_FREQUENCY);
genclk_enable_config(EXAMPLE_PWMA_GCLK_ID,EXAMPLE_PWMA_GCLK_SOURCE,div);
/*
* Initialize the System clock
* Note: Clock should be configured in conf_clock.h
*/
sysclk_init();
/* Initialize the delay routines */
delay_init(sysclk_get_cpu_hz());
/*
* Configure and Enable the PWMA Module. The LED will turned if
* configuration fails because of invalid argument.
*/
config_status = pwma_config_enable(pwma, EXAMPLE_PWMA_OUTPUT_FREQUENCY,
EXAMPLE_PWMA_GCLK_FREQUENCY, PWMA_SPREAD);
/* Error in configuring the PWMA module */
if (config_status == FAIL){
while (1) {
delay_ms(10);
gpio_tgl_gpio_pin(ERROR_LED);
}
}
/* Load the duty cycle values using Interlinked multi-value mode */
set_value_status = pwma_set_multiple_values(pwma,
((EXAMPLE_PWMA_CHANNEL_ID1<<0) | (EXAMPLE_PWMA_CHANNEL_ID2<<8)),
(uint16_t*)&duty_cycle);
/* Error in loading the duty cycle value */
if (set_value_status == FAIL){
while (1) {
delay_ms(10);
gpio_tgl_gpio_pin(ERROR_LED);
}
}
/* Disable global interrupts */
cpu_irq_disable();
/*
* Initialize the interrupt vectors
* Note: This function adds nothing for IAR as the interrupts are
* handled by the IAR compiler itself. It provides an abstraction
* between GCC & IAR compiler to use interrupts.
* Refer function implementation in interrupt_avr32.h
*/
irq_initialize_vectors();
/*
* Register the ACIFB interrupt handler
* Note: This function adds nothing for IAR as the interrupts are
* handled by the IAR compiler itself. It provides an abstraction
* between GCC & IAR compiler to use interrupts.
* Refer function implementation in interrupt_avr32.h
*/
irq_register_handler(&tofl_irq, AVR32_PWMA_IRQ, PWMA_INTERRUPT_PRIORITY);
/* Enable the Timebase overflow interrupt */
pwma->ier = AVR32_PWMA_IER_TOFL_MASK;
/* Enable global interrupt */
cpu_irq_enable();
/* Go to sleep mode */
while(1){
/* Enter into sleep mode */
pm_sleep(AVR32_PM_SMODE_FROZEN);
}
} /* End of main() */