Beispiel #1
0
/**
*	@fn			nm_uart_reconfigure
*	@brief		Reconfigures the UART interface
*	@param [in]	ptr
*				Pointer to a DWORD containing baudrate at this moment.
*	@return		M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
*	@author		Viswanathan Murugesan
*	@date		22 OCT 2014
*	@version	1.0
*/
sint8 nm_uart_reconfigure(void *ptr)
{
	tstrNmUartDefault strUart;
	sint8 s8Ret = M2M_SUCCESS;
	uint8 b[HDR_SZ+1];

	/*write reg*/
	b[0] = 0xa5;
	b[1] = 5;
	b[2] = 0;
	b[3] = 0;
	b[4] = 0;
	b[5] = 0;
	b[6] = 0;
	b[7] = 0;
	b[8] = 0;
	b[9] = (uint8)((*(unsigned long *)ptr) & 0x000000ff);
	b[10] = (uint8)(((*(unsigned long *)ptr) & 0x0000ff00)>>8);
	b[11] = (uint8)(((*(unsigned long *)ptr) & 0x00ff0000)>>16);
	b[12] = (uint8)(((*(unsigned long *)ptr) & 0xff000000)>>24);

	b[2] = get_cs(&b[1],HDR_SZ);

	get_cs(&b[1],HDR_SZ);

	strUart.pu8Buf = b;
	strUart.u16Sz = sizeof(b);

	if(M2M_SUCCESS != nm_bus_ioctl(NM_BUS_IOCTL_W, &strUart))
	{
		M2M_ERR("write error\n");
		s8Ret = M2M_ERR_BUS_FAIL;
	}
	else
	{
		if(!nm_bus_get_chip_type())
		{
			//check for the ack from the SAMD21 for the packet reception.
			strUart.u16Sz = 1;
			if(M2M_SUCCESS != nm_bus_ioctl(NM_BUS_IOCTL_R, &strUart))
			{
				s8Ret = M2M_ERR_BUS_FAIL;
			}
			if(b[0] == 0xAC)
			{
				M2M_DBG("Successfully sent the UART reconfigure command\n");
			}
			else
			{
				M2M_ERR("write error\n");
				s8Ret = M2M_ERR_BUS_FAIL;
			}
		}
	}

	return s8Ret;
}
Beispiel #2
0
double cyclic_ms_difference (CS *cs1, CS *cs2) {
    double sum = 0.0;
    int ih, ic, ip;
    for (ic=0; ic<cs1->nchan; ic++) {
        for (ip=0; ip<cs1->npol; ip++) {
            for (ih=0; ih<cs1->nharm; ih++) {
                fftwf_complex *d1 = get_cs(cs1, ih, ip, ic);
                fftwf_complex *d2 = get_cs(cs2, ih, ip, ic);
                fftwf_complex diff = (*d1) - (*d2);
                sum += creal(diff*conj(diff));
            }
        }
    }
    return(sum);
}
Beispiel #3
0
void StartProcISR(int new_pid, int func_addr) 
{
		
	MyBzero((char *) &pcb[new_pid], sizeof(pcb_t));	//clear the PCB of the new pid
	//phase 5
	MyBzero((char *) &msg_q[new_pid], sizeof(msg_q_t));

	pcb[new_pid].state = READY;		//set its state to READY
	if(new_pid != 0)			//if new pid is not 0 (IdleProc),
	{
	      EnQ(new_pid, &ready_q);	//then, enqueue this new pid into the ready queue
	}

	//build initial trapframe in proc stack
	MyBzero((char *)&proc_stack[new_pid], PROC_STACK_SIZE);	//call MyBzero() to clear the stack 1st

	pcb[new_pid].TF_ptr = (TF_t *) &proc_stack[new_pid][PROC_STACK_SIZE - sizeof(TF_t)];	//set TF_ptr of PCB to close to end (top) of stack

	pcb[new_pid].TF_ptr->eflags = EF_DEFAULT_VALUE|EF_INTR;	//set INTR flag   
	pcb[new_pid].TF_ptr->cs = get_cs();				//standard fair
	pcb[new_pid].TF_ptr->ds = get_ds();				//standard fair
	pcb[new_pid].TF_ptr->es = get_es();				//standard fair
	pcb[new_pid].TF_ptr->fs = get_fs();				//standard fair
	pcb[new_pid].TF_ptr->gs = get_gs();				//standard fair

	pcb[new_pid].TF_ptr->eip = func_addr;

}
Beispiel #4
0
void StartProcISR(int new_pid, int func_addr) {
	MyBzero( (char*) &pcb[new_pid], sizeof (pcb_t));
	//clear process msg queue
	MyBzero( (char*) &msg_q[new_pid], sizeof (msg_q_t));

	pcb[new_pid].state= READY;
	
	if(new_pid > 0 ) {
	  EnQ(new_pid, &ready_q);
	}
	
	MyBzero( (char*) &proc_stack[new_pid], PROC_STACK_SIZE);
	pcb[new_pid].TF_ptr =(TF_t*) &proc_stack[new_pid][PROC_STACK_SIZE]; 
	pcb[new_pid].TF_ptr--;	
	
	pcb[new_pid].TF_ptr->eflags = EF_DEFAULT_VALUE|EF_INTR; // set INTR flag
   	pcb[new_pid].TF_ptr->cs = get_cs();                     // standard fair
   	pcb[new_pid].TF_ptr->ds = get_ds();                     // standard fair
   	pcb[new_pid].TF_ptr->es = get_es();                     // standard fair
   	pcb[new_pid].TF_ptr->fs = get_fs();                     // standard fair
   	pcb[new_pid].TF_ptr->gs = get_gs();                     // standard fair
	

	pcb[new_pid].TF_ptr->eip = (unsigned int) func_addr;
	
}
Beispiel #5
0
void StartProcISR(int new_pid) {
   	//clear the PCB of the new pid
   	MyBzero((char *) &pcb[new_pid], sizeof(pcb_t));
 
   	//set its state to READY
	pcb[new_pid].state = READY;
 
   	//if new pid is not 0 (IdleProc),
      	//then, enqueue this new pid into the ready queue*/
      	if(new_pid != 0){
		EnQ(new_pid, &ready_q);
	}
 	
	//Clears the stack
	MyBzero((char *) &proc_stack[new_pid], PROC_STACK_SIZE);

	//Set TF_ptr of PCB close to end (top) of stack, then fill out
	pcb[new_pid].TF_ptr = (TF_t *) &proc_stack[new_pid][PROC_STACK_SIZE - sizeof(TF_t)];

	pcb[new_pid].TF_ptr->eflags = EF_DEFAULT_VALUE|EF_INTR; // set INTR flag
	pcb[new_pid].TF_ptr->cs = get_cs();			// standard fair
	pcb[new_pid].TF_ptr->ds = get_ds();			// standard fair
	pcb[new_pid].TF_ptr->es = get_es();			// standard fair
	pcb[new_pid].TF_ptr->fs = get_fs();			// standard fair
	pcb[new_pid].TF_ptr->gs = get_gs();			// standard fair

	if(new_pid == 0){
		pcb[new_pid].TF_ptr->eip = (unsigned int) IdleProc; // if pid is 0, points to IdleProc 
	}else{
		pcb[new_pid].TF_ptr->eip = (unsigned int) UserProc; // or UserProc
	}
}
Beispiel #6
0
/* c_intr_sysall ------------------------------------------------------------*/
W
c_intr_syscall(unsigned long apic, unsigned long sysid,
		unsigned long arg1, unsigned long arg2, unsigned long arg3,
		unsigned long arg4, unsigned long arg5, unsigned long arg6,
		unsigned long arg7)
{
#if 0
	extern unsigned long	k_nest;
	short	cs = get_cs();
	short	ds = get_ds();
	short	ss = get_ss();
#endif
	W	ret;

	if (apic)
		apic = 1;
	if (cpu_num == 0)
		apic = 0;
#if 0
	(*tron_syscall_p)(sysid, arg1, arg2, arg3);
	printk("SYSCALL(%x, %x, %x, %x, %x)\n", sysid, apic, arg1, arg2, arg3);
	printk("SYSCALL(%x, %x, %x, %x)\n", sysid, apic, c_tskid[apic], arg1);
	printk("c_tskid = %x, cuurentproc-id = %x(%x)\n", c_tskid[apic],
		current_proc[apic]->id, k_nest);
#else
	ret = tron_syscall(apic, sysid,
			arg1, arg2, arg3, arg4, arg5, arg6, arg7);
	current_proc[apic]->reg[EAX] = ret;	/* set return value */
	return ret;
#endif
}
Beispiel #7
0
CODE16

/*
 * This function is called by i16_crt0 (or the equivalent)
 * to set up our basic virtual memory layout variables
 * to settings appropriate when running in 16-bit real mode,
 * before calling i16_main().
 */
void i16_init_vm(void)
{
	/* Find our 16-bit code/data/everything segment.  */
	real_cs = get_cs();

	/*
	 * Find out where the bottom of physical memory is.
	 * (We won't be able to directly use it for 32-bit accesses
	 * until we actually get into 32-bit mode.)
	 */
	phys_mem_va = -((unsigned)real_cs << 4);

	/*
	 * The base of linear memory is at the same place,
	 * at least until we turn paging on.
	 */
	linear_base_va = phys_mem_va;
}
void SpawnISR(int pid, func_ptr_t addr)
{
	
	MyBZero(user_stacks[pid], USER_STACK_SIZE);
	MyBZero((char *) &mboxes[pid], sizeof(mbox_t));

	// 1st. point to just above of user stack, then drop by 64 bytes (tf_t)
	pcbs[pid].tf_p = (tf_t *)&user_stacks[pid][USER_STACK_SIZE];
	pcbs[pid].tf_p--;    // pointer arithmetic, now points to trapframe

	// fill in CPU's register context
	pcbs[pid].tf_p->eflags = EF_DEFAULT_VALUE|EF_INTR;


	//pcbs[pid].tf_p->eip = (unsigned int)SimpleProc; // new process code
	pcbs[pid].tf_p->eip = (unsigned int)addr;

	pcbs[pid].tf_p->cs = get_cs();
	pcbs[pid].tf_p->ds = get_ds();
	pcbs[pid].tf_p->es = get_es();
	pcbs[pid].tf_p->fs = get_fs();
	pcbs[pid].tf_p->gs = get_gs();

	pcbs[pid].tick_count = pcbs[pid].total_tick_count = 0;
	pcbs[pid].state = READY;

	if(pid != 0) EnQ(pid, &ready_q);  // IdleProc (PID 0) is not queued
}
Beispiel #9
0
void ForkISR(int pid, int* addr, int size, int value)
{
	// Only thing new for ForkISR
	int i;
    int * p;
	for(i=0;i<NUM_PAGE;i++)
	{
		if(pages[i].owner == -1)
			break;
	}

	// The rest was a copy from spwnisr.
	pages[i].owner = pid;
	MyBzero((char *)pages[i].addr, USER_STACK_SIZE);

	MyBzero((void *)user_stacks[pid], USER_STACK_SIZE);
	MyBzero(&mboxes[pid], sizeof(mbox_t));

    p = (int *) (pages[i].addr + USER_STACK_SIZE);
    p--;
    *p = value;

	pcbs[pid].tf_p = (tf_t*) p;
	pcbs[pid].tf_p--;    // points to trap frame

    MyMemCpy((char *)(pages[i].addr), (char *)(addr), size);

	pcbs[pid].tf_p->eflags = EF_DEFAULT_VALUE|EF_INTR;

	pcbs[pid].tf_p->eip = pages[i].addr;
	pcbs[pid].tf_p->cs = get_cs();
	pcbs[pid].tf_p->ds = get_ds();
	pcbs[pid].tf_p->es = get_es();
	pcbs[pid].tf_p->fs = get_fs();
	pcbs[pid].tf_p->gs = get_gs();

	pcbs[pid].tick_count = pcbs[pid].total_tick_count = 0;
	pcbs[pid].state = READY;
	pcbs[pid].ppid = cur_pid;

	EnQ(pid, &ready_q);
}
Beispiel #10
0
int Build_s::build(Build_m m_c,Read_res r_r,Res_rtm rt)
{
 get_ss(m_c,r_r);
 get_cs(rt);
 rt_fit(m_c);
}
Beispiel #11
0
void SetIDTEntry(int entry_num, func_ptr_t entry_addr){
    struct i386_gate *gateptr = &idt_table[entry_num];
    fill_gate(gateptr, (int)entry_addr, get_cs(), ACC_INTR_GATE,0);
}
Beispiel #12
0
void SetEntry(int entry_num, func_ptr_t func_ptr) {
	struct i386_gate *gateptr = &IDT_ptr[entry_num];
	fill_gate(gateptr, (int) func_ptr, get_cs(), ACC_INTR_GATE,0);

}
Beispiel #13
0
void tokeniser::get_next ()
	{
	tok	t;
	int	c, cc;
	
	restart:
	sym_.cur_cs = 0;
	if (file_state) {
	reread:
		if (next <= limit) {
			cur_chr = *next++;
		reswitch:
			cur_cmd = sym_.cat_code(cur_chr);
			switch (cur_input.state_field + cur_cmd) {
				any_state(commands::IGNORE):
				skip_blanks(commands::SPACER):
				new_line(commands::SPACER):
					goto reread;
				
				any_state(commands::ESCAPE):
					get_cs();
				   cur_cmd = sym_.eq_type(sym_.cur_cs);
					cur_chr = sym_.equiv(sym_.cur_cs);
					if (cur_cmd >= commands::OUTER_CALL)
						check_outer_validity();
					break;
				
				any_state(commands::ACTIVE_CHAR):
					sym_.cur_cs = sym_.active_base[cur_chr];
				   cur_cmd = sym_.eq_type(sym_.cur_cs);
					cur_chr = sym_.equiv(sym_.cur_cs);
					cur_input.state_field = MID_LINE;
					if (cur_cmd >= commands::OUTER_CALL)
						check_outer_validity();
					break;
				
				any_state(commands::SUP_MARK):
					if (cur_chr != *next
						 || next >= limit
						 || (c = next[1]) >= 0200) {
						cur_input.state_field = MID_LINE;
						break;
						}
				   next += 2;
					if (is_hex(c) && next <= limit) {
						cc = *next;
						if (is_hex(cc)) {
							next++;
							hex_to_cur_chr(c, cc);
							goto reswitch;
							}
						}
					if (c < 0100) {
						cur_chr = c + 0100;
						} 
					else {
						cur_chr = c - 0100;
						}
					goto reswitch;
					
			   any_state(commands::INVALID_CHAR):
					throw tex::error("Text line contains an invalid character.");
			
				mid_line(commands::SPACER):
					cur_input.state_field = SKIP_BLANKS;
				   cur_chr = ' ';
					break;
			
				mid_line(commands::CAR_RET):
					next = limit + 1;
				   cur_cmd = commands::SPACER;
					cur_chr = ' ';
					break;
					
				skip_blanks(commands::CAR_RET):
				any_state(commands::COMMENT):
					next = limit + 1;
				   goto reread;
				
				new_line(commands::CAR_RET):
					next = limit + 1;
				   sym_.cur_cs = sym_.par_cs;
					cur_cmd = sym_.eq_type(sym_.cur_cs);
					cur_chr = sym_.equiv(sym_.cur_cs);
					if (cur_cmd >= commands::OUTER_CALL)
						check_outer_validity();
					break;
			
				mid_line(commands::LEFT_BRACE):
					incr(align_state);
				   break;

				skip_blanks(commands::LEFT_BRACE):
				new_line(commands::LEFT_BRACE):
					cur_input.state_field = MID_LINE;
				   incr(align_state);
					break;
					
			   mid_line(commands::RIGHT_BRACE):
					decr(align_state);
				   break;
			
			   skip_blanks(commands::RIGHT_BRACE):
			   new_line(commands::RIGHT_BRACE):
				   cur_input.state_field = MID_LINE;
				   decr(align_state);
					break;
			
			   delims(SKIP_BLANKS):
			   delims(NEW_LINE):
					cur_input.state_field = MID_LINE;
				   break;

				default:
					break;
				}
			} 
		else {
Beispiel #14
0
/**
*	@fn			nm_uart_write_block
*	@brief		Write block of data
*	@param [in]	u32Addr
*				Start address
*	@param [in]	puBuf
*				Pointer to the buffer holding the data to be written
*	@param [in]	u16Sz
*				Number of bytes to write. The buffer size must be >= u16Sz
*	@return		M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
*	@author		Dina El Sissy
*	@date		13 AUG 2012
*	@version	1.0
*/
sint8 nm_uart_write_block(uint32 u32Addr, uint8 *puBuf, uint16 u16Sz)
{
	tstrNmUartDefault strUart;
	sint8 s8Ret = M2M_SUCCESS;
	static uint8 au8Buf[HDR_SZ+1];

	au8Buf[0] = 0xa5;
	au8Buf[1] = 3;
	au8Buf[2] = 0;
	au8Buf[3] = (uint8)(u16Sz & 0x00ff);
	au8Buf[4] = (uint8)((u16Sz & 0xff00)>>8);
	au8Buf[5] = (uint8)(u32Addr & 0x000000ff);
	au8Buf[6] = (uint8)((u32Addr & 0x0000ff00)>>8);
	au8Buf[7] = (uint8)((u32Addr & 0x00ff0000)>>16);
	au8Buf[8] = (uint8)((u32Addr & 0xff000000)>>24);
	au8Buf[9] = 0;
	au8Buf[10] = 0;
	au8Buf[11] = 0;
	au8Buf[12] = 0;

	au8Buf[2] = get_cs(&au8Buf[1],HDR_SZ);

	strUart.pu8Buf = au8Buf;
	strUart.u16Sz = sizeof(au8Buf);

	if(M2M_SUCCESS != nm_bus_ioctl(NM_BUS_IOCTL_W, &strUart))
	{
		M2M_ERR("write error\n");
		s8Ret = M2M_ERR_BUS_FAIL;
	}
	else
	{
		if(!nm_bus_get_chip_type())
		{
			//check for the ack from the SAMD21 for the packet reception.
			strUart.u16Sz = 1;
			if(M2M_SUCCESS != nm_bus_ioctl(NM_BUS_IOCTL_R, &strUart))
			{
				s8Ret = M2M_ERR_BUS_FAIL;
			}
			if(au8Buf[0] == 0xAC)
			{
				M2M_DBG("Successfully sent the block Write command\n");
				strUart.pu8Buf = puBuf;
				strUart.u16Sz = u16Sz;

				if(M2M_SUCCESS != nm_bus_ioctl(NM_BUS_IOCTL_W, &strUart))
				{
					M2M_ERR("write error\n");
					s8Ret = M2M_ERR_BUS_FAIL;
				}
				else
				{
					//check for the ack from the SAMD21 for the payload reception.
					strUart.pu8Buf = au8Buf;
					strUart.u16Sz = 1;
					if(M2M_SUCCESS != nm_bus_ioctl(NM_BUS_IOCTL_R, &strUart))
					{
						s8Ret = M2M_ERR_BUS_FAIL;
					}
					if(au8Buf[0] == 0xAC)
					{
						M2M_DBG("Successfully sent the data payload\n");
					}
					else
					{
						M2M_ERR("write error\n");
						s8Ret = M2M_ERR_BUS_FAIL;
					}
				}
			}
			else
			{
				M2M_ERR("write error (Error sending the block write command)\n");
				s8Ret = M2M_ERR_BUS_FAIL;
			}
		}
		else
		{
			strUart.pu8Buf = puBuf;
			strUart.u16Sz = u16Sz;

			if(M2M_SUCCESS != nm_bus_ioctl(NM_BUS_IOCTL_W, &strUart))
			{
				M2M_ERR("write error\n");
				s8Ret = M2M_ERR_BUS_FAIL;
			}
		}
	}
	return s8Ret;
}
Beispiel #15
0
 sint8 nm_uart_read_reg_with_ret(uint32 u32Addr, uint32* pu32RetVal)
{
	tstrNmUartDefault strUart;
	sint8 s8Ret = M2M_SUCCESS;
	uint8 b [HDR_SZ+1];
	uint8 rsz;

	/*read reg*/
	b[0] = 0xa5;
	b[1] = 0;
	b[2] = 0;
	b[3] = 0;
	b[4] = 0;
	b[5] = (uint8)(u32Addr & 0x000000ff);
	b[6] = (uint8)((u32Addr & 0x0000ff00)>>8);
	b[7] = (uint8)((u32Addr & 0x00ff0000)>>16);
	b[8] = (uint8)((u32Addr & 0xff000000)>>24);
	b[9] = 0;
	b[10] = 0;
	b[11] = 0;
	b[12] = 0;

	b[2] = get_cs(&b[1],HDR_SZ);

	rsz = 4;
	strUart.pu8Buf = b;
	strUart.u16Sz = sizeof(b);

	if(M2M_SUCCESS == nm_bus_ioctl(NM_BUS_IOCTL_W, &strUart))
	{
		if(!nm_bus_get_chip_type())
		{
			strUart.u16Sz = 1;
			if(M2M_SUCCESS != nm_bus_ioctl(NM_BUS_IOCTL_R, &strUart))
			{
				s8Ret = M2M_ERR_BUS_FAIL;
			}
			if(b[0] == 0xAC)
			{
				M2M_DBG("Successfully sent the command\n");
				strUart.u16Sz = rsz;
				if(M2M_SUCCESS != nm_bus_ioctl(NM_BUS_IOCTL_R, &strUart))
				{
					s8Ret = M2M_ERR_BUS_FAIL;
				}
			}
			else
			{
				s8Ret = M2M_ERR_BUS_FAIL;
			}
		}
		else
		{
			strUart.u16Sz = rsz;
			if(M2M_SUCCESS != nm_bus_ioctl(NM_BUS_IOCTL_R, &strUart))
			{
				s8Ret = M2M_ERR_BUS_FAIL;
			}
		}
	}
	else
	{
		M2M_ERR("failed to send cfg bytes\n");
		s8Ret = M2M_ERR_BUS_FAIL;
	}
	/*TODO: this should be the way we read the register since the cortus is little endian*/
	/**pu32RetVal = b[0] | ((uint32)b[1] << 8) | ((uint32)b[2] << 16) | ((uint32)b[3] << 24);*/

	*pu32RetVal = ((uint32)b[0] << 24) | ((uint32)b[1] << 16) | ((uint32)b[2] << 8) | b[3];

	return s8Ret;
}