/** Initialized the RF configurations and powre up the RF.
* Use this function to initialize RF configurations.
* Note that the pipe isn't opened in this function,
* please use "rf_rcv_pipe_config" after using this
* function to configure RX pipe.
*
* @param in_channel RF Frequency (in_channel + 2400MHz)
* @param in_datarate Data rate of the RF transmission. (1Mbps or 2Mbps)
* @param in_output_power RF output power configuration.
* @param in_auto_retr Enable auto retransmission or not.
* @param in_auto_retr_delay Auto retransmission delay.
* @param in_addr_width Address width configuration for both PTX and PRX pipe.
* @param in_crc_mode CRC enable or disable configuration.
* @param in_spi_clk_rate SPI clock rate. (SPI speed)
* @param in_rf_int RF interrupt enable bit.
*/
void epl_rf_en_init(unsigned char in_channel, epl_rf_en_datarate_t in_datarate, char in_output_power, unsigned char in_auto_retr, unsigned int in_auto_retr_delay, char in_addr_width, epl_rf_en_crc_mode_t in_crc_mode, unsigned char in_rf_int)
{
RFCKEN = 1; // RF clock enable.
CE_LOW();
//--- Default static setup. These setting is optimized to match the RF protocol with nRF24E1. ---//
hal_nrf_close_pipe(HAL_NRF_ALL); // Close all pipes first. By default, pipe0 and pipe1 are opened.
hal_nrf_set_datarate(in_datarate);
hal_nrf_set_auto_retr(in_auto_retr, in_auto_retr_delay); // First parameter is set to zero indicating the auto retransmission is off.
hal_nrf_set_output_power(in_output_power); // Maximum radio output power (0dbm).
hal_nrf_set_crc_mode(in_crc_mode);
hal_nrf_set_address_width(in_addr_width); // Both RX and TX's address width are Configured.
hal_nrf_set_operation_mode(HAL_NRF_PTX); // Enter RF TX mode
hal_nrf_set_rf_channel(in_channel);
hal_nrf_set_power_mode(HAL_NRF_PWR_UP); // Power up radio
hal_nrf_get_clear_irq_flags();
// IEN1 RF interrupt enable bit
RF = in_rf_int;
}
void radio_sb_init (const uint8_t *address, hal_nrf_operation_mode_t operational_mode)
{
hal_nrf_close_pipe(HAL_NRF_ALL); // First close all radio pipes
// Pipe 0 and 1 open by default
hal_nrf_open_pipe(HAL_NRF_PIPE0, FALSE); // Open pipe0, without/autoack
hal_nrf_set_crc_mode(HAL_NRF_CRC_16BIT); // Operates in 16bits CRC mode
hal_nrf_set_auto_retr(0, RF_RETRANS_DELAY); // Disables auto retransmit
hal_nrf_set_address_width(HAL_NRF_AW_5BYTES); // 5 bytes address width
hal_nrf_set_address(HAL_NRF_TX, address); // Set device's addresses
hal_nrf_set_address(HAL_NRF_PIPE0, address); // Sets recieving address on
// pipe0
if(operational_mode == HAL_NRF_PTX) // Mode depentant settings
{
hal_nrf_set_operation_mode(HAL_NRF_PTX); // Enter TX mode
}
else
{
hal_nrf_set_operation_mode(HAL_NRF_PRX); // Enter RX mode
hal_nrf_set_rx_pload_width((uint8_t)HAL_NRF_PIPE0, RF_PAYLOAD_LENGTH);
// Pipe0 expect
// PAYLOAD_LENGTH byte payload
// PAYLOAD_LENGTH in radio.h
}
hal_nrf_set_rf_channel(RF_CHANNEL); // Operating on static channel
// Defined in radio.h.
// Frequenzy =
// 2400 + RF_CHANNEL
hal_nrf_set_power_mode(HAL_NRF_PWR_UP); // Power up device
hal_nrf_set_datarate(HAL_NRF_250KBPS); // Uncomment this line for
// compatibility with nRF2401
// and nRF24E1
//hal_nrf_set_output_power(hal_nrf_output_power_t power); //default reset value is 0dbm
// Wait for the radio to power up, max. 4.5ms depending on crystal Ls
Timeout_SetTimeout2(5);
while(!Timeout_IsTimeout2());
radio_set_status (RF_IDLE); // Radio now ready
}
void gzll_init(void)
{
uint32_t flag;
uint8_t temp_adr[GZLL_ADDRESS_WIDTH] = GZLL_DEFAULT_ADDRESS_PIPE1;
flag = gzll_interupts_save();
GZLL_RFCE_LOW();
hal_nrf_enable_ack_payload(true);
hal_nrf_enable_dynamic_payload(true);
hal_nrf_setup_dynamic_payload(0xff);
/*
Initialize status variables.
*/
gzll_channel_tab_index = 0;
gzll_channel_tab_size = GZLL_DEFAULT_CHANNEL_TAB_SIZE;
gzll_pending_goto_idle = false;
gzll_timer_period_modified = false;
gzll_current_tx_pipe = 0;
gzll_pending_tx_start = false;
gzll_tx_setup_modified = true;
gzll_rx_setup_modified = true;
gzll_radio_active_f = false;
gzll_tx_success_f = true;
gzll_sync_period = 0;
gzll_sync_on = false;
gzll_rx_dr = false;
gzll_rx_power_high_f = false;
gzll_ack_rx_pipe_fifo_cnt = 0;
/*
Set up default addresses.
*/
hal_nrf_set_address(HAL_NRF_PIPE0, gzll_p0_adr);
hal_nrf_set_address(HAL_NRF_PIPE1, temp_adr);
temp_adr[0] = GZLL_DEFAULT_ADDRESS_PIPE2;
hal_nrf_set_address(HAL_NRF_PIPE2, temp_adr);
temp_adr[0] = GZLL_DEFAULT_ADDRESS_PIPE3;
hal_nrf_set_address(HAL_NRF_PIPE3, temp_adr);
temp_adr[0] = GZLL_DEFAULT_ADDRESS_PIPE4;
hal_nrf_set_address(HAL_NRF_PIPE4, temp_adr);
temp_adr[0] = GZLL_DEFAULT_ADDRESS_PIPE5;
hal_nrf_set_address(HAL_NRF_PIPE5, temp_adr);
/*
Set up default channel.
*/
hal_nrf_set_rf_channel(gzll_channel_tab[gzll_channel_tab_index]);
/*
Initialize dynamic parameters using default values.
*/
gzll_dyn_params[GZLL_PARAM_DEVICE_MODE] = GZLL_DEFAULT_PARAM_DEVICE_MODE;
gzll_dyn_params[GZLL_PARAM_TX_TIMEOUT] = GZLL_DEFAULT_PARAM_TX_TIMEOUT;
gzll_dyn_params[GZLL_PARAM_TX_ATTEMPTS_PR_CHANNEL_WHEN_SYNC_ON] = GZLL_DEFAULT_PARAM_TX_ATTEMPTS_PR_CHANNEL_WHEN_SYNC_ON;
gzll_dyn_params[GZLL_PARAM_TX_ATTEMPTS_PR_CHANNEL_WHEN_SYNC_OFF] = GZLL_DEFAULT_PARAM_TX_ATTEMPTS_PR_CHANNEL_WHEN_SYNC_OFF;
gzll_dyn_params[GZLL_PARAM_HOST_MODE] = GZLL_DEFAULT_PARAM_HOST_MODE;
gzll_dyn_params[GZLL_PARAM_RX_PIPES] = GZLL_DEFAULT_PARAM_RX_PIPES;
gzll_dyn_params[GZLL_PARAM_CRYPT_PIPES] = GZLL_DEFAULT_PARAM_CRYPT_PIPES;
gzll_dyn_params[GZLL_PARAM_RX_TIMEOUT] = GZLL_DEFAULT_PARAM_RX_TIMEOUT;
gzll_dyn_params[GZLL_PARAM_HOST_MODE_1_CYCLE_PERIOD] = GZLL_DEFAULT_PARAM_HOST_MODE_1_CYCLE_PERIOD;
gzll_dyn_params[GZLL_PARAM_RX_PERIOD] = GZLL_DEFAULT_PARAM_RX_PERIOD;
gzll_dyn_params[GZLL_PARAM_RX_PERIOD_MODIFIER] = GZLL_DEFAULT_PARAM_RX_PERIOD_MODIFIER;
gzll_dyn_params[GZLL_PARAM_RX_CHANNEL_HOLD_PERIODS] = GZLL_DEFAULT_PARAM_RX_CHANNEL_HOLD_PERIODS;
gzll_dyn_params[GZLL_PARAM_OUTPUT_POWER] = GZLL_DEFAULT_PARAM_OUTPUT_POWER;
gzll_dyn_params[GZLL_PARAM_POWER_DOWN_IDLE_ENABLE] = GZLL_DEFAULT_PARAM_POWER_DOWN_IDLE_ENABLE;
gzll_dyn_params[GZLL_PARAM_MAX_SYNC_PERIOD] = GZLL_DEFAULT_PARAM_MAX_SYNC_PERIOD;
gzll_dyn_params[GZLL_PARAM_COLLISION_CHANNEL_SWITCH_LIMIT] = GZLL_DEFAULT_PARAM_COLLISION_CHANNEL_SWITCH_LIMIT;
/*
Set up default output power.
*/
hal_nrf_set_output_power((hal_nrf_output_power_t) gzll_dyn_params[GZLL_PARAM_OUTPUT_POWER]);
/*
Static radio setup.
*/
hal_nrf_set_datarate(GZLL_HAL_DATARATE);
hal_nrf_set_crc_mode(GZLL_CRC);
hal_nrf_set_address_width(GZLL_ADDRESS_WIDTH);
/*
Clear radio IRQ flags.
*/
//lint -esym(534, hal_nrf_get_clear_irq_flags) "return value ignored"
hal_nrf_get_clear_irq_flags();
hal_nrf_flush_rx();
hal_nrf_flush_tx();
gzll_set_timer_period(GZLL_DEFAULT_PARAM_RX_PERIOD);
gzll_set_system_idle();
gzll_interupts_restore(flag);
}
void main(void) {
int i = 0; // local counter
int total_pkt_count = 1;
int addr_width = 5;
int customized_plen = 0;
int pipe_num = 6;
epl_rf_en_auto_ack_t auto_ack = 0;
//int mode = 1; // 1 for sender mode, 2 for dumper mode
// new params
unsigned char pipe_source; // used to store pipe_source number
unsigned char ACKbuf[] = "ACK";
unsigned char temp_buf[34]; // used for dumper to get RF packets from RX FIFO
unsigned char temp_addr[5];
unsigned char data_length = 0;
unsigned char dynpd_pipe;
unsigned char addr_buf[5];
// set pin direction
P0EXP = 0x00;
P0ALT = 0x00;
P0DIR = 0x00;
// uart init
epl_uart_init(UART_BAUD_57K6);
//init usb connection
usb_init(); // Initialize USB
EA = 1; // Enable global IRQ
//Start RF tx mode
epl_rf_en_quick_init(cfg);
//Clear TX FIFO
hal_nrf_write_reg(FLUSH_TX, 0);
hal_nrf_write_reg(FLUSH_RX, 0);
hal_nrf_lock_unlock();
hal_nrf_enable_dynamic_pl();
LED_Blink(20);
epl_uart_putstr("start!");
while (1) {
usb_recv_packet();
switch (ubuf[1]) {
case EPL_SENDER_MODE:
customized_plen = 0;
for (i = 0; i < PLOAD_LEN; i++)
packet[i] = i + 9;
hal_nrf_close_pipe(HAL_NRF_PIPE1);
hal_nrf_close_pipe(HAL_NRF_PIPE2);
hal_nrf_close_pipe(HAL_NRF_PIPE3);
hal_nrf_close_pipe(HAL_NRF_PIPE4);
hal_nrf_close_pipe(HAL_NRF_PIPE5);
break;
case EPL_DUMPER_MODE:
hal_nrf_close_pipe(HAL_NRF_PIPE1);
hal_nrf_close_pipe(HAL_NRF_PIPE2);
hal_nrf_close_pipe(HAL_NRF_PIPE3);
hal_nrf_close_pipe(HAL_NRF_PIPE4);
hal_nrf_close_pipe(HAL_NRF_PIPE5);
break;
case EPL_OUTPUT_POWER: //Host:set_output_power
hal_nrf_set_output_power(ubuf[2]);
epl_uart_putstr("EPL_OUTPUT_POWER\n");
usb_send_packet(ACKbuf, 3);
epl_uart_putstr("EPL_OUTPUT_POWER END\n");
break;
case EPL_CHANNEL:
hal_nrf_set_rf_channel(ubuf[2]);
usb_send_packet(ACKbuf, 3);
break;
case EPL_DATARATE:
hal_nrf_set_datarate(ubuf[2]);
usb_send_packet(ACKbuf, 3);
break;
case EPL_ADDR_WIDTH:
addr_width = (int) ubuf[2];
hal_nrf_set_address_width(ubuf[2]);
usb_send_packet(ACKbuf, 3);
break;
case EPL_AUTOACK_P0:
auto_ack = ubuf[2];
usb_send_packet(ACKbuf, 3);
break;
case EPL_AUTOACK_P1:
auto_ack = ubuf[2];
usb_send_packet(ACKbuf, 3);
break;
case EPL_AUTOACK_P2:
auto_ack = ubuf[2];
usb_send_packet(ACKbuf, 3);
break;
case EPL_AUTOACK_P3:
auto_ack = ubuf[2];
usb_send_packet(ACKbuf, 3);
break;
case EPL_AUTOACK_P4:
auto_ack = ubuf[2];
usb_send_packet(ACKbuf, 3);
break;
case EPL_AUTOACK_P5:
auto_ack = ubuf[2];
usb_send_packet(ACKbuf, 3);
break;
case EPL_DATA_LENGTH_P0:
data_length = (int) ubuf[2];
epl_rf_en_rcv_pipe_config(HAL_NRF_PIPE0, temp_addr, data_length, auto_ack);
usb_send_packet(ACKbuf, 3);
break;
case EPL_DATA_LENGTH_P1:
data_length = (int) ubuf[2];
epl_rf_en_rcv_pipe_config(HAL_NRF_PIPE1, temp_addr, data_length, auto_ack);
usb_send_packet(ACKbuf, 3);
break;
case EPL_DATA_LENGTH_P2:
data_length = (int) ubuf[2];
epl_rf_en_rcv_pipe_config(HAL_NRF_PIPE2, temp_addr, data_length, auto_ack);
usb_send_packet(ACKbuf, 3);
break;
case EPL_DATA_LENGTH_P3:
data_length = (int) ubuf[2];
epl_rf_en_rcv_pipe_config(HAL_NRF_PIPE3, temp_addr, data_length, auto_ack);
usb_send_packet(ACKbuf, 3);
break;
case EPL_DATA_LENGTH_P4:
data_length = (int) ubuf[2];
epl_rf_en_rcv_pipe_config(HAL_NRF_PIPE4, temp_addr, data_length, auto_ack);
usb_send_packet(ACKbuf, 3);
break;
case EPL_DATA_LENGTH_P5:
data_length = (int) ubuf[2];
epl_rf_en_rcv_pipe_config(HAL_NRF_PIPE5, temp_addr, data_length, auto_ack);
usb_send_packet(ACKbuf, 3);
break;
case EPL_CRC_MODE:
if (ubuf[2] == 0)
hal_nrf_set_crc_mode(HAL_NRF_CRC_OFF);
else if (ubuf[2] == 2)
hal_nrf_set_crc_mode(HAL_NRF_CRC_8BIT);
else if (ubuf[2] == 3)
hal_nrf_set_crc_mode(HAL_NRF_CRC_16BIT);
else
;
usb_send_packet(ACKbuf, 3);
break;
case EPL_RX_ADDR_P0:
for (i = 0; i < addr_width; i++) {
temp_addr[i] = ubuf[i + 2];
}
hal_nrf_set_address(HAL_NRF_PIPE0, temp_addr);
epl_rf_en_set_dst_addr(temp_addr);
usb_send_packet(ACKbuf, 3);
break;
case EPL_RX_ADDR_P1:
for (i = 0; i < addr_width; i++) {
temp_addr[i] = ubuf[i + 2];
}
usb_send_packet(ACKbuf, 3);
break;
case EPL_RX_ADDR_P2:
for (i = 0; i < addr_width; i++) {
temp_addr[i] = ubuf[i + 2];
}
usb_send_packet(ACKbuf, 3);
break;
case EPL_RX_ADDR_P3:
for (i = 0; i < addr_width; i++) {
temp_addr[i] = ubuf[i + 2];
}
usb_send_packet(ACKbuf, 3);
break;
case EPL_RX_ADDR_P4:
for (i = 0; i < addr_width; i++) {
temp_addr[i] = ubuf[i + 2];
}
usb_send_packet(ACKbuf, 3);
break;
case EPL_RX_ADDR_P5:
for (i = 0; i < addr_width; i++) {
temp_addr[i] = ubuf[i + 2];
}
usb_send_packet(ACKbuf, 3);
break;
case EPL_USER_PLOAD:
if (ubuf[2] == USRS_PLOAD) {
customized_plen = (int) ubuf[3];
for (i = 0; i < customized_plen; i++) {
packet[i] = ubuf[i + 4];
}
} else {
customized_plen = 0;
for (i = 0; i < PLOAD_LEN; i++) {
packet[i] = i + 9;
}
}
usb_send_packet(ACKbuf, 3);
break;
case EPL_NEW_COUNTER:
total_pkt_count = 1;
usb_send_packet(ACKbuf, 3);
break;
/*20110221 celine*/
case EPL_DYNAMIC_PD:
dynpd_pipe = (int)ubuf[2];
if ((int)ubuf[3] == 01){
//hal_nrf_setup_dyn_pl(dynpd_pipe);
hal_nrf_write_reg(DYNPD, (1<<dynpd_pipe) | hal_nrf_read_reg(DYNPD));
} else {
//hal_nrf_lock_unlock();
//hal_nrf_enable_dynamic_pl();
hal_nrf_write_reg(DYNPD, ~(1<<dynpd_pipe) & hal_nrf_read_reg(DYNPD));
}
usb_send_packet(ACKbuf, 3);
break;
/**/
case EPL_RUN_SENDER:
epl_rf_en_enter_tx_mode();
// clear Tx irq
hal_nrf_clear_irq_flag(HAL_NRF_TX_DS);
hal_nrf_clear_irq_flag(HAL_NRF_MAX_RT);
if (ubuf[2] == AUTO_PLOAD) {
epl_uart_putstr("\nauto pload\r\n");
packet[0] = total_pkt_count++;
epl_rf_en_send(packet, data_length);
} else {
epl_uart_putstr("\nusrs pload\r\n");
epl_rf_en_send(packet, customized_plen);
}
LED_Blink(10);
array_cp(temp_buf, ACKbuf, 3);
temp_buf[3] = hal_nrf_read_reg(OBSERVE_TX) & 0x0F;
usb_send_packet(temp_buf, 4);
epl_rf_en_enter_rx_mode();
break;
case EPL_RUN_DUMPER:
hal_nrf_clear_irq_flag(HAL_NRF_RX_DR);
hal_nrf_flush_rx();
epl_rf_en_enter_rx_mode();
while (1) {
if (ubuf[1] == 0xf5) { // Host wants to terminate
epl_uart_putstr("Terminate !\r\n");
break;
}else if (hal_nrf_rx_fifo_empty() == 0) { // Rx_fifo is not empty
LED0_Toggle();
pipe_source = hal_nrf_get_rx_data_source();
hal_nrf_read_rx_pload(temp_buf);
// pending the data source on last byte
temp_buf[32] = pipe_source;
if(hal_nrf_read_reg(DYNPD)>>(int)pipe_source)
temp_buf[33] = hal_nrf_read_reg(RD_RX_PLOAD_W);
else
temp_buf[33] = hal_nrf_read_reg(RX_PW_P0+pipe_source);
// epl_uart_putstr("temp_buf[33] = ");
// epl_uart_puthex(temp_buf[33]);
// epl_uart_putstr("\r\n");
usb_send_packet(temp_buf, 34);
if((hal_nrf_read_reg(STATUS))&0x10){
hal_nrf_write_reg(FLUSH_TX, 0);
}
LED0_Toggle();
}
}
break;
case EPL_SHOW_CONFIG:
epl_uart_putstr("\r\n0. CONFIG = ");
epl_uart_puthex(hal_nrf_read_reg(CONFIG));
epl_uart_putstr("\r\n1. RF_CH = ");
epl_uart_puthex(hal_nrf_read_reg(RF_CH));
epl_uart_putstr("\r\n2. EN_AA = ");
epl_uart_puthex(hal_nrf_read_reg(EN_AA));
epl_uart_putstr("\r\n3. EN_RXADDR = ");
epl_uart_puthex(hal_nrf_read_reg(EN_RXADDR));
epl_uart_putstr("\r\n4. TX_ADDR = ");
hal_nrf_read_multibyte_reg(HAL_NRF_TX, addr_buf);
epl_uart_puthex(addr_buf[0]);
epl_uart_puthex(addr_buf[1]);
epl_uart_puthex(addr_buf[2]);
epl_uart_puthex(addr_buf[3]);
epl_uart_puthex(addr_buf[4]);
epl_uart_putstr("\r\n4. RX_ADDR_PO = ");
hal_nrf_read_multibyte_reg(HAL_NRF_PIPE0, addr_buf);
epl_uart_puthex(addr_buf[0]);
epl_uart_puthex(addr_buf[1]);
epl_uart_puthex(addr_buf[2]);
epl_uart_puthex(addr_buf[3]);
epl_uart_puthex(addr_buf[4]);
epl_uart_putstr("\r\n RX_ADDR_P1 = ");
hal_nrf_read_multibyte_reg(HAL_NRF_PIPE1, addr_buf);
epl_uart_puthex(addr_buf[0]);
epl_uart_puthex(addr_buf[1]);
epl_uart_puthex(addr_buf[2]);
epl_uart_puthex(addr_buf[3]);
epl_uart_puthex(addr_buf[4]);
epl_uart_putstr("\r\n RX_ADDR_P2 = ");
epl_uart_puthex(hal_nrf_read_reg(RX_ADDR_P2));
epl_uart_putstr("\r\n RX_ADDR_P3 = ");
epl_uart_puthex(hal_nrf_read_reg(RX_ADDR_P3));
epl_uart_putstr("\r\n RX_ADDR_P4 = ");
epl_uart_puthex(hal_nrf_read_reg(RX_ADDR_P4));
epl_uart_putstr("\r\n RX_ADDR_P5 = ");
epl_uart_puthex(hal_nrf_read_reg(RX_ADDR_P5));
epl_uart_putstr("\r\n5. RX_PW_P0 = ");
epl_uart_puthex(hal_nrf_read_reg(RX_PW_P0));
epl_uart_putstr("\r\n RX_PW_P1 = ");
epl_uart_puthex(hal_nrf_read_reg(RX_PW_P1));
epl_uart_putstr("\r\n RX_PW_P2 = ");
epl_uart_puthex(hal_nrf_read_reg(RX_PW_P2));
epl_uart_putstr("\r\n RX_PW_P3 = ");
epl_uart_puthex(hal_nrf_read_reg(RX_PW_P3));
epl_uart_putstr("\r\n RX_PW_P4 = ");
epl_uart_puthex(hal_nrf_read_reg(RX_PW_P4));
epl_uart_putstr("\r\n RX_PW_P5 = ");
epl_uart_puthex(hal_nrf_read_reg(RX_PW_P5));
epl_uart_putstr("\r\n6. RF_SETUP = ");
epl_uart_puthex(hal_nrf_read_reg(RF_SETUP));
epl_uart_putstr("\r\n7. STATUS = ");
epl_uart_puthex(hal_nrf_read_reg(STATUS));
epl_uart_putstr("\r\n8 .DYNPD = ");
epl_uart_puthex(hal_nrf_read_reg(DYNPD));
epl_uart_putstr("\r\n9. FEATURE = ");
epl_uart_puthex(hal_nrf_read_reg(FEATURE));
default:
break;
}// end switch case