static void hdmi_hw_powerdown(void) { //enable clock WRITE_CBUS_REG( HHI_HDMI_CLK_CNTL, ((1 << 9) | // select "other" PLL (1 << 8) | // Enable gated clock (3 << 0)) ); // Divide the "other" PLL output by 4 //hdmi audio gate disable hdmi_wr_reg(RX_AUDIO_I2S, 0x0); hdmi_wr_reg(RX_AUDIO_SPDIF, 0x0); //phy power down hdmi_wr_reg(RX_BASE_ADDR+0x864, hdmi_rd_reg(RX_BASE_ADDR+0x864) | (1<<7)); // rx0_eq_pd = 1 hdmi_wr_reg(RX_BASE_ADDR+0x86C, hdmi_rd_reg(RX_BASE_ADDR+0x86C) | (1<<7)); // rx1_eq_pd = 1 hdmi_wr_reg(RX_BASE_ADDR+0x874, hdmi_rd_reg(RX_BASE_ADDR+0x874) | (1<<7)); // rx2_eq_pd = 1 hdmi_wr_reg(RX_BASE_ADDR+0x87C, hdmi_rd_reg(RX_BASE_ADDR+0x87C) | (1<<7)); // rx3_eq_pd = 1 //pr_info("hdmirx_hw: rx3_eq_pd\n"); hdmi_wr_reg(RX_BASE_ADDR+0x866, hdmi_rd_reg(RX_BASE_ADDR+0x866) | (1<<6)); // cdr0_pd = 1 hdmi_wr_reg(RX_BASE_ADDR+0x86E, hdmi_rd_reg(RX_BASE_ADDR+0x86E) | (1<<6)); // cdr1_pd = 1 hdmi_wr_reg(RX_BASE_ADDR+0x876, hdmi_rd_reg(RX_BASE_ADDR+0x876) | (1<<6)); // cdr2_pd = 1 hdmi_wr_reg(RX_BASE_ADDR+0x87E, hdmi_rd_reg(RX_BASE_ADDR+0x87E) | (1<<6)); // cdr3_pd = 1 //pr_info("hdmirx_hw: cdr3_pd\n"); hdmi_wr_reg(RX_BASE_ADDR+0x005, 0<<0); // [2:0] port_en = 0 hdmi_wr_reg(RX_BASE_ADDR+0x097, hdmi_rd_reg(RX_BASE_ADDR+0x097)| (1<<7)| // rxref_pd = 1 (1<<6)| // rxref_pd_vgap = 1 (1<<5));// rxref_pd_op2 = 1 }
void hdmi_hdcp_get_bksv(char* buf, int endian) { int i; if(endian ==1){ for(i = 0;i < 5; i++) { buf[i] = hdmi_rd_reg(TX_HDCP_SHW_BKSV_0 + i); } } else { for(i = 0;i < 5; i++) { buf[i] = hdmi_rd_reg(TX_HDCP_SHW_BKSV_0 + 4 - i); } } }
int cec_ll_rx( unsigned char *msg, unsigned char *len) { unsigned char i; unsigned char rx_status; unsigned char data; int pos; unsigned char n; unsigned char *msg_start = msg; int rx_msg_length; if(RX_DONE != hdmi_rd_reg(CEC0_BASE_ADDR+CEC_RX_MSG_STATUS)){ hdmi_wr_reg(CEC0_BASE_ADDR + CEC_RX_MSG_CMD, RX_ACK_CURRENT); hdmi_wr_reg(CEC0_BASE_ADDR + CEC_RX_MSG_CMD, RX_NO_OP); return -1; } if(1 != hdmi_rd_reg(CEC0_BASE_ADDR+CEC_RX_NUM_MSG)){ hdmi_wr_reg(CEC0_BASE_ADDR + CEC_RX_MSG_CMD, RX_ACK_CURRENT); hdmi_wr_reg(CEC0_BASE_ADDR + CEC_RX_MSG_CMD, RX_NO_OP); return -1; } rx_msg_length = hdmi_rd_reg(CEC0_BASE_ADDR + CEC_RX_MSG_LENGTH) + 1; hdmi_wr_reg(CEC0_BASE_ADDR + CEC_RX_MSG_CMD, RX_ACK_CURRENT); for (i = 0; i < rx_msg_length && i < MAX_MSG; i++) { data = hdmi_rd_reg(CEC0_BASE_ADDR + CEC_RX_MSG_0_HEADER +i); *msg = data; msg++; } *len = rx_msg_length; rx_status = hdmi_rd_reg(CEC0_BASE_ADDR+CEC_RX_MSG_STATUS); hdmi_wr_reg(CEC0_BASE_ADDR + CEC_RX_MSG_CMD, RX_NO_OP); if(cec_msg_dbg_en == 1){ pos = 0; pos += sprintf(msg_log_buf + pos, "CEC: rx msg len: %d dat: ", rx_msg_length); for(n = 0; n < rx_msg_length; n++) { pos += sprintf(msg_log_buf + pos, "%02x ", msg_start[n]); } pos += sprintf(msg_log_buf + pos, "\n"); msg_log_buf[pos] = '\0'; hdmi_print(INF, CEC "%s", msg_log_buf); } return rx_status; }
static void hdmi_wr_reg(unsigned long addr, unsigned long data) { unsigned long rd_data; WRITE_APB_REG(HDMI_ADDR_PORT, addr); WRITE_APB_REG(HDMI_ADDR_PORT, addr); WRITE_APB_REG(HDMI_DATA_PORT, data); rd_data = hdmi_rd_reg (addr); if (rd_data != data) { //while(1){}; } }
void hdmi_wr_reg(unsigned long addr, unsigned long data) { unsigned long rd_data; WRITE_APB_REG(HDMI_ADDR_PORT, addr); WRITE_APB_REG(HDMI_ADDR_PORT, addr); WRITE_APB_REG(HDMI_DATA_PORT, data); rd_data = hdmi_rd_reg (addr); if (rd_data != data) { //printk("hdmi_wr_reg(%x,%x) fails to write: %x\n",addr, data, rd_data); //while(1){}; } }
void hdmi_wr_reg(unsigned long addr, unsigned long data) { unsigned long rd_data; check_cts_hdmi_sys_clk_status(); // WRITE_APB_REG(HDMI_ADDR_PORT, addr); // WRITE_APB_REG(HDMI_ADDR_PORT, addr); // // WRITE_APB_REG(HDMI_DATA_PORT, data); aml_write_reg32(P_HDMI_ADDR_PORT, addr); aml_write_reg32(P_HDMI_ADDR_PORT, addr); aml_write_reg32(P_HDMI_DATA_PORT, data); rd_data = hdmi_rd_reg (addr); if (rd_data != data) { //printk("hdmi_wr_reg(%x,%x) fails to write: %x\n",addr, data, rd_data); //while(1){}; } }
void cec_hw_reset(void) { aml_write_reg32(P_HDMI_CTRL_PORT, aml_read_reg32(P_HDMI_CTRL_PORT)|(1<<16)); hdmi_wr_reg(OTHER_BASE_ADDR+HDMI_OTHER_CTRL0, 0xc); //[3]cec_creg_sw_rst [2]cec_sys_sw_rst hdmi_wr_reg(CEC0_BASE_ADDR+CEC_TX_CLEAR_BUF, 0x1); hdmi_wr_reg(CEC0_BASE_ADDR+CEC_RX_CLEAR_BUF, 0x1); //mdelay(10); {//Delay some time int i = 10; while(i--); } hdmi_wr_reg(CEC0_BASE_ADDR+CEC_TX_CLEAR_BUF, 0x0); hdmi_wr_reg(CEC0_BASE_ADDR+CEC_RX_CLEAR_BUF, 0x0); hdmi_wr_reg(OTHER_BASE_ADDR+HDMI_OTHER_CTRL0, 0x0); aml_write_reg32(P_HDMI_CTRL_PORT, aml_read_reg32(P_HDMI_CTRL_PORT)&(~(1<<16))); hdmi_wr_reg(CEC0_BASE_ADDR+CEC_CLOCK_DIV_H, 0x00 ); hdmi_wr_reg(CEC0_BASE_ADDR+CEC_CLOCK_DIV_L, 0xf0 ); hdmi_wr_reg(CEC0_BASE_ADDR+CEC_LOGICAL_ADDR0, (0x1 << 4) | cec_global_info.my_node_index); hdmi_print(INF, CEC "hw reset :logical addr:0x%x\n", hdmi_rd_reg(CEC0_BASE_ADDR+CEC_LOGICAL_ADDR0)); }
int cec_ll_tx_polling(const unsigned char *msg, unsigned char len) { int i; unsigned int ret = 0xf; unsigned int n; unsigned int j = 30; int pos; for (i = 0; i < len; i++) { hdmi_wr_reg(CEC0_BASE_ADDR+CEC_TX_MSG_0_HEADER + i, msg[i]); } hdmi_wr_reg(CEC0_BASE_ADDR+CEC_TX_MSG_LENGTH, len-1); //cec_tx_start = 1; hdmi_wr_reg(CEC0_BASE_ADDR+CEC_TX_MSG_CMD, RX_ACK_CURRENT);//TX_REQ_NEXT msleep(len * 24 + 5); ret = hdmi_rd_reg(CEC0_BASE_ADDR+CEC_TX_MSG_STATUS); if(ret == TX_DONE) ret = 1; else ret = 0; hdmi_wr_reg(CEC0_BASE_ADDR+CEC_TX_MSG_CMD, TX_NO_OP); if(cec_msg_dbg_en == 1) { pos = 0; pos += sprintf(msg_log_buf + pos, "CEC: tx msg len: %d dat: ", len); for(n = 0; n < len; n++) { pos += sprintf(msg_log_buf + pos, "%02x ", msg[n]); } pos += sprintf(msg_log_buf + pos, "\nCEC: tx state: %d\n", ret); msg_log_buf[pos] = '\0'; printk("%s", msg_log_buf); } return ret; }
int hdmitx_set_display(hdmitx_dev_t* hdmitx_device, HDMI_Video_Codes_t VideoCode) { Hdmi_tx_video_para_t *param; int i,ret=-1; unsigned char AVI_DB[32]; unsigned char AVI_HB[32]; AVI_HB[0] = TYPE_AVI_INFOFRAMES ; AVI_HB[1] = AVI_INFOFRAMES_VERSION ; AVI_HB[2] = AVI_INFOFRAMES_LENGTH ; for(i=0;i<32;i++){ AVI_DB[i]=0; } param = hdmi_get_video_param(VideoCode); if(param){ param->color = param->color_prefer; if(hdmi_output_rgb){ param->color = COLOR_SPACE_RGB444; } else{ //HDMI CT 7-24 Pixel Encoding - YCbCr to YCbCr Sink switch(hdmitx_device->RXCap.native_Mode & 0x30) { case 0x20: //bit5==1, then support YCBCR444 + RGB case 0x30: param->color = COLOR_SPACE_YUV444; break; case 0x10: //bit4==1, then support YCBCR422 + RGB param->color = COLOR_SPACE_YUV422; break; default: param->color = COLOR_SPACE_RGB444; } } if(hdmitx_device->HWOp.SetDispMode(hdmitx_device, param)>=0){ //HDMI CT 7-33 DVI Sink, no HDMI VSDB nor any other VSDB, No GB or DI expected //TMDS_MODE[hdmi_config] //0: DVI Mode 1: HDMI Mode //if(hdmitx_device->hdmi_info.output_state==CABLE_PLUGIN_DVI_OUT) if(is_dvi_device(&hdmitx_device->RXCap)) { hdmi_print(1,"Sink is DVI device\n"); hdmi_wr_reg(TX_TMDS_MODE, hdmi_rd_reg(TX_TMDS_MODE) & ~(1<<6)); } else { hdmi_print(1,"Sink is HDMI device\n"); hdmi_wr_reg(TX_TMDS_MODE, hdmi_rd_reg(TX_TMDS_MODE) | (3<<6)); } //check system status by reading EDID_STATUS switch(hdmi_rd_reg(TX_HDCP_ST_EDID_STATUS) >> 6) { case 0: hdmi_print(1,"No sink attached\n"); break; case 1: hdmi_print(1,"Source reading EDID\n"); break; case 2: hdmi_print(1,"Source in DVI Mode\n"); break; case 3: hdmi_print(1,"Source in HDMI Mode\n"); break; default: hdmi_print(1,"EDID Status error\n"); } hdmi_tx_construct_avi_packet(param, (char*)AVI_DB); hdmitx_device->HWOp.SetPacket(HDMI_PACKET_AVI, AVI_DB, AVI_HB); ret = 0; } } else{ if(hdmitx_device->HWOp.SetDispMode) {
static int #else static void #endif hdmi_task_handle(void *data) { extern void hdmitx_edid_ram_buffer_clear(hdmitx_dev_t*); hdmitx_dev_t* hdmitx_device = (hdmitx_dev_t*)data; hdmitx_init_parameters(&hdmitx_device->hdmi_info); HDMITX_M1B_Init(hdmitx_device); //When init hdmi, clear the hdmitx module edid ram and edid buffer. hdmitx_edid_ram_buffer_clear(hdmitx_device); hdmitx_device->HWOp.SetupIRQ(hdmitx_device); if(hdmitx_device->HWOp.Cntl){ if(init_flag&INIT_FLAG_VDACOFF){ hdmitx_device->HWOp.Cntl(hdmitx_device, HDMITX_HWCMD_VDAC_OFF, 0); } if(init_powermode&0x80){ hdmitx_device->HWOp.Cntl(hdmitx_device, HDMITX_HWCMD_POWERMODE_SWITCH, init_powermode&0x1f); } } if(init_flag&INIT_FLAG_POWERDOWN){ hdmitx_device->HWOp.SetDispMode(NULL); //power down hdmitx_device->unplug_powerdown=1; if(hdmitx_device->HWOp.Cntl){ hdmitx_device->HWOp.Cntl(hdmitx_device, HDMITX_HWCMD_TURNOFF_HDMIHW, (hpdmode!=0)?1:0); } } else{ if(hdmitx_device->HWOp.Cntl){ hdmitx_device->HWOp.Cntl(hdmitx_device, HDMITX_HWCMD_MUX_HPD, 0); } } HDMI_DEBUG(); while (hdmitx_device->hpd_event != 0xff) { if((hdmitx_device->vic_count == 0)&&(hdmitx_device->mux_hpd_if_pin_high_flag)){ if(hdmitx_device->HWOp.Cntl){ hdmitx_device->HWOp.Cntl(hdmitx_device, HDMITX_HWCMD_MUX_HPD_IF_PIN_HIGH, 0); } } if((!hdmi_audio_off_flag)&&(hdmitx_device->audio_param_update_flag)&& ((hdmitx_device->cur_VIC != HDMI_Unkown)||(hdmitx_device->force_audio_flag))){ hdmitx_set_audio(hdmitx_device, &(hdmitx_device->cur_audio_param)); hdmitx_device->audio_param_update_flag = 0; hdmi_print(1, "HDMI: set audio param\n"); } if (hdmitx_device->hpd_event == 1) { if(hdmitx_device->HWOp.GetEDIDData(hdmitx_device)){ hdmi_print(1,"HDMI: EDID Ready\n"); hdmitx_edid_clear(hdmitx_device); hdmitx_edid_parse(hdmitx_device); cec_node_init(hdmitx_device); set_disp_mode_auto(); switch_set_state(&sdev, 1); hdmitx_device->audio_param_update_flag = 1; hdmitx_device->hpd_event = 0; } hdmitx_device->hpd_state = 1; } else if(hdmitx_device->hpd_event == 2) { //When unplug hdmi, clear the hdmitx module edid ram and edid buffer. hdmitx_edid_ram_buffer_clear(hdmitx_device); hdmitx_edid_clear(hdmitx_device); cec_node_uninit(hdmitx_device); if(hdmitx_device->unplug_powerdown){ hdmitx_set_display(hdmitx_device, HDMI_Unkown); if(hdmitx_device->HWOp.Cntl){ hdmitx_device->HWOp.Cntl(hdmitx_device, HDMITX_HWCMD_TURNOFF_HDMIHW, (hpdmode!=0)?1:0); } } hdmitx_device->cur_VIC = HDMI_Unkown; hdmi_authenticated = -1; switch_set_state(&sdev, 0); hdmitx_device->hpd_event = 0; hdmitx_device->hpd_state = 0; } else{ } /* authentication process */ #ifdef CONFIG_AML_HDMI_TX_HDCP if(hdmitx_device->cur_VIC != HDMI_Unkown){ if(hdmitx_device->auth_process_timer>0){ hdmitx_device->auth_process_timer--; } else{ hdmi_authenticated = hdmitx_device->HWOp.Cntl(hdmitx_device, HDMITX_GET_AUTHENTICATE_STATE, NULL); if(hdmi_authenticated == 1){ Bksv0 = hdmi_rd_reg(TX_HDCP_SHW_BKSV_0); Bksv1 = hdmi_rd_reg(TX_HDCP_SHW_BKSV_1); Bksv2 = hdmi_rd_reg(TX_HDCP_SHW_BKSV_2); Bksv3 = hdmi_rd_reg(TX_HDCP_SHW_BKSV_3); Bksv4 = hdmi_rd_reg(TX_HDCP_SHW_BKSV_4); } if(auth_output_auto_off){ if(hdmi_authenticated){ hdmitx_device->HWOp.Cntl(hdmitx_device, HDMITX_OUTPUT_ENABLE, 1); } else{ hdmitx_device->HWOp.Cntl(hdmitx_device, HDMITX_OUTPUT_ENABLE, 0); } } else{ hdmitx_device->HWOp.Cntl(hdmitx_device, HDMITX_OUTPUT_ENABLE, hdmi_output_on); } } } #endif /**/ HDMI_PROCESS_DELAY; } #ifndef AVOS return 0; #endif }
static int do_tv_reg_op(int argc, char *argv[]) { int mode; int ret; char *endp; unsigned int addr; unsigned int val = 0; unsigned int count = 0; if(*argv[1] == 'r') { addr = simple_strtoul(argv[3], NULL, 16); if(argc > 4) count = simple_strtoul(argv[4], NULL, 16); if(count > 0) { if(*argv[2] == 'c') { printf("read cubs reg 0x%04x: 0x%x\n", addr, count); while(count--) { printf("0x%08x ", READ_MPEG_REG(addr++)); val++; if(val >= 8) { val = 0; printf("\n"); } } } if(*argv[2] == 'h') { printf("read hdmi reg 0x%03x: 0x%x\n", addr, count); while(count--) { printf("0x%08x ", hdmi_rd_reg(addr++)); val++; if(val >= 8) { val = 0; printf("\n"); } } } } else { if(*argv[2] == 'c') { printf("read cubs reg 0x%04x: 0x%08x\n", addr, READ_MPEG_REG(addr)); } if(*argv[2] == 'h') { printf("read hdmi reg 0x%03x: 0x%08x\n", addr, hdmi_rd_reg(addr)); } } } if(*argv[1] == 'w') { addr = simple_strtoul(argv[3], NULL, 16); val = simple_strtoul(argv[4], NULL, 16); if(*argv[2] == 'c') { printf("write cubs reg 0x%04x val 0x%08x\n", addr, WRITE_MPEG_REG(addr, val)); } if(*argv[2] == 'h') { printf("write hdmi reg 0x%03x val 0x%08x\n", addr, hdmi_wr_reg(addr, val)); } } return 0; }