static irqreturn_t hi6402_sound_triger_handler(int irq, void *data)
{
	struct hi6402_mbhc_platform_data *pdata =
			(struct hi6402_mbhc_platform_data *)data;
	unsigned int soundtrigger_event = 0;

	BUG_ON(NULL == pdata);

	wake_lock_timeout(&pdata->soundtrigger_wake_lock, 2000);

	/* clr VAD INTR */
	hi6402_irq_write(pdata->p_irq, HI6402_VAD_INT_SET, 0);
	hi6402_irq_write(pdata->p_irq, HI6402_REG_IRQ_1, 1<<HI6402_VAD_BIT);

	soundtrigger_event = hi6402_irq_read(pdata->p_irq, HI6402_DSP_VAD_CMD);

	pr_info("%s:----sound trigger----%d\n", __FUNCTION__, soundtrigger_event);

	if(soundtrigger_event < ST_EVENT_MAX) {
		input_report_key(soundtrigger_input_dev,
			SOUNDTRIGGER_EVENT_BASE + soundtrigger_event, 1);
		input_sync(soundtrigger_input_dev);

		input_report_key(soundtrigger_input_dev,
			SOUNDTRIGGER_EVENT_BASE + soundtrigger_event, 0);
		input_sync(soundtrigger_input_dev);
	}

	return IRQ_HANDLED;
}
static int hi6402_read_saradc_value_detect(struct hi6402_mbhc_platform_data *pdata)
{
	int retry = 3;
	int reg_value = 0;

	BUG_ON(NULL == pdata->p_irq);

	mutex_lock(&pdata->saradc_mutex);

	/* saradc on */
	hi6402_reg_clr_bit(pdata->p_irq, HI6402_ANA_REG60, HI6402_SARADC_PD_BIT);
	/* start saradc */
	hi6402_reg_set_bit(pdata->p_irq, HI6402_ANA_REG60, HI6402_SAR_START_BIT);

	while(retry--) {
		usleep_range(1000, 1100);
		if (check_saradc_value_ready_detect(pdata)) {
			reg_value = hi6402_irq_read(pdata->p_irq, HI6402_SARADC_VALUE_REG);
			pr_info("%s : saradc value is %#x\n", __FUNCTION__, reg_value);
			break;
		}
	}

	if (0 > retry)
		pr_err("%s : get saradc value err, set as 0\n", __FUNCTION__);

	/* end saradc */
	hi6402_reg_clr_bit(pdata->p_irq, HI6402_ANA_REG60, HI6402_SAR_START_BIT);
	/* saradc pd */
	hi6402_reg_set_bit(pdata->p_irq, HI6402_ANA_REG60, HI6402_SARADC_PD_BIT);

	mutex_unlock(&pdata->saradc_mutex);

	return GET_VOLTAGE(reg_value);
}
static inline bool check_headset_pluged_in(struct hi6402_mbhc_platform_data *pdata)
{
	/*
	 * 0 : means headset is pluged out
	 * 1 : means headset is pluged in
	 */
	return (0 != (hi6402_irq_read(pdata->p_irq, HI6402_IRQ_SOURCE_REG) & (1 << HI6402_PLUGIN_IRQ_BIT)));
}
static inline bool check_saradc_value_ready_detect(struct hi6402_mbhc_platform_data *pdata)
{
	/* read codec status */
	int value = hi6402_irq_read(pdata->p_irq, HI6402_REG_IRQ_MBHC_2) & (1 << HI6402_SARADC_RD_BIT);

	/*clr irq*/
	hi6402_irq_write(pdata->p_irq, HI6402_REG_IRQ_MBHC_2, 0x04);

	if (0 == value)
		return false;

	return true;
}
static irqreturn_t hi6402_pll_unlock_handler(int irq, void *data)
{
	struct hi6402_mbhc_platform_data *pdata =
			(struct hi6402_mbhc_platform_data *)data;

	BUG_ON(NULL == pdata);

	unsigned int i = 0;

	mutex_lock(&pdata->p_irq->pll_mutex);

	if (0 != (hi6402_irq_read(pdata->p_irq, HI6402_PLL_PD_FLAG_REG) & PLL_PD_VALUE) || 0 != (hi6402_irq_read(pdata->p_irq, HI6402_PLL_LOCK_FLAG_REG) & PLL_LOCK_VALUE)){
		pr_info("%s(%u): pll pd, ignore pll unlock irq! \n", __FUNCTION__, __LINE__);
		/* mask pll unlock irq */
		mutex_lock(&pdata->p_irq->irq_lock);
		hi6402_reg_set_bit(pdata->p_irq, HI6402_MASK_IRQ_REG_2, HI6402_MASK_PLL_UNLOCK_BIT);
		pdata->p_irq->mask2 |= 0x10;
		mutex_unlock(&pdata->p_irq->irq_lock);
	} else {
		pr_info("%s(%u): pll unlock irq! \n", __FUNCTION__, __LINE__);

		if (!dsm_client_ocuppy(dsm_audio_client)) {
			dsm_client_record(dsm_audio_client, "DSM_HI6402_PLL_UNLOCK\n");
			dsm_client_notify(dsm_audio_client, DSM_HI6402_PLL_UNLOCK);
		}

		for (i = PLL_UNLOCK_REG_START; i<= PLL_UNLOCK_REG_END; i++) {
			pr_err("%s(%u): %x is %x \n", __FUNCTION__, __LINE__, i, hi6402_irq_read(pdata->p_irq, i));
		}

		pdata->p_irq->pll_status = HI6402_PLL_RST;
		hi6402_irq_set_pll_mode(pdata->p_irq);
	}

	mutex_unlock(&pdata->p_irq->pll_mutex);

	return IRQ_HANDLED;
}
static unsigned hi6402_pinctrl_readl(struct hi6402_pinctrl_device *pindev, unsigned reg)
{
	return hi6402_irq_read(pindev->p_irq_data, pindev->base_reg + reg);
}