AST_HIF_HW_RESULT ast_hif_hw_write(AST_HIF_HW_TYPE type, kal_uint32 addr, kal_uint32 size, AST_HIF_HW_CALLBACK fCB)
{
HIF_RESULT result = HIF_RESULT_OK;
switch (type)
{
case AST_HIF_HW_TYPE_A0H_CPU:
#if defined(MT6255)
result = hif_mcu_write_fast(ast_hif_hw_handle, HIF_TYPE_A0H_CPU, addr, size);
#else
result = hif_write(ast_hif_hw_handle, HIF_TYPE_A0H_CPU, addr, size, fCB);
#endif
break;
case AST_HIF_HW_TYPE_A0H_DMA:
result = hif_write(ast_hif_hw_handle, HIF_TYPE_A0H_DMA, addr, size, fCB);
break;
case AST_HIF_HW_TYPE_A0L_CPU:
#if defined(MT6255)
result = hif_mcu_write_fast(ast_hif_hw_handle, HIF_TYPE_A0L_CPU, addr, size);
#else
result = hif_write(ast_hif_hw_handle, HIF_TYPE_A0L_CPU, addr, size, fCB);
#endif
break;
case AST_HIF_HW_TYPE_A0L_DMA:
result = hif_write(ast_hif_hw_handle, HIF_TYPE_A0L_DMA, addr, size, fCB);
break;
default:
ASSERT(0);
break;
}
return (AST_HIF_HW_RESULT)result;
}
HIF_RESULT hif_write(HIF_HANDLE handle, HIF_TYPE type, kal_uint32 addr, kal_uint32 size, HIF_CALLBACK fCB)
{
HIF_RESULT result = HIF_RESULT_OK;
HIF_INTERNAL_HANDLE_T* pHandle = (HIF_INTERNAL_HANDLE_T*) handle;
#if defined (MT6255)
kal_bool cb_en = KAL_FALSE;
if(SW_SEC_0 == chip_version)
{
if ((type == HIF_TYPE_A0H_DMA)||(type == HIF_TYPE_A0L_DMA))
{
type --; // change from DMA to CPU
if(fCB)
cb_en = KAL_TRUE;
}
}
#endif
if ((type == HIF_TYPE_A0H_DMA) || (type == HIF_TYPE_A0L_DMA))
{
SLA_CustomLogging("H_W",2);//set for debug
}
//ASSERT(pHandle != NULL);
//ASSERT(pHandle->user != 0);
if((pHandle == NULL)||(pHandle->user == 0))
return HIF_RESULT_INVALID_HANDLE;
//ASSERT(size != 0);
//ASSERT((pHandle->config.hif_bus_width==8)? 1 : (size%2==0));
if ((size == 0) || (!((pHandle->config.hif_bus_width==8)? 1 : (size%2==0))))
return HIF_RESULT_INVALID_ARGUMENT;
//ASSERT(hif_power_on[pHandle->engine_id] == KAL_TRUE);
if (hif_power_on[pHandle->engine_id] == KAL_FALSE)
return HIF_RESULT_HIF_NOT_POWER_ON;
//check if DMA is busy,to avoid re-entry DMA mode.
if ((type == HIF_TYPE_A0H_DMA)||(type == HIF_TYPE_A0L_DMA))
{
ASSERT(!pHandle->DMA_BUSY);
ASSERT(fCB);
}
if(type == HIF_TYPE_A0H_CPU||type == HIF_TYPE_A0L_CPU)
result = hif_mcu_write_fast( handle, type, addr, size);
else if(type == HIF_TYPE_A0H_DMA||type == HIF_TYPE_A0L_DMA)
result = hif_dma_write_internal(handle, type, addr, size, fCB);
#if defined (MT6255)
if(SW_SEC_0 == chip_version)
{
if((result == HIF_RESULT_OK) && (cb_en))
fCB();
}
#endif
return result;
}