void __platform_init()
{
    __efm32hg_mcu_init();
    __gpio_init();
    __uart_init();
    __led_init();
    __lcd_init();

#ifdef PLATFORM_USE_USB_CDC
    __usb_init_cdc();
#endif

#ifdef USE_CC1101
    //TODO: add calls to hw_gpio_configure_pin for the pins used by the CC1101 driver
    //(and possibly the spi interface)

    // configure the interrupt pins here, since hw_gpio_configure_pin() is MCU specific and not part of the common HAL API
    hw_gpio_configure_pin(CC1101_GDO0_PIN, true, gpioModeInput, 0); // TODO pull up or pull down to prevent floating
    //hw_gpio_configure_pin(CC1101_GDO2_PIN, true, gpioModeInput, 0) // TODO pull up or pull down to prevent floating // TODO not used for now
#endif
    __hw_debug_init();

    error_t err;
    err = hw_gpio_configure_pin(BUTTON0, true, gpioModeInput, 0); assert(err == SUCCESS); // TODO pull up or pull down to prevent floating
    err = hw_gpio_configure_pin(BUTTON1, true, gpioModeInput, 0); assert(err == SUCCESS); // TODO pull up or pull down to prevent floating
}
void __platform_init()
{
    __gpio_init();
    __led_init();
    __ubutton_init();

#ifdef USE_CC1101
    // configure the interrupt pins here, since hw_gpio_configure_pin() is MCU
    // specific and not part of the common HAL API
    hw_gpio_configure_pin(CC1101_GDO0_PIN, true, gpioModeInput, 0);
    hw_gpio_configure_pin(CC1101_GDO2_PIN, true, gpioModeInput, 0);
    // hw_gpio_configure_pin(CC1101_SPI_PIN_CS, false, gpioModePushPull, 1);
#endif

#ifdef USE_SX127X
    // configure the interrupt pins here, since hw_gpio_configure_pin() is MCU
    // specific and not part of the common HAL API
    hw_gpio_configure_pin(SX127x_DIO0_PIN, true, gpioModeInput, 0);
    hw_gpio_configure_pin(SX127x_DIO1_PIN, true, gpioModeInput, 0);
#endif

    //__watchdog_init();

    /* Initialize NVRAM */


    /* Initialize NOR flash */
    blockdevice_init(permanent_blockdevice);
}
void __platform_init()
{
    __efm32hg_mcu_init();
    __gpio_init();
    __led_init();
    __lcd_init();

#ifdef PLATFORM_USE_USB_CDC
    __usb_init_cdc();
#endif

#if defined(FRAMEWORK_LOG_ENABLED) || defined(FRAMEWORK_SHELL_ENABLED)
    // framework does not need console, if app needs it app should init this
    console_init();
#endif

#ifdef USE_CC1101
    // configure the interrupt pins here, since hw_gpio_configure_pin() is MCU specific and not part of the common HAL API
    hw_gpio_configure_pin(CC1101_GDO0_PIN, true, gpioModeInput, 0); // TODO pull up or pull down to prevent floating
    // hw_gpio_configure_pin(CC1101_SPI_PIN_CS, false, gpioModePushPull, 1);
    //hw_gpio_configure_pin(CC1101_GDO2_PIN, true, gpioModeInput, 0) // TODO pull up or pull down to prevent floating // TODO not used for now
#endif
    __hw_debug_init();

    error_t err;
    err = hw_gpio_configure_pin(BUTTON0, true, gpioModeInput, 0); assert(err == SUCCESS); // TODO pull up or pull down to prevent floating
    err = hw_gpio_configure_pin(BUTTON1, true, gpioModeInput, 0); assert(err == SUCCESS); // TODO pull up or pull down to prevent floating

    // TODO: only for cc430?
    // __watchdog_init(); // TODO configure from cmake?
}
void hw_fem_stop(void)
{
    GLOBAL_INT_DISABLE();
    fem_config.started = false;

    /* Stop DCF Timers */
#if dg_configBLACK_ORCA_IC_REV == BLACK_ORCA_IC_REV_A
    RFCU_POWER->RF_PORT_EN_REG = 0x0;
#else
    RFCU_POWER->RF_PORT_EN_BLE_REG = 0x0;
    RFCU_POWER->RF_PORT_EN_FTDF_REG = 0x0;
#endif

    /* Set all FEM interface outputs to GPIO mode, and value 0, in order to get the minimum
     * possible power consumption from FEM
     */
#if defined(dg_configFEM_SKY66112_11_CSD_PORT) && defined(dg_configFEM_SKY66112_11_CSD_PIN)
    hw_gpio_configure_pin(dg_configFEM_SKY66112_11_CSD_PORT, dg_configFEM_SKY66112_11_CSD_PIN,
                          HW_GPIO_MODE_OUTPUT, HW_GPIO_FUNC_GPIO, false);
#endif

    hw_gpio_configure_pin(dg_configFEM_SKY66112_11_CTX_PORT, dg_configFEM_SKY66112_11_CTX_PIN,
                          HW_GPIO_MODE_OUTPUT, HW_GPIO_FUNC_GPIO, false);

#if defined(dg_configFEM_SKY66112_11_CHL_PORT) && defined(dg_configFEM_SKY66112_11_CHL_PIN)
    hw_gpio_configure_pin(dg_configFEM_SKY66112_11_CHL_PORT, dg_configFEM_SKY66112_11_CHL_PIN,
                          HW_GPIO_MODE_OUTPUT, HW_GPIO_FUNC_GPIO, false);
#endif

    hw_gpio_configure_pin(dg_configFEM_SKY66112_11_CRX_PORT, dg_configFEM_SKY66112_11_CRX_PIN,
                          HW_GPIO_MODE_OUTPUT, HW_GPIO_FUNC_GPIO, false);

#if defined(dg_configFEM_SKY66112_11_CPS_PORT) && defined(dg_configFEM_SKY66112_11_CPS_PIN)
    hw_gpio_configure_pin(dg_configFEM_SKY66112_11_CPS_PORT, dg_configFEM_SKY66112_11_CPS_PIN,
                          HW_GPIO_MODE_OUTPUT, HW_GPIO_FUNC_GPIO, false);
#endif

#if defined(dg_configFEM_SKY66112_11_ANTSEL_PORT) && defined(dg_configFEM_SKY66112_11_ANTSEL_PIN)
    hw_gpio_configure_pin(dg_configFEM_SKY66112_11_ANTSEL_PORT, dg_configFEM_SKY66112_11_ANTSEL_PIN,
                          HW_GPIO_MODE_OUTPUT, HW_GPIO_FUNC_GPIO, false);
#endif

#if defined(dg_configFEM_SKY66112_11_ANT_TRIM_0_PORT) && defined(dg_configFEM_SKY66112_11_ANT_TRIM_0_PIN)
    hw_gpio_configure_pin(dg_configFEM_SKY66112_11_ANT_TRIM_0_PORT, dg_configFEM_SKY66112_11_ANT_TRIM_0_PORT,
                          HW_GPIO_MODE_OUTPUT, HW_GPIO_FUNC_GPIO, false);
#endif

#if defined(dg_configFEM_SKY66112_11_ANT_TRIM_1_PORT) && defined(dg_configFEM_SKY66112_11_ANT_TRIM_1_PIN)
    hw_gpio_configure_pin(dg_configFEM_SKY66112_11_ANT_TRIM_1_PORT, dg_configFEM_SKY66112_11_ANT_TRIM_1_PORT,
                          HW_GPIO_MODE_OUTPUT, HW_GPIO_FUNC_GPIO, false);
#endif

#if defined(dg_configFEM_SKY66112_11_ANT_TRIM_2_PORT) && defined(dg_configFEM_SKY66112_11_ANT_TRIM_2_PIN)
    hw_gpio_configure_pin(dg_configFEM_SKY66112_11_ANT_TRIM_2_PORT, dg_configFEM_SKY66112_11_ANT_TRIM_2_PORT,
                          HW_GPIO_MODE_OUTPUT, HW_GPIO_FUNC_GPIO, false);
#endif

    GLOBAL_INT_RESTORE();
}
static void set_bypass(void)
{
    uint16_t m = 0;

    if (fem_config.tx_bypass)
    {
        m = RFCU_POWER_RF_PORT_EN_REG_RF_PORT3_TX_Msk;
    }

    if (fem_config.rx_bypass)
    {
        m |= RFCU_POWER_RF_PORT_EN_REG_RF_PORT3_RX_Msk;
    }

    REG_SET_MASKED(RFCU_POWER, RF_PORT_EN_REG,
                   RFCU_POWER_RF_PORT_EN_REG_RF_PORT3_RX_Msk |
                   RFCU_POWER_RF_PORT_EN_REG_RF_PORT3_TX_Msk, m);

    if (m == 0)
    {
        /* No RX/TX bypass. Drive the interface line to low */
        hw_gpio_configure_pin(dg_configFEM_SKY66112_11_CPS_PORT,
                              dg_configFEM_SKY66112_11_CPS_PIN,
                              HW_GPIO_MODE_OUTPUT, HW_GPIO_FUNC_GPIO, false);
    }
    else
    {
        /* At least one of TX/RX needs bypass */
        hw_gpio_set_pin_function(dg_configFEM_SKY66112_11_CPS_PORT,
                                 dg_configFEM_SKY66112_11_CPS_PIN,
                                 HW_GPIO_MODE_OUTPUT, HW_GPIO_FUNC_PORT3_DCF);
    }
}
void __hw_debug_init()
{
  for(int i = 0; i < PLATFORM_NUM_DEBUGPINS; i++)
	{
    error_t err = hw_gpio_configure_pin(debug_pins[i], false, GPIO_MODE_OUTPUT_PP, 0);
		assert(err == SUCCESS);
	}
}
Beispiel #7
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/**                                                                                                           
 * \brief Initialize the peripherals domain after power-up.                                                   
 *                                                                                                            
 */                                                                                                           
static void periph_init(void)                                                                                 
{                                                                                                             
        hw_gpio_set_pin_function(HW_GPIO_PORT_1, HW_GPIO_PIN_3, HW_GPIO_MODE_OUTPUT,                  
                HW_GPIO_FUNC_UART2_TX);                                                               
        hw_gpio_set_pin_function(HW_GPIO_PORT_2, HW_GPIO_PIN_3, HW_GPIO_MODE_OUTPUT,                  
                HW_GPIO_FUNC_UART2_RX);                                                               
        hw_gpio_configure_pin(CFG_TRIGGER_DELETE_BOND_GPIO_PORT, CFG_TRIGGER_DELETE_BOND_GPIO_PIN,            
                                                HW_GPIO_MODE_INPUT_PULLUP, HW_GPIO_FUNC_GPIO, 1);             
}                                                                                                             
__LINK_C void __ubutton_init()
{
	error_t err;
    err = hw_gpio_configure_pin(BUTTON0, true, gpioModeInput, 0); assert(err == SUCCESS); // TODO pull up or pull down to prevent floating
    err = hw_gpio_configure_pin(BUTTON1, true, gpioModeInput, 0); assert(err == SUCCESS); // TODO pull up or pull down to prevent floating

	buttons[0].button_id = BUTTON0;
	buttons[1].button_id = BUTTON1;
	for(int i = 0; i < NUM_USERBUTTONS; i++)
	{
		memset(buttons[i].callbacks, 0, sizeof(buttons[i].callbacks));
		buttons[i].cur_callback_id = BUTTON_QUEUE_SIZE;
		buttons[i].num_registered_callbacks = 0;
		error_t err = hw_gpio_configure_interrupt(buttons[i].button_id, &button_callback, GPIO_FALLING_EDGE);
		assert(err == SUCCESS);
	}
	sched_register_task(&button_task);
}
void __led_init()
{
	leds[0] = LED0;
	leds[1] = LED1;
	for(int i = 0; i < HW_NUM_LEDS; i++)
	{
		error_t err = hw_gpio_configure_pin(leds[i], false, gpioModePushPull, 0);
		assert(err == SUCCESS);
	}
}
void __hw_debug_init()
{
    debug_pins[0] = DEBUG0;
    debug_pins[1] = DEBUG1;
    debug_pins[2] = DEBUG2;
    debug_pins[3] = DEBUG3;
    for(int i = 0; i < DEBUG_PIN_NUM; i++)
    {
        error_t err = hw_gpio_configure_pin(debug_pins[i], false, gpioModePushPull, 0);
        assert(err == SUCCESS);
    }
}
void __platform_init()
{
    __gpio_init();
    console_init();
    __led_init();

    #ifdef USE_CC1101
    // configure the interrupt pins here, since hw_gpio_configure_pin() is MCU
    // specific and not part of the common HAL API
    hw_gpio_configure_pin(CC1101_GDO0_PIN, true, gpioModeInput, 0);
    // hw_gpio_configure_pin(CC1101_SPI_PIN_CS, false, gpioModePushPull, 1);
#endif

    __watchdog_init();
}
/**************************************************************************//**
 * @brief  Setup SPI as Master
 *****************************************************************************/
void setupSpi(void)
{
    USART_InitSync_TypeDef usartInit = USART_INITSYNC_DEFAULT;  

    /* Initialize SPI */
    usartInit.databits  = usartDatabits8;   /* 8 bits of data */
    usartInit.baudrate  = SPI_BAUDRATE;     /* Clock frequency */
    usartInit.master    = true;             /* Master mode */
    usartInit.msbf      = true;             /* Most Significant Bit first */
    usartInit.clockMode = usartClockMode0;  /* Clock idle low, sample on rising edge */

    USART_InitSync(SPI_CHANNEL, &usartInit);

    /* Enable SPI transmit and receive */
    USART_Enable(SPI_CHANNEL, usartEnable);

    /* Configure GPIO pins for SPI */
    //GPIO_PinModeSet(SPI_PORT_MOSI,  SPI_PIN_MOSI,   gpioModePushPull,   0); /* MOSI */
    //GPIO_PinModeSet(SPI_PORT_MISO,  SPI_PIN_MISO,   gpioModeInput,      0); /* MISO */
    //GPIO_PinModeSet(SPI_PORT_CLK,   SPI_PIN_CLK,    gpioModePushPull,   0); /* CLK */
    //GPIO_PinModeSet(SPI_PORT_CS,    SPI_PIN_CS,     gpioModePushPull,   1); /* CS */
    //edit: do this via the hw_gpio_configure_pin interface to signal that the pins are in use
    //note: normally this should be done in the platform-specific initialisation code BUT, since this is a driver for a device (uart) that is
    //an integral part of the MCU we are certain this code will NOT be used in combination with a different MCU so we can do this here
    error_t err;
    err = hw_gpio_configure_pin(SPI_PIN_MOSI, false,   gpioModePushPull,   0); assert(err == SUCCESS); /* MOSI */
    err = hw_gpio_configure_pin(SPI_PIN_MISO, false,   gpioModeInput,      0); assert(err == SUCCESS); /* MISO */
    err = hw_gpio_configure_pin(SPI_PIN_CLK, false,    gpioModePushPull,   0); assert(err == SUCCESS); /* CLK */
    err = hw_gpio_configure_pin(SPI_PIN_CS, false,     gpioModePushPull,   1); assert(err == SUCCESS); /* CS */

    /* Enable routing for SPI pins from USART to location 1 */
    SPI_CHANNEL->ROUTE =  USART_ROUTE_TXPEN |
                          USART_ROUTE_RXPEN |
                          USART_ROUTE_CLKPEN |
                          SPI_ROUTE_LOCATION;
}
void hw_fem_set_antenna(bool one)
{
#if defined(dg_configFEM_SKY66112_11_ANTSEL_PORT) && defined(dg_configFEM_SKY66112_11_ANTSEL_PIN)
    GLOBAL_INT_DISABLE();
    fem_config.antsel = one;

    if (fem_config.started)
    {
        /* Antenna selection */
        hw_gpio_configure_pin(dg_configFEM_SKY66112_11_ANTSEL_PORT,
                              dg_configFEM_SKY66112_11_ANTSEL_PIN,
                              HW_GPIO_MODE_OUTPUT, HW_GPIO_FUNC_GPIO, fem_config.antsel);
    }

    GLOBAL_INT_RESTORE();
#endif
}
int main()
{
	//BSP_TraceProfilerSetup();
    // Only when using bootloader
	//SCB->VTOR=0x4000;

	//activate VCOM
#ifdef PLATFORM_USE_VCOM
	hw_gpio_configure_pin(VCOM_ENABLE, false, gpioModePushPull, 1);
	hw_gpio_set(VCOM_ENABLE);
#endif

    //initialise the platform itself
	__platform_init();
    //do not initialise the scheduler, this is done by __framework_bootstrap()
    __framework_bootstrap();
    //initialise platform functionality that depends on the framework
    __platform_post_framework_init();
    scheduler_run();
    return 0;
}
static void set_txpower(void)
{
    if (!fem_config.started)
    {
        return;
    }

    /* CHL is always 0 on RX */
    REG_CLR_BIT(RFCU_POWER, RF_PORT_EN_BLE_REG, RF_PORT4_RX);
    REG_CLR_BIT(RFCU_POWER, RF_PORT_EN_FTDF_REG, RF_PORT4_RX);

    if (fem_config.tx_power_ble)
    {
        REG_SET_BIT(RFCU_POWER, RF_PORT_EN_BLE_REG, RF_PORT4_TX);
    }

    if (fem_config.tx_power_ftdf)
    {
        REG_SET_BIT(RFCU_POWER, RF_PORT_EN_FTDF_REG, RF_PORT4_TX);
    }

    if (fem_config.tx_power_ble || fem_config.tx_power_ftdf)
    {
        /* TX Power high. Configure GPIO for DCF. Enable DCF on TX. */
        hw_gpio_set_pin_function(dg_configFEM_SKY66112_11_CHL_PORT,
                                 dg_configFEM_SKY66112_11_CHL_PIN,
                                 HW_GPIO_MODE_OUTPUT, HW_GPIO_FUNC_PORT4_DCF);
    }
    else
    {
        /* TX Power low. Stop DCF, set GPIO to low */
        hw_gpio_configure_pin(dg_configFEM_SKY66112_11_CHL_PORT,
                              dg_configFEM_SKY66112_11_CHL_PIN,
                              HW_GPIO_MODE_OUTPUT, HW_GPIO_FUNC_GPIO, false);
    }
}
void hw_fem_set_txpower(bool high)
{
#if defined(dg_configFEM_SKY66112_11_CHL_PORT) && defined(dg_configFEM_SKY66112_11_CHL_PIN)
    GLOBAL_INT_DISABLE();
    fem_config.tx_power = high;

    if (fem_config.started)
    {
        if (high == false)
        {
            /* TX Power low. Stop DCF, set GPIO to low */
            hw_gpio_configure_pin(dg_configFEM_SKY66112_11_CHL_PORT,
                                  dg_configFEM_SKY66112_11_CHL_PIN,
                                  HW_GPIO_MODE_OUTPUT, HW_GPIO_FUNC_GPIO, false);
            REG_SET_MASKED(RFCU_POWER, RF_PORT_EN_REG,
                           RFCU_POWER_RF_PORT_EN_REG_RF_PORT4_RX_Msk |
                           RFCU_POWER_RF_PORT_EN_REG_RF_PORT4_TX_Msk, 0);

        }
        else
        {
            /* TX Power high. Configure GPIO for DCF. Enable DCF on TX. */
            hw_gpio_set_pin_function(dg_configFEM_SKY66112_11_CHL_PORT,
                                     dg_configFEM_SKY66112_11_CHL_PIN,
                                     HW_GPIO_MODE_OUTPUT, HW_GPIO_FUNC_PORT4_DCF);
            REG_SET_MASKED(RFCU_POWER, RF_PORT_EN_REG,
                           RFCU_POWER_RF_PORT_EN_REG_RF_PORT4_RX_Msk |
                           RFCU_POWER_RF_PORT_EN_REG_RF_PORT4_TX_Msk,
                           RFCU_POWER_RF_PORT_EN_REG_RF_PORT4_TX_Msk);

        }
    }

    GLOBAL_INT_RESTORE();
#endif
}
void hw_fem_start(void)
{
    GLOBAL_INT_DISABLE();
    fem_config.started = true;

    uint8_t set_delay;
    uint8_t reset_delay;
    uint16_t rf_port_en;

    /******************************************************
     * Setup GPIOs
     */

    /* CSD GPIO Config */
#if defined(dg_configFEM_SKY66112_11_CSD_PORT) && defined(dg_configFEM_SKY66112_11_CSD_PIN)
# if dg_configFEM_SKY66112_11_CSD_USE_DCF == 0
    /* Manually set CSD (Enable FEM) */
    hw_gpio_configure_pin(dg_configFEM_SKY66112_11_CSD_PORT, dg_configFEM_SKY66112_11_CSD_PIN,
                          HW_GPIO_MODE_OUTPUT, HW_GPIO_FUNC_GPIO, true);
# else
    /* Use DCF for CSD */
    hw_gpio_set_pin_function(dg_configFEM_SKY66112_11_CSD_PORT, dg_configFEM_SKY66112_11_CSD_PIN,
                             HW_GPIO_MODE_OUTPUT, HW_GPIO_FUNC_PORT2_DCF);
# endif
#endif

    /* Timer 27 GPIO (DCF Port 0). Used for TX EN */
    hw_gpio_set_pin_function(dg_configFEM_SKY66112_11_CTX_PORT, dg_configFEM_SKY66112_11_CTX_PIN,
                             HW_GPIO_MODE_OUTPUT, HW_GPIO_FUNC_PORT0_DCF);

    /* Timer 28 (DCF Port 1). Used for RX EN */
    hw_gpio_set_pin_function(dg_configFEM_SKY66112_11_CRX_PORT, dg_configFEM_SKY66112_11_CRX_PIN,
                             HW_GPIO_MODE_OUTPUT, HW_GPIO_FUNC_PORT1_DCF);

    /* Antenna selection */
#if defined(dg_configFEM_SKY66112_11_ANTSEL_PORT) && defined(dg_configFEM_SKY66112_11_ANTSEL_PIN)
    hw_gpio_configure_pin(dg_configFEM_SKY66112_11_ANTSEL_PORT, dg_configFEM_SKY66112_11_ANTSEL_PIN,
                          HW_GPIO_MODE_OUTPUT, HW_GPIO_FUNC_GPIO, fem_config.antsel);
#endif

    /******************************************************
     * Setup RF_ANT_TRIM GPIOs
     */

    /* RF_ANT_TRIM_0 Config */
#if defined(dg_configFEM_SKY66112_11_ANT_TRIM_0_PORT) && defined(dg_configFEM_SKY66112_11_ANT_TRIM_0_PIN)
    hw_gpio_set_pin_function(dg_configFEM_SKY66112_11_ANT_TRIM_0_PORT, dg_configFEM_SKY66112_11_ANT_TRIM_0_PIN,
                             HW_GPIO_MODE_OUTPUT, HW_GPIO_FUNC_RF_ANT_TRIM0);
#endif

    /* RF_ANT_TRIM_1 Config */
#if defined(dg_configFEM_SKY66112_11_ANT_TRIM_1_PORT) && defined(dg_configFEM_SKY66112_11_ANT_TRIM_1_PIN)
    hw_gpio_set_pin_function(dg_configFEM_SKY66112_11_ANT_TRIM_1_PORT, dg_configFEM_SKY66112_11_ANT_TRIM_1_PIN,
                             HW_GPIO_MODE_OUTPUT, HW_GPIO_FUNC_RF_ANT_TRIM1);
#endif

    /* RF_ANT_TRIM_2 Config */
#if defined(dg_configFEM_SKY66112_11_ANT_TRIM_2_PORT) && defined(dg_configFEM_SKY66112_11_ANT_TRIM_2_PIN)
    hw_gpio_set_pin_function(dg_configFEM_SKY66112_11_ANT_TRIM_2_PORT, dg_configFEM_SKY66112_11_ANT_TRIM_2_PIN,
                             HW_GPIO_MODE_OUTPUT, HW_GPIO_FUNC_RF_ANT_TRIM2);
#endif

    /******************************************************
     * Setup DCFs
     */

    /* assign values to the timer registers for CTX/CRX (in usec) */
    REG_SETF(RFCU_POWER, RF_CNTRL_TIMER_27_REG, SET_OFFSET, dg_configFEM_SKY66112_11_TXSET_DCF);
    REG_SETF(RFCU_POWER, RF_CNTRL_TIMER_27_REG, RESET_OFFSET, dg_configFEM_SKY66112_11_TXRESET_DCF);
    REG_SETF(RFCU_POWER, RF_CNTRL_TIMER_28_REG, SET_OFFSET, dg_configFEM_SKY66112_11_RXSET_DCF);
    REG_SETF(RFCU_POWER, RF_CNTRL_TIMER_28_REG, RESET_OFFSET, dg_configFEM_SKY66112_11_RXRESET_DCF);

    rf_port_en = 0x6; /* Start with Port 0: TX, Port 1: RX */

    /* Compute set/reset delays to use for CSD, CPS, CHL DCFs: For setting delay,
     * smaller of TXSET, RXSET, and for resetting delay, larger of TXSET, RXSET
     */
#if dg_configFEM_SKY66112_11_RXSET_DCF > dg_configFEM_SKY66112_11_TXSET_DCF
    set_delay = dg_configFEM_SKY66112_11_TXSET_DCF;
#else
    set_delay = dg_configFEM_SKY66112_11_RXSET_DCF;
#endif

#if dg_configFEM_SKY66112_11_RXRESET_DCF > dg_configFEM_SKY66112_11_TXRESET_DCF
    reset_delay = dg_configFEM_SKY66112_11_RXRESET_DCF;
#else
    reset_delay = dg_configFEM_SKY66112_11_TXRESET_DCF;
#endif

    /* CSD DCF (if enabled) configuration */
#if defined(dg_configFEM_SKY66112_11_CSD_PORT) && defined(dg_configFEM_SKY66112_11_CSD_PIN)
# if dg_configFEM_SKY66112_11_CSD_USE_DCF != 0
    REG_SETF(RFCU_POWER, RF_CNTRL_TIMER_29_REG, SET_OFFSET, set_delay);
    REG_SETF(RFCU_POWER, RF_CNTRL_TIMER_29_REG, RESET_OFFSET, reset_delay);

    /* enable DCF Signals for Port 2 (CSD) for both rx/tx */
    rf_port_en |= 0x30;

# endif /* dg_configFEM_SKY66112_11_CSD_USE_DCF != 0 */
#endif

    /* Set bypass (CPS) DCF timers (but don't enable yet) */
    REG_SETF(RFCU_POWER, RF_CNTRL_TIMER_30_REG, SET_OFFSET, set_delay);
    REG_SETF(RFCU_POWER, RF_CNTRL_TIMER_30_REG, RESET_OFFSET, reset_delay);

    /* Set TX Power (CHL) DCF timers (but don't enable yet) */
    REG_SETF(RFCU_POWER, RF_CNTRL_TIMER_31_REG, SET_OFFSET, dg_configFEM_SKY66112_11_TXSET_DCF);
    REG_SETF(RFCU_POWER, RF_CNTRL_TIMER_31_REG, RESET_OFFSET, dg_configFEM_SKY66112_11_TXRESET_DCF);

    /* Enable DCFs */
#if dg_configBLACK_ORCA_IC_REV == BLACK_ORCA_IC_REV_A
    RFCU_POWER->RF_PORT_EN_REG = rf_port_en;
    hw_fem_set_txpower(fem_config.tx_power);
#else
    RFCU_POWER->RF_PORT_EN_BLE_REG = rf_port_en;
    RFCU_POWER->RF_PORT_EN_FTDF_REG = rf_port_en;

    set_txpower();
#endif
    set_bypass();

    GLOBAL_INT_RESTORE();
}