static long ccu_nm_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) { struct ccu_nm *nm = hw_to_ccu_nm(hw); struct _ccu_nm _nm; if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV) rate *= nm->fixed_post_div; if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate)) { if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV) rate /= nm->fixed_post_div; return rate; } if (ccu_sdm_helper_has_rate(&nm->common, &nm->sdm, rate)) { if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV) rate /= nm->fixed_post_div; return rate; } _nm.min_n = nm->n.min ?: 1; _nm.max_n = nm->n.max ?: 1 << nm->n.width; _nm.min_m = 1; _nm.max_m = nm->m.max ?: 1 << nm->m.width; ccu_nm_find_best(*parent_rate, rate, &_nm); rate = *parent_rate * _nm.n / _nm.m; if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV) rate /= nm->fixed_post_div; return rate; }
static unsigned long ccu_nm_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { struct ccu_nm *nm = hw_to_ccu_nm(hw); unsigned long n, m; u32 reg; if (ccu_frac_helper_is_enabled(&nm->common, &nm->frac)) return ccu_frac_helper_read_rate(&nm->common, &nm->frac); reg = readl(nm->common.base + nm->common.reg); n = reg >> nm->n.shift; n &= (1 << nm->n.width) - 1; n += nm->n.offset; if (!n) n++; m = reg >> nm->m.shift; m &= (1 << nm->m.width) - 1; m += nm->m.offset; if (!m) m++; return parent_rate * n / m; }
static int ccu_nm_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { struct ccu_nm *nm = hw_to_ccu_nm(hw); unsigned long flags; unsigned long max_n, max_m; unsigned long n, m; u32 reg; if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate)) return ccu_frac_helper_set_rate(&nm->common, &nm->frac, rate); else ccu_frac_helper_disable(&nm->common, &nm->frac); max_n = 1 << nm->n.width; max_m = nm->m.max ?: 1 << nm->m.width; rational_best_approximation(rate, parent_rate, max_n, max_m, &n, &m); spin_lock_irqsave(nm->common.lock, flags); reg = readl(nm->common.base + nm->common.reg); reg &= ~GENMASK(nm->n.width + nm->n.shift - 1, nm->n.shift); reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift); writel(reg | ((m - 1) << nm->m.shift) | ((n - 1) << nm->n.shift), nm->common.base + nm->common.reg); spin_unlock_irqrestore(nm->common.lock, flags); ccu_helper_wait_for_lock(&nm->common, nm->lock); return 0; }
static long ccu_nm_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) { struct ccu_nm *nm = hw_to_ccu_nm(hw); unsigned long max_n, max_m; unsigned long n, m; max_n = 1 << nm->n.width; max_m = nm->m.max ?: 1 << nm->m.width; rational_best_approximation(rate, *parent_rate, max_n, max_m, &n, &m); return *parent_rate * n / m; }
static long ccu_nm_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) { struct ccu_nm *nm = hw_to_ccu_nm(hw); struct _ccu_nm _nm; _nm.min_n = nm->n.min ?: 1; _nm.max_n = nm->n.max ?: 1 << nm->n.width; _nm.min_m = 1; _nm.max_m = nm->m.max ?: 1 << nm->m.width; ccu_nm_find_best(*parent_rate, rate, &_nm); return *parent_rate * _nm.n / _nm.m; }
static unsigned long ccu_nm_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { struct ccu_nm *nm = hw_to_ccu_nm(hw); unsigned long rate; unsigned long n, m; u32 reg; if (ccu_frac_helper_is_enabled(&nm->common, &nm->frac)) { rate = ccu_frac_helper_read_rate(&nm->common, &nm->frac); if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV) rate /= nm->fixed_post_div; return rate; } reg = readl(nm->common.base + nm->common.reg); n = reg >> nm->n.shift; n &= (1 << nm->n.width) - 1; n += nm->n.offset; if (!n) n++; m = reg >> nm->m.shift; m &= (1 << nm->m.width) - 1; m += nm->m.offset; if (!m) m++; if (ccu_sdm_helper_is_enabled(&nm->common, &nm->sdm)) rate = ccu_sdm_helper_read_rate(&nm->common, &nm->sdm, m, n); else rate = parent_rate * n / m; if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV) rate /= nm->fixed_post_div; return rate; }
static int ccu_nm_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { struct ccu_nm *nm = hw_to_ccu_nm(hw); struct _ccu_nm _nm; unsigned long flags; u32 reg; if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate)) return ccu_frac_helper_set_rate(&nm->common, &nm->frac, rate); else ccu_frac_helper_disable(&nm->common, &nm->frac); _nm.min_n = nm->n.min ?: 1; _nm.max_n = nm->n.max ?: 1 << nm->n.width; _nm.min_m = 1; _nm.max_m = nm->m.max ?: 1 << nm->m.width; ccu_nm_find_best(parent_rate, rate, &_nm); spin_lock_irqsave(nm->common.lock, flags); reg = readl(nm->common.base + nm->common.reg); reg &= ~GENMASK(nm->n.width + nm->n.shift - 1, nm->n.shift); reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift); reg |= (_nm.n - nm->n.offset) << nm->n.shift; reg |= (_nm.m - nm->m.offset) << nm->m.shift; writel(reg, nm->common.base + nm->common.reg); spin_unlock_irqrestore(nm->common.lock, flags); ccu_helper_wait_for_lock(&nm->common, nm->lock); return 0; }
static int ccu_nm_is_enabled(struct clk_hw *hw) { struct ccu_nm *nm = hw_to_ccu_nm(hw); return ccu_gate_helper_is_enabled(&nm->common, nm->enable); }
static void ccu_nm_disable(struct clk_hw *hw) { struct ccu_nm *nm = hw_to_ccu_nm(hw); return ccu_gate_helper_disable(&nm->common, nm->enable); }
static int ccu_nm_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { struct ccu_nm *nm = hw_to_ccu_nm(hw); struct _ccu_nm _nm; unsigned long flags; u32 reg; /* Adjust target rate according to post-dividers */ if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV) rate = rate * nm->fixed_post_div; if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate)) { spin_lock_irqsave(nm->common.lock, flags); /* most SoCs require M to be 0 if fractional mode is used */ reg = readl(nm->common.base + nm->common.reg); reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift); writel(reg, nm->common.base + nm->common.reg); spin_unlock_irqrestore(nm->common.lock, flags); ccu_frac_helper_enable(&nm->common, &nm->frac); return ccu_frac_helper_set_rate(&nm->common, &nm->frac, rate, nm->lock); } else { ccu_frac_helper_disable(&nm->common, &nm->frac); } _nm.min_n = nm->n.min ?: 1; _nm.max_n = nm->n.max ?: 1 << nm->n.width; _nm.min_m = 1; _nm.max_m = nm->m.max ?: 1 << nm->m.width; if (ccu_sdm_helper_has_rate(&nm->common, &nm->sdm, rate)) { ccu_sdm_helper_enable(&nm->common, &nm->sdm, rate); /* Sigma delta modulation requires specific N and M factors */ ccu_sdm_helper_get_factors(&nm->common, &nm->sdm, rate, &_nm.m, &_nm.n); } else { ccu_sdm_helper_disable(&nm->common, &nm->sdm); ccu_nm_find_best(parent_rate, rate, &_nm); } spin_lock_irqsave(nm->common.lock, flags); reg = readl(nm->common.base + nm->common.reg); reg &= ~GENMASK(nm->n.width + nm->n.shift - 1, nm->n.shift); reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift); reg |= (_nm.n - nm->n.offset) << nm->n.shift; reg |= (_nm.m - nm->m.offset) << nm->m.shift; writel(reg, nm->common.base + nm->common.reg); spin_unlock_irqrestore(nm->common.lock, flags); ccu_helper_wait_for_lock(&nm->common, nm->lock); return 0; }