/**
* \brief Read response on I2C from PC
*
* return Status
* \param[in] rx_buf Pointer to receive the data
* \param[in] length The length of the read data
* \param[out] rx_buf Pointer to store the received SPI character
*/
bool adp_interface_read_response(uint8_t* rx_buf, uint16_t length)
{
enum status_code status;
uint8_t data_len = 0;
struct i2c_master_packet packet = {
.address = TWI_EDBG_SLAVE_ADDR,
.data_length = 1,
.data = &data_len,
};
i2c_master_read_packet_wait(&i2c_master_instance, &packet);
if (data_len != 0)
{
packet.data_length = data_len;
packet.data = rx_buf;
status = i2c_master_read_packet_wait(&i2c_master_instance, &packet);
}
return status;
}
/**
* \brief Sends and reads protocol packet data byte on I2C
*
* \param[in] tx_buf Pointer to send the protocol packet data
* \param[in] length The length of the send protocol packet data
* \param[out] rx_buf Pointer to store the received I2C character
*/
void adp_interface_transceive_procotol(uint8_t* tx_buf, uint16_t length, uint8_t* rx_buf)
{
adp_interface_send(tx_buf, length);
adp_interface_read_response(rx_buf, length);
}
int main(void)
{
system_init();
//! [init]
/* Configure device and enable. */
//! [config]
configure_i2c_master();
//! [config]
/* Timeout counter. */
//! [timeout_counter]
uint16_t timeout = 0;
//! [timeout_counter]
/* Init i2c packet. */
//! [packet]
struct i2c_master_packet packet = {
.address = SLAVE_ADDRESS,
.data_length = DATA_LENGTH,
.data = write_buffer,
.ten_bit_address = false,
.high_speed = false,
.hs_master_code = 0x0,
};
//! [packet]
//! [init]
//! [main]
/* Write buffer to slave until success. */
//! [write_packet]
while (i2c_master_write_packet_wait(&i2c_master_instance, &packet) !=
STATUS_OK) {
/* Increment timeout counter and check if timed out. */
if (timeout++ == TIMEOUT) {
break;
}
}
//! [write_packet]
/* Read from slave until success. */
//! [read_packet]
packet.data = read_buffer;
while (i2c_master_read_packet_wait(&i2c_master_instance, &packet) !=
STATUS_OK) {
/* Increment timeout counter and check if timed out. */
if (timeout++ == TIMEOUT) {
break;
}
}
//! [read_packet]
//! [main]
while (true) {
/* Infinite loop */
}
}
/**
* \brief Function for show the extension boards information
*
*/
static void show_extension_boards_information(void)
{
uint8_t request_token = EDBG_EXTEN_BOARDS_TOKEN;
uint32_t timeout = 0;
uint8_t board_num = 0;
uint8_t i,j;
/** Send the request token */
master_packet.address = EDBG_ADDRESS;
master_packet.data_length = 1;
master_packet.data = &request_token;
master_packet.ten_bit_address = false;
master_packet.high_speed = false;
master_packet.hs_master_code = 0x0;
while (i2c_master_write_packet_wait_no_stop(&i2c_master_instance, &master_packet) !=
STATUS_OK) {
/* Increment timeout counter and check if timed out. */
if (timeout++ == TIMEOUT) {
return;
}
}
/** Get the extension boards info */
master_packet.data_length = 1024;
master_packet.data = read_buffer;
while (i2c_master_read_packet_wait(&i2c_master_instance, &master_packet) !=
STATUS_OK) {
/* Increment timeout counter and check if timed out. */
if (timeout++ == TIMEOUT) {
return;
}
}
/** Check and show info */
extension_map[0] = read_buffer[0];
extension_map[1] = read_buffer[1];
for (i = 0; i < 2; i++) {
for (j = 1; j <= 8; j++) {
if (extension_map[1 - i] & 0x01) {
/** show extension board info */
printf("\r\n Extension board %d detected \r\n", (i * 8) + j);
decode_board_info(&read_buffer[2 + 64 * board_num]);
board_num++;
}
extension_map[1 - i] = extension_map[1 - i] >> 1;
}
}
}
uint8_t I2CRegRead(struct i2c_master_module* module,uint16_t deviceAddr,uint8_t regAddr)
{
struct i2c_master_packet packet;
uint8_t localBuff = regAddr;
packet.address = deviceAddr;
packet.data = &localBuff;
packet.data_length = 1;
packet.high_speed = false;
packet.hs_master_code = 0x0;
packet.ten_bit_address = false;
enum status_code tmpStatus = STATUS_OK;
tmpStatus = i2c_master_write_packet_wait_no_stop(module,&packet);
tmpStatus = i2c_master_read_packet_wait(module,&packet);
return localBuff;
}
/*---------------------------------------------------------------------------*/
bool
i2c_master_read_reg(uint8_t slave_addr,
uint8_t * tx_data, uint8_t tx_len,
uint8_t * rx_data, uint8_t rx_len)
{
struct i2c_master_packet packet;
uint16_t timeout;
/* Setup packet struct */
packet.address = slave_addr;
packet.ten_bit_address = false;
packet.high_speed = false;
packet.hs_master_code = 0x0;
/* Setup write buffer and reset timeout */
packet.data = tx_data;
packet.data_length = tx_len;
timeout = 0;
/* Write buffer to slave until success */
while (i2c_master_write_packet_wait_no_stop(&i2c_master_instance, &packet) != STATUS_OK) {
/* Increment timeout counter and check if timed out. */
if (timeout++ == TIMEOUT) {
WARN("write timeout");
return false;
}
}
/* Setup read buffer and reset timeout */
packet.data = rx_data;
packet.data_length = rx_len;
timeout = 0;
/* Read from slave until success. */
while (i2c_master_read_packet_wait(&i2c_master_instance, &packet) != STATUS_OK) {
/* Increment timeout counter and check if timed out. */
if (timeout++ == TIMEOUT) {
WARN("read timeout");
return false;
}
}
return true;
}
static sint8 nm_i2c_read(uint8 *rb, uint16 sz)
{
uint16_t timeout = 0;
sint8 result = M2M_SUCCESS;
struct i2c_master_packet packet = {
.address = SLAVE_ADDRESS,
.data_length = sz,
.data = rb,
};
/* Write buffer to slave until success. */
while (i2c_master_read_packet_wait(&i2c_master_instance, &packet) != STATUS_OK) {
/* Increment timeout counter and check if timed out. */
if (timeout++ == I2C_TIMEOUT) {
break;
}
}
return result;
}
/**
* \brief Function for show the kit data
*
*/
static void show_kit_data(void)
{
uint8_t request_token = EDBG_KIT_DATA_TOKEN;
uint32_t timeout = 0;
uint8_t i;
/** Send the request token */
master_packet.address = EDBG_ADDRESS;
master_packet.data_length = 1;
master_packet.data = &request_token;
master_packet.ten_bit_address = false;
master_packet.high_speed = false;
master_packet.hs_master_code = 0x0;
while (i2c_master_write_packet_wait_no_stop(&i2c_master_instance, &master_packet) !=
STATUS_OK) {
/* Increment timeout counter and check if timed out. */
if (timeout++ == TIMEOUT) {
return;
}
}
/** Get the extension boards info */
master_packet.data_length = 256;
master_packet.data = kit_data;
while (i2c_master_read_packet_wait(&i2c_master_instance, &master_packet) !=
STATUS_OK) {
/* Increment timeout counter and check if timed out. */
if (timeout++ == TIMEOUT) {
return;
}
}
/** show kit data */
printf("\r\n The kit data(MAC value): \r\n 0x");
for (i = 0; i < CONF_KIT_DATA_NUM; i++) {
printf("%02x", kit_data[i + EDBG_KIT_DATA_MAC_OFFSET]);
}
printf("\r\n");
}
/*! \brief Main function. Execution starts here.
*/
int main(void)
{
uint8_t write_data[PATTERN_TEST_LENGTH];
uint8_t read_data[PATTERN_TEST_LENGTH];
uint32_t file_size = 0,remaining_len = 0;;
struct i2c_master_packet tx_buf = {
.address = SLAVE_ADDRESS,
.data_length = PATTERN_TEST_LENGTH,
.data = write_data,
.ten_bit_address = false,
.high_speed = false,
.hs_master_code = 0x0,
};
struct i2c_master_packet rx_buf = {
.address = SLAVE_ADDRESS,
.data_length = 1,
.data = read_data,
.ten_bit_address = false,
.high_speed = false,
.hs_master_code = 0x0,
};
uint8_t nb_twi_packets_sent;
uint16_t cdc_rx_size;
irq_initialize_vectors();
cpu_irq_enable();
sleepmgr_init();
system_init();
configure_usart();
ui_init();
ui_powerdown();
udc_start();
printf("Start application\r\n");
while (true) {
if (!b_com_port_opened) {
continue;
}
if (b_cdc_data_rx == true) {
b_cdc_data_rx = false;
cdc_rx_size = udi_cdc_get_nb_received_data();
udi_cdc_read_buf((void *)cdc_data, cdc_rx_size);
if (file_size == 0 && cdc_rx_size == 4) {
MSB0W(file_size) = cdc_data[0];
MSB1W(file_size) = cdc_data[1];
MSB2W(file_size) = cdc_data[2];
MSB3W(file_size) = cdc_data[3];
printf("File size :%ld\r\n",file_size);
}
remaining_len += cdc_rx_size;
if (cdc_rx_size == TARGET_PAGE_SIZE/2) {
if (!b_wait) {
memcpy((void *)(write_data), (const void *)cdc_data, cdc_rx_size);
b_wait = true;
if (file_size + 4 == remaining_len) {
tx_buf.data_length = TARGET_PAGE_SIZE/2;
while (i2c_master_write_packet_wait(&i2c_master_instance, &tx_buf) != STATUS_OK) ;
}
}
else {
memcpy((void *)(write_data + (TARGET_PAGE_SIZE/2)), (const void *)cdc_data, cdc_rx_size);
tx_buf.data_length = TARGET_PAGE_SIZE;
while (i2c_master_write_packet_wait(&i2c_master_instance, &tx_buf) != STATUS_OK) ;
b_wait = false;
}
} else {
if ((cdc_rx_size) <= PATTERN_TEST_LENGTH) {
tx_buf.data_length = cdc_rx_size;
memcpy((void *)(write_data), (const void *)cdc_data, cdc_rx_size);
while (i2c_master_write_packet_wait(&i2c_master_instance, &tx_buf) != STATUS_OK) ;
} else {
nb_twi_packets_sent = 0;
while(cdc_rx_size / PATTERN_TEST_LENGTH) {
tx_buf.data_length = PATTERN_TEST_LENGTH;
memcpy((void *)(write_data), (const void *)(&cdc_data[(nb_twi_packets_sent++) * (PATTERN_TEST_LENGTH)]), PATTERN_TEST_LENGTH);
while (i2c_master_write_packet_wait(&i2c_master_instance, &tx_buf) != STATUS_OK) ;
cdc_rx_size -= (PATTERN_TEST_LENGTH);
}
if(cdc_rx_size) {
tx_buf.data_length = cdc_rx_size;
memcpy((void *)(write_data), (const void *)(&cdc_data[(nb_twi_packets_sent) * (PATTERN_TEST_LENGTH)]), cdc_rx_size);
while (i2c_master_write_packet_wait(&i2c_master_instance, &tx_buf) != STATUS_OK) ;
cdc_rx_size = 0;
}
}
}
}
if (i2c_master_read_packet_wait(&i2c_master_instance, &rx_buf) == STATUS_OK) {
udi_cdc_write_buf((const void *)(rx_buf.data),(iram_size_t)read_data[0]);
if (file_size + 4 == remaining_len) {
printf("File transfer successfully, file size:%ld, transefer size :%ld\r\n",file_size,remaining_len-4);
}
}
}
}
void main_suspend_action(void)
{
ui_powerdown();
}
void main_resume_action(void)
{
ui_wakeup();
}
void main_sof_action(void)
{
if (!main_b_cdc_enable)
return;
ui_process(udd_get_frame_number());
}
#ifdef USB_DEVICE_LPM_SUPPORT
void main_suspend_lpm_action(void)
{
ui_powerdown();
}
void main_remotewakeup_lpm_disable(void)
{
ui_wakeup_disable();
}
void main_remotewakeup_lpm_enable(void)
{
ui_wakeup_enable();
}
#endif
bool main_cdc_enable(uint8_t port)
{
main_b_cdc_enable = true;
configure_i2c_master();
return true;
}
void main_cdc_disable(uint8_t port)
{
main_b_cdc_enable = false;
b_com_port_opened = false;
i2c_master_disable(&i2c_master_instance);
}
uint16_t rf430_i2c_read_register(uint16_t reg_addr){
uint16_t timeout = 0;
static uint8_t read_buffer[DATA_LENGTH];
uint8_t tx_addr[DATA_LENGTH] = {0,0};
uint8_t rx_data[DATA_LENGTH] = {0,0};
tx_addr[0] = reg_addr >> 8; // MSB of address
tx_addr[1] = reg_addr & 0xFF;
//usart_write_buffer_wait(&usart_instance, "Starting to write packet\n\r", sizeof("Starting to write packet\n\r"));
struct i2c_master_packet packet = {
.address = RF430_I2C_SLAVE_ADDRESS,
.data_length = DATA_LENGTH,
.data = tx_addr,
.ten_bit_address = false,
.high_speed = false,
.hs_master_code = 0x0,
};
while (i2c_master_write_packet_wait(&i2c_master_instance, &packet) != STATUS_OK) {
/* Increment timeout counter and check if timed out. */
if (timeout++ == TIMEOUT) {
//usart_write_buffer_wait(&usart_instance, "WRITE TIMEOUT\n\r", sizeof("TIMEOUT\n\r"));
break;
}
}
//delay_ms(500);
packet.data = read_buffer;
while (i2c_master_read_packet_wait(&i2c_master_instance, &packet) != STATUS_OK) {
/* Increment timeout counter and check if timed out. */
if (timeout++ == TIMEOUT) {
//usart_write_buffer_wait(&usart_instance, "READ TIMEOUT\n\r", sizeof("TIMEOUT\n\r"));
break;
}
}
rx_data[0] = packet.data[0];
rx_data[1] = packet.data[1];
return (rx_data[1] << 8 | rx_data[0]);
}
void rf430_i2c_write_register(uint16_t reg_addr, uint16_t val){
uint16_t timeout = 0;
uint8_t tx_addr_data[3] = {0};
tx_addr_data[0] = reg_addr >> 8;
tx_addr_data[1] = reg_addr & 0xFF;
tx_addr_data[3] = val >> 8;
tx_addr_data[2] = val & 0xFF;
struct i2c_master_packet packet = {
.address = RF430_I2C_SLAVE_ADDRESS,
.data_length = 4,
.data = tx_addr_data,
.ten_bit_address = false,
.high_speed = false,
.hs_master_code = 0x0,
};
while (i2c_master_write_packet_wait(&i2c_master_instance, &packet) != STATUS_OK) {
/* Increment timeout counter and check if timed out. */
if (timeout++ == TIMEOUT) {
//usart_write_buffer_wait(&usart_instance, "WRITE TIMEOUT\n\r", sizeof("TIMEOUT\n\r"));
break;
}
}
//usart_write_buffer_wait(&usart_instance, "WRITE SUCCESS\n\r", sizeof("WRITE SUCCESS\n\r"));
}
void rf430_i2c_write_continous(uint16_t reg_addr, uint8_t* write_data, const uint16_t data_length){
uint16_t timeout = 0;
uint8_t tx_addr_data[2 + data_length];
tx_addr_data[0] = reg_addr >> 8; // MSB of address
tx_addr_data[1] = reg_addr & 0xFF;
for(int i = 2; i<data_length+2; i++){
tx_addr_data[i] = write_data [i-2];
};
struct i2c_master_packet packet = {
.address = RF430_I2C_SLAVE_ADDRESS,
.data_length = DATA_LENGTH+data_length,
.data = tx_addr_data,
.ten_bit_address = false,
.high_speed = false,
.hs_master_code = 0x0,
};
while (i2c_master_write_packet_wait_no_stop(&i2c_master_instance, &packet) != STATUS_OK) {
/* Increment timeout counter and check if timed out. */
if (timeout++ == TIMEOUT) {
//usart_write_buffer_wait(&usart_instance, "WRITE TIMEOUT\n\r", sizeof("TIMEOUT\n\r"));
break;
}
}
i2c_master_send_stop(&i2c_master_instance);
//usart_write_buffer_wait(&usart_instance, "CONTINOUS DATA WRITE SUCCESS\n\r", sizeof("DATA WRITE SUCCESS\n\r"));
}
void rf430_i2c_config(void){
uint16_t version = 0;
//usart_write_buffer_wait(&usart_instance, "Starting config\n\r", sizeof("Starting config\n\r"));
while(!(rf430_i2c_read_register(STATUS_REG) & READY));
//usart_write_buffer_wait(&usart_instance, "STATUS: READY\n\r", sizeof("STATUS: READY\n\r"));
version = rf430_i2c_read_register(VERSION_REG);
char version_buffer[50] = {0};
sprintf(version_buffer, "Firmware version :0x%x \n\r", version);
//usart_write_buffer_wait(&usart_instance, version_buffer, sizeof(version_buffer));
if (version == 0x0101 || version == 0x0201)
{ // the issue exists in these two versions
rf430_i2c_write_register(TEST_MODE_REG, TEST_MODE_KEY);
rf430_i2c_write_register(CONTROL_REG, 0x0080);
if (version == 0x0101)
{ // Ver C
rf430_i2c_write_register(0x2a98, 0x0650);
//usart_write_buffer_wait(&usart_instance, "Version C Registred\n\r", sizeof("Version C Registred\n\r"));
}
else
{ // Ver D
rf430_i2c_write_register(0x2a6e, 0x0650);
}
rf430_i2c_write_register(0x2814, 0);
rf430_i2c_write_register(TEST_MODE_REG, 0);
}
uint8_t NDEF_Application_Data[] = COSY_DEFAULT_DATA;
rf430_i2c_write_continous(0, NDEF_Application_Data, sizeof(NDEF_Application_Data));
//Enable interrupts for End of Read and End of Write
rf430_i2c_write_register(INT_ENABLE_REG, EOW_INT_ENABLE + EOR_INT_ENABLE);
//Configure INTO pin for active low and enable RF
rf430_i2c_write_register(CONTROL_REG, (INT_ENABLE + INTO_DRIVE + RF_ENABLE) );
}
/**
* \internal
* \brief Test for I2C master transfer.
*
* First test transfer function with stop.
* write to slave, read from slave and then compare the data.
* the slave send out the data it received,
* so master write and read data should be the same.
*
* Then test transfer function without stop.
* write to slave, then use i2c_master_send_stop to complete writing,
* read from slave, compare the data.
* finally, use function with stop to complete the transfer.
*
* \param test Current test case.
*/
static void run_i2c_master_transfer_test(const struct test_case *test)
{
uint32_t timeout_cycles = 1000;
uint32_t i;
bool status = true;
uint8_t read_buffer[DATA_LENGTH] = {0};
struct i2c_master_packet packet = {
.address = SLAVE_ADDRESS,
.data_length = DATA_LENGTH,
.data = write_buffer,
.ten_bit_address = false,
.high_speed = false,
.hs_master_code = 0x0,
};
/* with stop function: master transfer test */
/* wait the master write to complete */
do {
timeout_cycles--;
if (i2c_master_write_packet_wait(&i2c_master_instance, &packet) ==
STATUS_OK) {
break;
}
} while (timeout_cycles > 0);
test_assert_true(test, timeout_cycles > 0,
"i2c master write failed");
/* wait the master read to complete */
packet.data = read_buffer;
timeout_cycles = 1000;
do {
timeout_cycles--;
if (i2c_master_read_packet_wait(&i2c_master_instance, &packet) ==
STATUS_OK) {
break;
}
} while (timeout_cycles > 0);
test_assert_true(test, timeout_cycles > 0,
"i2c master read failed");
/* Compare the sent and the received */
for (i = 0; i < DATA_LENGTH; i++) {
if (read_buffer[i] != write_buffer[i]) {
status = false;
break;
}
}
test_assert_true(test, status == true,
"i2c master transfer comparsion failed");
/* with stop function master transfer test end */
/* without stop function: master transfer test*/
/* wait the master write to finish */
packet.data = write_buffer;
timeout_cycles = 1000;
do {
timeout_cycles--;
if (i2c_master_write_packet_wait_no_stop(&i2c_master_instance, &packet) ==
STATUS_OK) {
break;
}
} while (timeout_cycles > 0);
test_assert_true(test, timeout_cycles > 0,
"i2c master write without stop failed");
/* use i2c_master_send_stop to complete master writing */
i2c_master_send_stop(&i2c_master_instance);
/* wait the master read to finish */
packet.data = read_buffer;
timeout_cycles = 1000;
do {
timeout_cycles--;
if (i2c_master_read_packet_wait_no_stop(&i2c_master_instance, &packet) ==
STATUS_OK) {
break;
}
} while (timeout_cycles > 0);
test_assert_true(test, timeout_cycles > 0,
"i2c master read without stop failed");
/* Compare the sent and the received */
for (i = 0; i < DATA_LENGTH; i++) {
if (read_buffer[i] != write_buffer[i]) {
status = false;
break;
}
}
test_assert_true(test, status == true,
"i2c master transfer without stop comparsion failed");
/* use i2c_master_write_packet_wait to complete the transfer */
packet.data = write_buffer;
do {
timeout_cycles--;
if (i2c_master_write_packet_wait(&i2c_master_instance, &packet) ==
STATUS_OK) {
break;
}
} while (timeout_cycles > 0);
test_assert_true(test, timeout_cycles > 0,
"i2c master write with repeated start failed");
/* without stop function: master transfer test end*/
}
/**
* \internal
* \brief Test full speed mode master transfer.
*
* test function with stop in full speed mode.
* \param test Current test case.
*/
static void run_i2c_full_speed_test(const struct test_case *test)
{
enum status_code status;
struct i2c_master_config config_i2c_master;
/* init i2c master in full speed mode*/
i2c_master_get_config_defaults(&config_i2c_master);
config_i2c_master.buffer_timeout = 10000;
config_i2c_master.baud_rate = I2C_MASTER_BAUD_RATE_400KHZ;
i2c_master_disable(&i2c_master_instance);
status = i2c_master_init(&i2c_master_instance, SERCOM2, &config_i2c_master);
/* Check for successful initialization */
test_assert_true(test, status == STATUS_OK,
"I2C master fast-mode initialization failed");
i2c_master_enable(&i2c_master_instance);
uint32_t timeout_cycles = 1000;
uint32_t i;
bool status1 = true;
struct i2c_master_packet packet = {
.address = SLAVE_ADDRESS,
.data_length = DATA_LENGTH,
.data = write_buffer,
.ten_bit_address = false,
.high_speed = false,
.hs_master_code = 0x0,
};
uint8_t read_buffer[DATA_LENGTH] = {0};
/* wait master write complete */
do {
timeout_cycles--;
if (i2c_master_write_packet_wait(&i2c_master_instance, &packet) ==
STATUS_OK) {
break;
}
} while (timeout_cycles > 0);
test_assert_true(test, timeout_cycles > 0,
"i2c master write failed");
/* wait master read complete */
packet.data = read_buffer;
timeout_cycles = 1000;
do {
timeout_cycles--;
if (i2c_master_read_packet_wait(&i2c_master_instance, &packet) ==
STATUS_OK) {
break;
}
} while (timeout_cycles > 0);
test_assert_true(test, timeout_cycles > 0,
"i2c master read failed");
/* Compare the sent and the received */
for (i = 0; i < DATA_LENGTH; i++) {
if (read_buffer[i] != write_buffer[i]) {
status1 = false;
break;
}
}
test_assert_true(test, status1 == true,
"i2c master transfer comparsion failed");
}
/**
* \brief Run I2C master unit tests
*
* Initializes the system and serial output, then sets up the
* I2C master unit test suite and runs it.
*/
int main(void)
{
system_init();
cdc_uart_init();
/* Define Test Cases */
DEFINE_TEST_CASE(i2c_init_test,
NULL,
run_i2c_init_test,
NULL,
"Testing I2C Initialization");
DEFINE_TEST_CASE(i2c_master_transfer_test,
NULL,
run_i2c_master_transfer_test,
NULL,
"Testing I2C master data transfer");
DEFINE_TEST_CASE(i2c_full_speed_test,
NULL,
run_i2c_full_speed_test,
NULL,
"Testing I2C change speed transfer");
/* Put test case addresses in an array */
DEFINE_TEST_ARRAY(i2c_tests) = {
&i2c_init_test,
&i2c_master_transfer_test,
&i2c_full_speed_test,
};
/* Define the test suite */
DEFINE_TEST_SUITE(i2c_test_suite, i2c_tests,
"SAM I2C driver test suite");
/* Run all tests in the suite*/
test_suite_run(&i2c_test_suite);
while (true) {
/* Intentionally left empty */
}
}
/**
* I2C Write.
*
* address is the full write address like 0xEE
*/
void i2c_master_write(uint8_t address, uint8_t* data, uint16_t data_length)
{
uint32_t timeout = 0;
struct i2c_master_packet packet = {
.address = address >> 1,
.data_length = data_length,
.data = data,
.ten_bit_address = false,
.high_speed = false,
.hs_master_code = 0x0,
};
while (i2c_master_write_packet_wait(&i2c_master_instance, &packet) !=
STATUS_OK) {
/* Increment timeout counter and check if timed out. */
if (timeout++ > 1000) {
break;
}
}
}
/**
* I2C Read.
*
* address is the full write address like 0xEE
*/
void i2c_master_read(uint8_t address, uint8_t* data, uint16_t data_length)
{
uint32_t timeout = 0;
struct i2c_master_packet packet = {
.address = address >> 1,
.data_length = data_length,
.data = data,
.ten_bit_address = false,
.high_speed = false,
.hs_master_code = 0x0,
};
while (i2c_master_read_packet_wait(&i2c_master_instance, &packet) !=
STATUS_OK) {
/* Increment timeout counter and check if timed out. */
if (timeout++ > 1000) {
break;
}
}
}
/**
* I2C bus master.
*/
void i2c_init(SercomI2cm*const sercom, uint32_t pad0_pinmux, uint32_t pad1_pinmux)
{
struct i2c_master_config config_i2c_master;
i2c_master_get_config_defaults(&config_i2c_master);
/* Config */
config_i2c_master.buffer_timeout = 10000;
config_i2c_master.baud_rate = 100; /* 100 kBaud */
/* Pinmux */
config_i2c_master.pinmux_pad0 = pad0_pinmux;
config_i2c_master.pinmux_pad1 = pad1_pinmux;
/* Initialize and enable device with config. */
i2c_master_init(&i2c_master_instance, (Sercom*)sercom, &config_i2c_master);
i2c_master_enable(&i2c_master_instance);
}