static void
i830CullFaceFrontFace(struct gl_context * ctx, GLenum unused)
{
struct i830_context *i830 = i830_context(ctx);
GLuint mode;
DBG("%s\n", __FUNCTION__);
if (!ctx->Polygon.CullFlag) {
mode = CULLMODE_NONE;
}
else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
mode = CULLMODE_CW;
if (ctx->Polygon.CullFaceMode == GL_FRONT)
mode ^= (CULLMODE_CW ^ CULLMODE_CCW);
if (ctx->Polygon.FrontFace != GL_CCW)
mode ^= (CULLMODE_CW ^ CULLMODE_CCW);
}
else {
mode = CULLMODE_BOTH;
}
I830_STATECHANGE(i830, I830_UPLOAD_CTX);
i830->state.Ctx[I830_CTXREG_STATE3] &= ~CULLMODE_MASK;
i830->state.Ctx[I830_CTXREG_STATE3] |= ENABLE_CULL_MODE | mode;
}
/* In Mesa 3.5 we can reliably do native flatshading.
*/
static void
i830ShadeModel(struct gl_context * ctx, GLenum mode)
{
struct i830_context *i830 = i830_context(ctx);
I830_STATECHANGE(i830, I830_UPLOAD_CTX);
#define SHADE_MODE_MASK ((1<<10)|(1<<8)|(1<<6)|(1<<4))
i830->state.Ctx[I830_CTXREG_STATE3] &= ~SHADE_MODE_MASK;
if (mode == GL_FLAT) {
i830->state.Ctx[I830_CTXREG_STATE3] |=
(ALPHA_SHADE_MODE(SHADE_MODE_FLAT) | FOG_SHADE_MODE(SHADE_MODE_FLAT)
| SPEC_SHADE_MODE(SHADE_MODE_FLAT) |
COLOR_SHADE_MODE(SHADE_MODE_FLAT));
}
else {
i830->state.Ctx[I830_CTXREG_STATE3] |=
(ALPHA_SHADE_MODE(SHADE_MODE_LINEAR) |
FOG_SHADE_MODE(SHADE_MODE_LINEAR) |
SPEC_SHADE_MODE(SHADE_MODE_LINEAR) |
COLOR_SHADE_MODE(SHADE_MODE_LINEAR));
}
}
/**
* Makes sure that the proper enables are set for LogicOp, Independant Alpha
* Blend, and Blending. It needs to be called from numerous places where we
* could change the LogicOp or Independant Alpha Blend without subsequent
* calls to glEnable.
*
* \todo
* This function is substantially different from the old i830-specific driver.
* I'm not sure which is correct.
*/
static void
i830EvalLogicOpBlendState(struct gl_context * ctx)
{
struct i830_context *i830 = i830_context(ctx);
I830_STATECHANGE(i830, I830_UPLOAD_CTX);
if (_mesa_rgba_logicop_enabled(ctx)) {
i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
ENABLE_LOGIC_OP_MASK);
i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (DISABLE_COLOR_BLEND |
ENABLE_LOGIC_OP);
}
else if (ctx->Color.BlendEnabled) {
i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
ENABLE_LOGIC_OP_MASK);
i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (ENABLE_COLOR_BLEND |
DISABLE_LOGIC_OP);
}
else {
i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
ENABLE_LOGIC_OP_MASK);
i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (DISABLE_COLOR_BLEND |
DISABLE_LOGIC_OP);
}
}
static void
leave_meta_state(struct intel_context *intel)
{
struct i830_context *i830 = i830_context(&intel->ctx);
intel_region_release(&i830->meta.draw_region);
intel_region_release(&i830->meta.depth_region);
/* intel_region_release(intel, &i830->meta.tex_region[0]); */
SET_STATE(i830, state);
}
/* =============================================================
* Polygon stipple
*
* The i830 supports a 4x4 stipple natively, GL wants 32x32.
* Fortunately stipple is usually a repeating pattern.
*/
static void
i830PolygonStipple(struct gl_context * ctx, const GLubyte * mask)
{
struct i830_context *i830 = i830_context(ctx);
const GLubyte *m;
GLubyte p[4];
int i, j, k;
int active = (ctx->Polygon.StippleFlag &&
i830->intel.reduced_primitive == GL_TRIANGLES);
GLuint newMask;
if (active) {
I830_STATECHANGE(i830, I830_UPLOAD_STIPPLE);
i830->state.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE;
}
/* Use the already unpacked stipple data from the context rather than the
* uninterpreted mask passed in.
*/
mask = (const GLubyte *)ctx->PolygonStipple;
m = mask;
p[0] = mask[12] & 0xf;
p[0] |= p[0] << 4;
p[1] = mask[8] & 0xf;
p[1] |= p[1] << 4;
p[2] = mask[4] & 0xf;
p[2] |= p[2] << 4;
p[3] = mask[0] & 0xf;
p[3] |= p[3] << 4;
for (k = 0; k < 8; k++)
for (j = 3; j >= 0; j--)
for (i = 0; i < 4; i++, m++)
if (*m != p[j]) {
i830->intel.hw_stipple = 0;
return;
}
newMask = (((p[0] & 0xf) << 0) |
((p[1] & 0xf) << 4) |
((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
if (newMask == 0xffff || newMask == 0x0) {
/* this is needed to make conform pass */
i830->intel.hw_stipple = 0;
return;
}
i830->state.Stipple[I830_STPREG_ST1] &= ~0xffff;
i830->state.Stipple[I830_STPREG_ST1] |= newMask;
i830->intel.hw_stipple = 1;
if (active)
i830->state.Stipple[I830_STPREG_ST1] |= ST1_ENABLE;
}
/* Select between front and back draw buffers.
*/
static void
meta_draw_region(struct intel_context *intel,
struct intel_region *color_region,
struct intel_region *depth_region)
{
struct i830_context *i830 = i830_context(&intel->ctx);
i830_state_draw_region(intel, &i830->meta, color_region, depth_region);
}
static void
i830LogicOp(struct gl_context * ctx, GLenum opcode)
{
struct i830_context *i830 = i830_context(ctx);
int tmp = intel_translate_logic_op(opcode);
DBG("%s\n", __FUNCTION__);
I830_STATECHANGE(i830, I830_UPLOAD_CTX);
i830->state.Ctx[I830_CTXREG_STATE4] &= ~LOGICOP_MASK;
i830->state.Ctx[I830_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
}
void
i830UpdateTextureState(struct intel_context *intel)
{
struct i830_context *i830 = i830_context(&intel->ctx);
GLboolean ok = GL_TRUE;
GLuint i;
for (i = 0; i < I830_TEX_UNITS && ok; i++) {
switch (intel->ctx.Texture.Unit[i]._ReallyEnabled) {
case TEXTURE_1D_BIT:
case TEXTURE_2D_BIT:
case TEXTURE_CUBE_BIT:
ok = i830_update_tex_unit(intel, i, TEXCOORDS_ARE_NORMAL);
break;
case TEXTURE_RECT_BIT:
ok = i830_update_tex_unit(intel, i, TEXCOORDS_ARE_IN_TEXELUNITS);
break;
case 0:{
struct i830_context *i830 = i830_context(&intel->ctx);
if (i830->state.active & I830_UPLOAD_TEX(i))
I830_ACTIVESTATE(i830, I830_UPLOAD_TEX(i), GL_FALSE);
if (i830->state.tex_buffer[i] != NULL) {
dri_bo_unreference(i830->state.tex_buffer[i]);
i830->state.tex_buffer[i] = NULL;
}
break;
}
case TEXTURE_3D_BIT:
default:
ok = GL_FALSE;
break;
}
}
FALLBACK(intel, I830_FALLBACK_TEXTURE, !ok);
if (ok)
i830EmitTextureBlend(i830);
}
static void
i830DepthFunc(struct gl_context * ctx, GLenum func)
{
struct i830_context *i830 = i830_context(ctx);
int test = intel_translate_compare_func(func);
DBG("%s\n", __FUNCTION__);
I830_STATECHANGE(i830, I830_UPLOAD_CTX);
i830->state.Ctx[I830_CTXREG_STATE3] &= ~DEPTH_TEST_FUNC_MASK;
i830->state.Ctx[I830_CTXREG_STATE3] |= (ENABLE_DEPTH_TEST_FUNC |
DEPTH_TEST_FUNC(test));
}
static void
update_specular(GLcontext * ctx)
{
struct i830_context *i830 = i830_context(ctx);
I830_STATECHANGE(i830, I830_UPLOAD_CTX);
i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_SPEC_ADD_MASK;
if (NEED_SECONDARY_COLOR(ctx))
i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_SPEC_ADD;
else
i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_SPEC_ADD;
}
static void
update_specular(struct gl_context * ctx)
{
struct i830_context *i830 = i830_context(ctx);
I830_STATECHANGE(i830, I830_UPLOAD_CTX);
i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_SPEC_ADD_MASK;
if (_mesa_need_secondary_color(ctx))
i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_SPEC_ADD;
else
i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_SPEC_ADD;
}
/* Operations where the 3D engine is decoupled temporarily from the
* current GL state and used for other purposes than simply rendering
* incoming triangles.
*/
static void
install_meta_state(struct intel_context *intel)
{
struct i830_context *i830 = i830_context(&intel->ctx);
memcpy(&i830->meta, &i830->initial, sizeof(i830->meta));
i830->meta.active = ACTIVE;
i830->meta.emitted = 0;
SET_STATE(i830, meta);
set_vertex_format(intel);
set_no_texture(intel);
}
static void
set_no_stencil_write(struct intel_context *intel)
{
struct i830_context *i830 = i830_context(&intel->ctx);
/* ctx->Driver.Enable( ctx, GL_STENCIL_TEST, GL_FALSE )
*/
i830->meta.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_STENCIL_TEST;
i830->meta.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_STENCIL_WRITE;
i830->meta.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_STENCIL_TEST;
i830->meta.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_STENCIL_WRITE;
i830->meta.emitted &= ~I830_UPLOAD_CTX;
}
static void
set_vertex_format(struct intel_context *intel)
{
struct i830_context *i830 = i830_context(&intel->ctx);
i830->meta.Ctx[I830_CTXREG_VF] = (_3DSTATE_VFT0_CMD |
VFT0_TEX_COUNT(1) |
VFT0_DIFFUSE | VFT0_XYZ);
i830->meta.Ctx[I830_CTXREG_VF2] = (_3DSTATE_VFT1_CMD |
VFT1_TEX0_FMT(TEXCOORDFMT_2D) |
VFT1_TEX1_FMT(TEXCOORDFMT_2D) |
VFT1_TEX2_FMT(TEXCOORDFMT_2D) |
VFT1_TEX3_FMT(TEXCOORDFMT_2D));
i830->meta.emitted &= ~I830_UPLOAD_CTX;
}
static void
i830StencilMaskSeparate(struct gl_context * ctx, GLenum face, GLuint mask)
{
struct i830_context *i830 = i830_context(ctx);
DBG("%s : mask 0x%x\n", __FUNCTION__, mask);
mask = mask & 0xff;
I830_STATECHANGE(i830, I830_UPLOAD_CTX);
i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK;
i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK |
STENCIL_WRITE_MASK(mask));
}
static void
set_no_depth_write(struct intel_context *intel)
{
struct i830_context *i830 = i830_context(&intel->ctx);
/* ctx->Driver.Enable( ctx, GL_DEPTH_TEST, GL_FALSE )
*/
i830->meta.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_DEPTH_TEST_MASK;
i830->meta.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DIS_DEPTH_WRITE_MASK;
i830->meta.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_DEPTH_TEST;
i830->meta.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_DEPTH_WRITE;
i830->meta.emitted &= ~I830_UPLOAD_CTX;
}
static void
i830PointSize(struct gl_context * ctx, GLfloat size)
{
struct i830_context *i830 = i830_context(ctx);
GLint point_size = (int) size;
DBG("%s\n", __FUNCTION__);
point_size = CLAMP(point_size, 1, 256);
I830_STATECHANGE(i830, I830_UPLOAD_CTX);
i830->state.Ctx[I830_CTXREG_STATE5] &= ~FIXED_POINT_WIDTH_MASK;
i830->state.Ctx[I830_CTXREG_STATE5] |= (ENABLE_FIXED_POINT_WIDTH |
FIXED_POINT_WIDTH(point_size));
}
static void
i830DepthMask(struct gl_context * ctx, GLboolean flag)
{
struct i830_context *i830 = i830_context(ctx);
DBG("%s flag (%d)\n", __FUNCTION__, flag);
I830_STATECHANGE(i830, I830_UPLOAD_CTX);
i830->state.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DIS_DEPTH_WRITE_MASK;
if (flag && ctx->Depth.Test)
i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_DEPTH_WRITE;
else
i830->state.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_DEPTH_WRITE;
}
/* =============================================================
* Fog
*/
static void
i830Fogfv(struct gl_context * ctx, GLenum pname, const GLfloat * param)
{
struct i830_context *i830 = i830_context(ctx);
DBG("%s\n", __FUNCTION__);
if (pname == GL_FOG_COLOR) {
GLuint color = (((GLubyte) (ctx->Fog.Color[0] * 255.0F) << 16) |
((GLubyte) (ctx->Fog.Color[1] * 255.0F) << 8) |
((GLubyte) (ctx->Fog.Color[2] * 255.0F) << 0));
I830_STATECHANGE(i830, I830_UPLOAD_CTX);
i830->state.Ctx[I830_CTXREG_FOGCOLOR] =
(_3DSTATE_FOG_COLOR_CMD | color);
}
}
static void
i830BlendColor(struct gl_context * ctx, const GLfloat color[4])
{
struct i830_context *i830 = i830_context(ctx);
GLubyte r, g, b, a;
DBG("%s\n", __FUNCTION__);
UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
I830_STATECHANGE(i830, I830_UPLOAD_CTX);
i830->state.Ctx[I830_CTXREG_BLENDCOLOR1] =
(a << 24) | (r << 16) | (g << 8) | b;
}
/* Set stencil unit to replace always with the reference value.
*/
static void
set_stencil_replace(struct intel_context *intel,
GLuint s_mask, GLuint s_clear)
{
struct i830_context *i830 = i830_context(&intel->ctx);
/* ctx->Driver.Enable( ctx, GL_STENCIL_TEST, GL_TRUE )
*/
i830->meta.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_STENCIL_TEST;
i830->meta.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_STENCIL_WRITE;
/* ctx->Driver.StencilMask( ctx, s_mask )
*/
i830->meta.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK;
i830->meta.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK |
STENCIL_WRITE_MASK((s_mask &
0xff)));
/* ctx->Driver.StencilOp( ctx, GL_REPLACE, GL_REPLACE, GL_REPLACE )
*/
i830->meta.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_OPS_MASK);
i830->meta.Ctx[I830_CTXREG_STENCILTST] |=
(ENABLE_STENCIL_PARMS |
STENCIL_FAIL_OP(STENCILOP_REPLACE) |
STENCIL_PASS_DEPTH_FAIL_OP(STENCILOP_REPLACE) |
STENCIL_PASS_DEPTH_PASS_OP(STENCILOP_REPLACE));
/* ctx->Driver.StencilFunc( ctx, GL_ALWAYS, s_clear, ~0 )
*/
i830->meta.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK;
i830->meta.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
STENCIL_TEST_MASK(0xff));
i830->meta.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_REF_VALUE_MASK |
ENABLE_STENCIL_TEST_FUNC_MASK);
i830->meta.Ctx[I830_CTXREG_STENCILTST] |=
(ENABLE_STENCIL_REF_VALUE |
ENABLE_STENCIL_TEST_FUNC |
STENCIL_REF_VALUE((s_clear & 0xff)) |
STENCIL_TEST_FUNC(COMPAREFUNC_ALWAYS));
i830->meta.emitted &= ~I830_UPLOAD_CTX;
}
/* =============================================================
* Hardware clipping
*/
static void
i830Scissor(struct gl_context * ctx)
{
struct i830_context *i830 = i830_context(ctx);
int x1, y1, x2, y2;
if (!ctx->DrawBuffer)
return;
DBG("%s %d,%d %dx%d\n", __func__,
ctx->Scissor.ScissorArray[0].X, ctx->Scissor.ScissorArray[0].Y,
ctx->Scissor.ScissorArray[0].Width, ctx->Scissor.ScissorArray[0].Height);
if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
x1 = ctx->Scissor.ScissorArray[0].X;
y1 = ctx->DrawBuffer->Height - (ctx->Scissor.ScissorArray[0].Y
+ ctx->Scissor.ScissorArray[0].Height);
x2 = ctx->Scissor.ScissorArray[0].X
+ ctx->Scissor.ScissorArray[0].Width - 1;
y2 = y1 + ctx->Scissor.ScissorArray[0].Height - 1;
DBG("%s %d..%d,%d..%d (inverted)\n", __func__, x1, x2, y1, y2);
}
else {
/* FBO - not inverted
*/
x1 = ctx->Scissor.ScissorArray[0].X;
y1 = ctx->Scissor.ScissorArray[0].Y;
x2 = ctx->Scissor.ScissorArray[0].X
+ ctx->Scissor.ScissorArray[0].Width - 1;
y2 = ctx->Scissor.ScissorArray[0].Y
+ ctx->Scissor.ScissorArray[0].Height - 1;
DBG("%s %d..%d,%d..%d (not inverted)\n", __func__, x1, x2, y1, y2);
}
x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
DBG("%s %d..%d,%d..%d (clamped)\n", __func__, x1, x2, y1, y2);
I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS);
i830->state.Buffer[I830_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
i830->state.Buffer[I830_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
}
/* Installs a one-stage passthrough texture blend pipeline. Is there
* more that can be done to turn off texturing?
*/
static void
set_no_texture(struct intel_context *intel)
{
struct i830_context *i830 = i830_context(&intel->ctx);
static const struct gl_tex_env_combine_state comb = {
GL_NONE, GL_NONE,
{GL_TEXTURE, 0, 0,}, {GL_TEXTURE, 0, 0,},
{GL_SRC_COLOR, 0, 0}, {GL_SRC_ALPHA, 0, 0},
0, 0, 0, 0
};
i830->meta.TexBlendWordsUsed[0] =
i830SetTexEnvCombine(i830, &comb, 0, TEXBLENDARG_TEXEL0,
i830->meta.TexBlend[0], NULL);
i830->meta.TexBlend[0][0] |= TEXOP_LAST_STAGE;
i830->meta.emitted &= ~I830_UPLOAD_TEXBLEND(0);
}
static void
i830AlphaFunc(struct gl_context * ctx, GLenum func, GLfloat ref)
{
struct i830_context *i830 = i830_context(ctx);
int test = intel_translate_compare_func(func);
GLubyte refByte;
GLuint refInt;
UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
refInt = (GLuint) refByte;
I830_STATECHANGE(i830, I830_UPLOAD_CTX);
i830->state.Ctx[I830_CTXREG_STATE2] &= ~ALPHA_TEST_REF_MASK;
i830->state.Ctx[I830_CTXREG_STATE2] |= (ENABLE_ALPHA_TEST_FUNC |
ENABLE_ALPHA_REF_VALUE |
ALPHA_TEST_FUNC(test) |
ALPHA_REF_VALUE(refInt));
}
static void
set_color_mask(struct intel_context *intel, GLboolean state)
{
struct i830_context *i830 = i830_context(&intel->ctx);
const GLuint mask = ((1 << WRITEMASK_RED_SHIFT) |
(1 << WRITEMASK_GREEN_SHIFT) |
(1 << WRITEMASK_BLUE_SHIFT) |
(1 << WRITEMASK_ALPHA_SHIFT));
i830->meta.Ctx[I830_CTXREG_ENABLES_2] &= ~mask;
if (state) {
i830->meta.Ctx[I830_CTXREG_ENABLES_2] |=
(i830->state.Ctx[I830_CTXREG_ENABLES_2] & mask);
}
i830->meta.emitted &= ~I830_UPLOAD_CTX;
}
static void
i830DepthMask(struct gl_context * ctx, GLboolean flag)
{
struct i830_context *i830 = i830_context(ctx);
DBG("%s flag (%d)\n", __func__, flag);
if (!ctx->DrawBuffer || !ctx->DrawBuffer->Visual.depthBits)
flag = false;
I830_STATECHANGE(i830, I830_UPLOAD_CTX);
i830->state.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DIS_DEPTH_WRITE_MASK;
if (flag && ctx->Depth.Test)
i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_DEPTH_WRITE;
else
i830->state.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_DEPTH_WRITE;
}
static void
i830LineWidth(struct gl_context * ctx, GLfloat widthf)
{
struct i830_context *i830 = i830_context(ctx);
int width;
int state5;
DBG("%s\n", __FUNCTION__);
width = (int) (widthf * 2);
width = CLAMP(width, 1, 15);
state5 = i830->state.Ctx[I830_CTXREG_STATE5] & ~FIXED_LINE_WIDTH_MASK;
state5 |= (ENABLE_FIXED_LINE_WIDTH | FIXED_LINE_WIDTH(width));
if (state5 != i830->state.Ctx[I830_CTXREG_STATE5]) {
I830_STATECHANGE(i830, I830_UPLOAD_CTX);
i830->state.Ctx[I830_CTXREG_STATE5] = state5;
}
}
void
i830_update_provoking_vertex(struct gl_context * ctx)
{
struct i830_context *i830 = i830_context(ctx);
I830_STATECHANGE(i830, I830_UPLOAD_RASTER_RULES);
i830->state.RasterRules[I830_RASTER_RULES] &= ~(LINE_STRIP_PROVOKE_VRTX_MASK |
TRI_FAN_PROVOKE_VRTX_MASK |
TRI_STRIP_PROVOKE_VRTX_MASK);
/* _NEW_LIGHT */
if (ctx->Light.ProvokingVertex == GL_LAST_VERTEX_CONVENTION) {
i830->state.RasterRules[I830_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(1) |
TRI_FAN_PROVOKE_VRTX(2) |
TRI_STRIP_PROVOKE_VRTX(2));
} else {
i830->state.RasterRules[I830_RASTER_RULES] |= (LINE_STRIP_PROVOKE_VRTX(0) |
TRI_FAN_PROVOKE_VRTX(1) |
TRI_STRIP_PROVOKE_VRTX(0));
}
}
static void
i830ColorMask(struct gl_context * ctx,
GLboolean r, GLboolean g, GLboolean b, GLboolean a)
{
struct i830_context *i830 = i830_context(ctx);
GLuint tmp = 0;
DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b, a);
tmp = ((i830->state.Ctx[I830_CTXREG_ENABLES_2] & ~WRITEMASK_MASK) |
ENABLE_COLOR_MASK |
ENABLE_COLOR_WRITE |
((!r) << WRITEMASK_RED_SHIFT) |
((!g) << WRITEMASK_GREEN_SHIFT) |
((!b) << WRITEMASK_BLUE_SHIFT) | ((!a) << WRITEMASK_ALPHA_SHIFT));
if (tmp != i830->state.Ctx[I830_CTXREG_ENABLES_2]) {
I830_STATECHANGE(i830, I830_UPLOAD_CTX);
i830->state.Ctx[I830_CTXREG_ENABLES_2] = tmp;
}
}
/* Set depth unit to replace.
*/
static void
set_depth_replace(struct intel_context *intel)
{
struct i830_context *i830 = i830_context(&intel->ctx);
/* ctx->Driver.Enable( ctx, GL_DEPTH_TEST, GL_FALSE )
* ctx->Driver.DepthMask( ctx, GL_TRUE )
*/
i830->meta.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_DEPTH_TEST_MASK;
i830->meta.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DIS_DEPTH_WRITE_MASK;
i830->meta.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_DEPTH_TEST;
i830->meta.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_DEPTH_WRITE;
/* ctx->Driver.DepthFunc( ctx, GL_ALWAYS )
*/
i830->meta.Ctx[I830_CTXREG_STATE3] &= ~DEPTH_TEST_FUNC_MASK;
i830->meta.Ctx[I830_CTXREG_STATE3] |= (ENABLE_DEPTH_TEST_FUNC |
DEPTH_TEST_FUNC
(COMPAREFUNC_ALWAYS));
i830->meta.emitted &= ~I830_UPLOAD_CTX;
}
