static void do_single_test(data_t *data, int x, int y)
{
igt_display_t *display = &data->display;
igt_pipe_crc_t *pipe_crc = data->pipe_crc;
igt_crc_t crc, ref_crc;
igt_plane_t *cursor;
cairo_t *cr = igt_get_cairo_ctx(data->drm_fd, &data->primary_fb);
igt_print_activity();
/* Hardware test */
igt_paint_test_pattern(cr, data->screenw, data->screenh);
cursor_enable(data);
cursor = igt_output_get_plane(data->output, IGT_PLANE_CURSOR);
igt_plane_set_position(cursor, x, y);
igt_display_commit(display);
igt_wait_for_vblank(data->drm_fd, data->pipe);
igt_pipe_crc_collect_crc(pipe_crc, &crc);
if (data->flags & (TEST_DPMS | TEST_SUSPEND)) {
igt_crc_t crc_after;
if (data->flags & TEST_DPMS) {
igt_debug("dpms off/on cycle\n");
kmstest_set_connector_dpms(data->drm_fd,
data->output->config.connector,
DRM_MODE_DPMS_OFF);
kmstest_set_connector_dpms(data->drm_fd,
data->output->config.connector,
DRM_MODE_DPMS_ON);
}
if (data->flags & TEST_SUSPEND)
igt_system_suspend_autoresume();
igt_pipe_crc_collect_crc(pipe_crc, &crc_after);
igt_assert_crc_equal(&crc, &crc_after);
}
cursor_disable(data);
igt_display_commit(display);
/* Now render the same in software and collect crc */
draw_cursor(cr, x, y, data->curw, data->curh);
igt_display_commit(display);
igt_wait_for_vblank(data->drm_fd, data->pipe);
igt_pipe_crc_collect_crc(pipe_crc, &ref_crc);
/* Clear screen afterwards */
igt_assert_crc_equal(&crc, &ref_crc);
igt_paint_color(cr, 0, 0, data->screenw, data->screenh,
0.0, 0.0, 0.0);
}
static void test(data_t *data)
{
igt_output_t *output = data->output;
struct igt_fb *fb = &data->fb[1];
drmModeModeInfo *mode;
cairo_t *cr;
uint32_t caching;
void *buf;
igt_crc_t crc;
mode = igt_output_get_mode(output);
/* create a non-white fb where we can pwrite later */
igt_create_fb(data->drm_fd, mode->hdisplay, mode->vdisplay,
DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, fb);
cr = igt_get_cairo_ctx(data->drm_fd, fb);
igt_paint_test_pattern(cr, fb->width, fb->height);
cairo_destroy(cr);
/* flip to it to make it UC/WC and fully flushed */
drmModeSetPlane(data->drm_fd,
data->primary->drm_plane->plane_id,
output->config.crtc->crtc_id,
fb->fb_id, 0,
0, 0, fb->width, fb->height,
0, 0, fb->width << 16, fb->height << 16);
/* flip back the original white buffer */
drmModeSetPlane(data->drm_fd,
data->primary->drm_plane->plane_id,
output->config.crtc->crtc_id,
data->fb[0].fb_id, 0,
0, 0, fb->width, fb->height,
0, 0, fb->width << 16, fb->height << 16);
/* make sure caching mode has become UC/WT */
caching = gem_get_caching(data->drm_fd, fb->gem_handle);
igt_assert(caching == I915_CACHING_NONE || caching == I915_CACHING_DISPLAY);
/* use pwrite to make the other fb all white too */
buf = malloc(fb->size);
igt_assert(buf != NULL);
memset(buf, 0xff, fb->size);
gem_write(data->drm_fd, fb->gem_handle, 0, buf, fb->size);
free(buf);
/* and flip to it */
drmModeSetPlane(data->drm_fd,
data->primary->drm_plane->plane_id,
output->config.crtc->crtc_id,
fb->fb_id, 0,
0, 0, fb->width, fb->height,
0, 0, fb->width << 16, fb->height << 16);
/* check that the crc is as expected, which requires that caches got flushed */
igt_pipe_crc_collect_crc(data->pipe_crc, &crc);
igt_assert_crc_equal(&crc, &data->ref_crc);
}
static bool prepare_crtc(data_t *data, igt_output_t *output,
int cursor_w, int cursor_h)
{
drmModeModeInfo *mode;
igt_display_t *display = &data->display;
igt_plane_t *primary;
/* select the pipe we want to use */
igt_output_set_pipe(output, data->pipe);
cursor_disable(data);
igt_display_commit(display);
if (!output->valid) {
igt_output_set_pipe(output, PIPE_ANY);
igt_display_commit(display);
return false;
}
/* create and set the primary plane fb */
mode = igt_output_get_mode(output);
igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay,
DRM_FORMAT_XRGB8888,
LOCAL_DRM_FORMAT_MOD_NONE,
0.0, 0.0, 0.0,
&data->primary_fb);
primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY);
igt_plane_set_fb(primary, &data->primary_fb);
igt_display_commit(display);
/* create the pipe_crc object for this pipe */
if (data->pipe_crc)
igt_pipe_crc_free(data->pipe_crc);
data->pipe_crc = igt_pipe_crc_new(data->pipe,
INTEL_PIPE_CRC_SOURCE_AUTO);
/* x/y position where the cursor is still fully visible */
data->left = 0;
data->right = mode->hdisplay - cursor_w;
data->top = 0;
data->bottom = mode->vdisplay - cursor_h;
data->screenw = mode->hdisplay;
data->screenh = mode->vdisplay;
data->curw = cursor_w;
data->curh = cursor_h;
data->refresh = mode->vrefresh;
/* make sure cursor is disabled */
cursor_disable(data);
igt_wait_for_vblank(data->drm_fd, data->pipe);
/* get reference crc w/o cursor */
igt_pipe_crc_collect_crc(data->pipe_crc, &data->ref_crc);
return true;
}
static bool prepare_crtc(data_t *data)
{
igt_display_t *display = &data->display;
igt_output_t *output = data->output;
drmModeModeInfo *mode;
/* select the pipe we want to use */
igt_output_set_pipe(output, data->pipe);
igt_display_commit(display);
if (!output->valid) {
igt_output_set_pipe(output, PIPE_ANY);
igt_display_commit(display);
return false;
}
mode = igt_output_get_mode(output);
/* create a white reference fb and flip to it */
igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay,
DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE,
1.0, 1.0, 1.0, &data->fb[0]);
data->primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY);
igt_plane_set_fb(data->primary, &data->fb[0]);
igt_display_commit(display);
if (data->pipe_crc)
igt_pipe_crc_free(data->pipe_crc);
data->pipe_crc = igt_pipe_crc_new(data->pipe,
INTEL_PIPE_CRC_SOURCE_AUTO);
/* get reference crc for the white fb */
igt_pipe_crc_collect_crc(data->pipe_crc, &data->ref_crc);
return true;
}
static void prepare_crtc(data_t *data, igt_output_t *output, enum pipe pipe,
igt_plane_t *plane)
{
drmModeModeInfo *mode;
int fb_id, fb_modeset_id;
unsigned int w, h;
uint64_t tiling = data->override_tiling ?
data->override_tiling : LOCAL_DRM_FORMAT_MOD_NONE;
uint32_t pixel_format = data->override_fmt ?
data->override_fmt : DRM_FORMAT_XRGB8888;
igt_output_set_pipe(output, pipe);
/* create the pipe_crc object for this pipe */
igt_pipe_crc_free(data->pipe_crc);
data->pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
mode = igt_output_get_mode(output);
w = mode->hdisplay;
h = mode->vdisplay;
fb_modeset_id = igt_create_fb(data->gfx_fd,
w, h,
pixel_format,
tiling,
&data->fb_modeset);
igt_assert(fb_modeset_id);
/*
* For 90/270, we will use create smaller fb so that the rotated
* frame can fit in
*/
if (data->rotation == IGT_ROTATION_90 ||
data->rotation == IGT_ROTATION_270) {
tiling = data->override_tiling ?
data->override_tiling : LOCAL_I915_FORMAT_MOD_Y_TILED;
w = h = mode->vdisplay;
} else if (plane->is_cursor) {
pixel_format = data->override_fmt ?
data->override_fmt : DRM_FORMAT_ARGB8888;
w = h = 128;
}
data->w = w;
data->h = h;
fb_id = igt_create_fb(data->gfx_fd,
w, h,
pixel_format,
tiling,
&data->fb);
igt_assert(fb_id);
if (data->flip_stress) {
fb_id = igt_create_fb(data->gfx_fd,
w, h,
pixel_format,
tiling,
&data->fb_flip);
igt_assert(fb_id);
paint_squares(data, mode, IGT_ROTATION_0, &data->fb_flip, 0.92);
}
/* Step 1: create a reference CRC for a software-rotated fb */
paint_squares(data, mode, data->rotation, &data->fb, 1.0);
commit_crtc(data, output, plane);
igt_pipe_crc_collect_crc(data->pipe_crc, &data->ref_crc);
/*
* Step 2: prepare the plane with an non-rotated fb let the hw
* rotate it.
*/
paint_squares(data, mode, IGT_ROTATION_0, &data->fb, 1.0);
igt_plane_set_fb(plane, &data->fb);
}
static void test(data_t *data)
{
igt_display_t *display = &data->display;
igt_output_t *output = data->output;
struct igt_fb *fb = &data->fb[1];
drmModeModeInfo *mode;
cairo_t *cr;
char *ptr;
uint32_t caching;
void *buf;
igt_crc_t crc;
mode = igt_output_get_mode(output);
/* create a non-white fb where we can write later */
igt_create_fb(data->drm_fd, mode->hdisplay, mode->vdisplay,
DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, fb);
ptr = dmabuf_mmap_framebuffer(data->drm_fd, fb);
cr = igt_get_cairo_ctx(data->drm_fd, fb);
igt_paint_test_pattern(cr, fb->width, fb->height);
cairo_destroy(cr);
/* flip to it to make it UC/WC and fully flushed */
igt_plane_set_fb(data->primary, fb);
igt_display_commit(display);
/* flip back the original white buffer */
igt_plane_set_fb(data->primary, &data->fb[0]);
igt_display_commit(display);
/* make sure caching mode has become UC/WT */
caching = gem_get_caching(data->drm_fd, fb->gem_handle);
igt_assert(caching == I915_CACHING_NONE || caching == I915_CACHING_DISPLAY);
/*
* firstly demonstrate the need for DMA_BUF_SYNC_START ("begin_cpu_access")
*/
if (ioctl_sync)
prime_sync_start(dma_buf_fd);
/* use dmabuf pointer to make the other fb all white too */
buf = malloc(fb->size);
igt_assert(buf != NULL);
memset(buf, 0xff, fb->size);
memcpy(ptr, buf, fb->size);
free(buf);
/* and flip to it */
igt_plane_set_fb(data->primary, fb);
igt_display_commit(display);
/* check that the crc is as expected, which requires that caches got flushed */
igt_pipe_crc_collect_crc(data->pipe_crc, &crc);
igt_assert_crc_equal(&crc, &data->ref_crc);
/*
* now demonstrates the need for DMA_BUF_SYNC_END ("end_cpu_access")
*/
/* start over, writing non-white to the fb again and flip to it to make it
* fully flushed */
cr = igt_get_cairo_ctx(data->drm_fd, fb);
igt_paint_test_pattern(cr, fb->width, fb->height);
cairo_destroy(cr);
igt_plane_set_fb(data->primary, fb);
igt_display_commit(display);
/* sync start, to move to CPU domain */
if (ioctl_sync)
prime_sync_start(dma_buf_fd);
/* use dmabuf pointer in the same fb to make it all white */
buf = malloc(fb->size);
igt_assert(buf != NULL);
memset(buf, 0xff, fb->size);
memcpy(ptr, buf, fb->size);
free(buf);
/* if we don't change to the GTT domain again, the whites won't get flushed
* and therefore we demonstrates the need for sync end here */
if (ioctl_sync)
prime_sync_end(dma_buf_fd);
/* check that the crc is as expected, which requires that caches got flushed */
igt_pipe_crc_collect_crc(data->pipe_crc, &crc);
igt_assert_crc_equal(&crc, &data->ref_crc);
}
