Beispiel #1
0
void
ilo_blit_resolve_slices_for_hiz(struct ilo_context *ilo,
                                struct pipe_resource *res, unsigned level,
                                unsigned first_slice, unsigned num_slices,
                                unsigned resolve_flags)
{
   struct ilo_texture *tex = ilo_texture(res);
   const unsigned any_reader =
      ILO_TEXTURE_RENDER_READ |
      ILO_TEXTURE_BLT_READ |
      ILO_TEXTURE_CPU_READ;
   const unsigned other_writers =
      ILO_TEXTURE_BLT_WRITE |
      ILO_TEXTURE_CPU_WRITE;
   unsigned i;

   assert(tex->base.target != PIPE_BUFFER &&
          ilo_image_can_enable_aux(&tex->image, level));

   if (resolve_flags & ILO_TEXTURE_RENDER_WRITE) {
      /*
       * When ILO_TEXTURE_RENDER_WRITE is set, there can be no reader.  We
       * need to perform a HiZ Buffer Resolve in case the resource was
       * previously written by another writer, unless this is a clear.
       *
       * When slices have different clear values, we perform a Depth Buffer
       * Resolve on all slices not sharing the clear value of the first slice.
       * After resolving, those slices do not use 3DSTATE_CLEAR_PARAMS and can
       * be made to have the same clear value as the first slice does.  This
       * way,
       *
       *  - 3DSTATE_CLEAR_PARAMS can be set to the clear value of any slice
       *  - we will not resolve unnecessarily next time this function is
       *    called
       *
       * Since slice clear value is the value the slice is cleared to when
       * ILO_TEXTURE_CLEAR is set, the bit needs to be unset.
       */
      assert(!(resolve_flags & (other_writers | any_reader)));

      if (!(resolve_flags & ILO_TEXTURE_CLEAR)) {
         const uint32_t first_clear_value = ilo_texture_get_slice(tex,
               level, first_slice)->clear_value;
         bool set_clear_value = false;

         for (i = 0; i < num_slices; i++) {
            const struct ilo_texture_slice *slice =
               ilo_texture_get_slice(tex, level, first_slice + i);

            if (slice->flags & other_writers) {
               ilo_blitter_rectlist_resolve_hiz(ilo->blitter,
                     res, level, first_slice + i);
            } else if (slice->clear_value != first_clear_value &&
                       (slice->flags & ILO_TEXTURE_RENDER_WRITE)) {
               ilo_blitter_rectlist_resolve_z(ilo->blitter,
                     res, level, first_slice + i);
               set_clear_value = true;
            }
         }

         if (set_clear_value) {
            /* ILO_TEXTURE_CLEAR will be cleared later */
            ilo_texture_set_slice_clear_value(tex, level,
                  first_slice, num_slices, first_clear_value);
         }
      }
   }
   else if ((resolve_flags & any_reader) ||
            ((resolve_flags & other_writers) &&
             !(resolve_flags & ILO_TEXTURE_CLEAR))) {
      /*
       * When there is at least a reader or writer, we need to perform a
       * Depth Buffer Resolve in case the resource was previously written
       * by ILO_TEXTURE_RENDER_WRITE.
       */
      for (i = 0; i < num_slices; i++) {
         const struct ilo_texture_slice *slice =
            ilo_texture_get_slice(tex, level, first_slice + i);

         if (slice->flags & ILO_TEXTURE_RENDER_WRITE) {
            ilo_blitter_rectlist_resolve_z(ilo->blitter,
                  &tex->base, level, first_slice + i);
         }
      }
   }
}
bool
ilo_blitter_rectlist_clear_zs(struct ilo_blitter *blitter,
                              struct pipe_surface *zs,
                              unsigned clear_flags,
                              double depth, unsigned stencil)
{
    struct ilo_texture *tex = ilo_texture(zs->texture);
    struct pipe_depth_stencil_alpha_state dsa_state;
    uint32_t uses, clear_value;

    if (!ilo_image_can_enable_aux(&tex->image, zs->u.tex.level))
        return false;

    if (!hiz_can_clear_zs(blitter, tex))
        return false;

    if (ilo_dev_gen(blitter->ilo->dev) >= ILO_GEN(8))
        clear_value = fui(depth);
    else
        clear_value = util_pack_z(tex->image.format, depth);

    ilo_blit_resolve_surface(blitter->ilo, zs,
                             ILO_TEXTURE_RENDER_WRITE | ILO_TEXTURE_CLEAR);
    ilo_texture_set_slice_clear_value(tex, zs->u.tex.level,
                                      zs->u.tex.first_layer,
                                      zs->u.tex.last_layer - zs->u.tex.first_layer + 1,
                                      clear_value);

    /*
     * From the Sandy Bridge PRM, volume 2 part 1, page 313-314:
     *
     *     "- Depth Test Enable must be disabled and Depth Buffer Write Enable
     *        must be enabled (if depth is being cleared).
     *
     *      - Stencil buffer clear can be performed at the same time by
     *        enabling Stencil Buffer Write Enable.  Stencil Test Enable must
     *        be enabled and Stencil Pass Depth Pass Op set to REPLACE, and the
     *        clear value that is placed in the stencil buffer is the Stencil
     *        Reference Value from COLOR_CALC_STATE.
     *
     *      - Note also that stencil buffer clear can be performed without
     *        depth buffer clear. For stencil only clear, Depth Test Enable and
     *        Depth Buffer Write Enable must be disabled.
     *
     *      - [DevSNB] errata: For stencil buffer only clear, the previous
     *        depth clear value must be delivered during the clear."
     */
    memset(&dsa_state, 0, sizeof(dsa_state));

    if (clear_flags & PIPE_CLEAR_DEPTH)
        dsa_state.depth.writemask = true;

    if (clear_flags & PIPE_CLEAR_STENCIL) {
        dsa_state.stencil[0].enabled = true;
        dsa_state.stencil[0].func = PIPE_FUNC_ALWAYS;
        dsa_state.stencil[0].fail_op = PIPE_STENCIL_OP_KEEP;
        dsa_state.stencil[0].zpass_op = PIPE_STENCIL_OP_REPLACE;
        dsa_state.stencil[0].zfail_op = PIPE_STENCIL_OP_KEEP;

        /*
         * From the Ivy Bridge PRM, volume 2 part 1, page 277:
         *
         *     "Additionally the following must be set to the correct values.
         *
         *      - DEPTH_STENCIL_STATE::Stencil Write Mask must be 0xFF
         *      - DEPTH_STENCIL_STATE::Stencil Test Mask must be 0xFF
         *      - DEPTH_STENCIL_STATE::Back Face Stencil Write Mask must be 0xFF
         *      - DEPTH_STENCIL_STATE::Back Face Stencil Test Mask must be 0xFF"
         */
        dsa_state.stencil[0].valuemask = 0xff;
        dsa_state.stencil[0].writemask = 0xff;
        dsa_state.stencil[1].valuemask = 0xff;
        dsa_state.stencil[1].writemask = 0xff;
    }

    ilo_blitter_set_invariants(blitter);
    ilo_blitter_set_op(blitter, ILO_BLITTER_RECTLIST_CLEAR_ZS);

    ilo_blitter_set_dsa(blitter, &dsa_state);
    ilo_blitter_set_clear_values(blitter, clear_value, (ubyte) stencil);
    ilo_blitter_set_fb_from_surface(blitter, zs);

    uses = ILO_BLITTER_USE_DSA;
    if (clear_flags & PIPE_CLEAR_DEPTH)
        uses |= ILO_BLITTER_USE_VIEWPORT | ILO_BLITTER_USE_FB_DEPTH;
    if (clear_flags & PIPE_CLEAR_STENCIL)
        uses |= ILO_BLITTER_USE_CC | ILO_BLITTER_USE_FB_STENCIL;
    ilo_blitter_set_uses(blitter, uses);

    hiz_emit_rectlist(blitter);

    return true;
}