Void main()
{
int i = 0;
// unlock the system config registers.
SYSCONFIG->KICKR[0] = KICK0R_UNLOCK;
SYSCONFIG->KICKR[1] = KICK1R_UNLOCK;
SYSCONFIG1->PUPD_SEL |= 0x10000000; // change pin group 28 to pullup for GP7[12/13] (LCD switches)
// Initially set McBSP1 pins as GPIO ins
CLRBIT(SYSCONFIG->PINMUX[1], 0xFFFFFFFF);
SETBIT(SYSCONFIG->PINMUX[1], 0x88888880); // This is enabling the McBSP1 pins
CLRBIT(SYSCONFIG->PINMUX[16], 0xFFFF0000);
SETBIT(SYSCONFIG->PINMUX[16], 0x88880000); // setup GP7.8 through GP7.13
CLRBIT(SYSCONFIG->PINMUX[17], 0x000000FF);
SETBIT(SYSCONFIG->PINMUX[17], 0x00000088); // setup GP7.8 through GP7.13
//Rick added for LCD DMA flagging test
GPIO_setDir(GPIO_BANK0, GPIO_PIN8, GPIO_OUTPUT);
GPIO_setOutput(GPIO_BANK0, GPIO_PIN8, OUTPUT_HIGH);
GPIO_setDir(GPIO_BANK0, GPIO_PIN0, GPIO_INPUT);
GPIO_setDir(GPIO_BANK0, GPIO_PIN1, GPIO_INPUT);
GPIO_setDir(GPIO_BANK0, GPIO_PIN2, GPIO_INPUT);
GPIO_setDir(GPIO_BANK0, GPIO_PIN3, GPIO_INPUT);
GPIO_setDir(GPIO_BANK0, GPIO_PIN4, GPIO_INPUT);
GPIO_setDir(GPIO_BANK0, GPIO_PIN5, GPIO_INPUT);
GPIO_setDir(GPIO_BANK0, GPIO_PIN6, GPIO_INPUT);
GPIO_setDir(GPIO_BANK7, GPIO_PIN8, GPIO_OUTPUT);
GPIO_setDir(GPIO_BANK7, GPIO_PIN9, GPIO_OUTPUT);
GPIO_setDir(GPIO_BANK7, GPIO_PIN10, GPIO_OUTPUT);
GPIO_setDir(GPIO_BANK7, GPIO_PIN11, GPIO_OUTPUT);
GPIO_setDir(GPIO_BANK7, GPIO_PIN12, GPIO_INPUT);
GPIO_setDir(GPIO_BANK7, GPIO_PIN13, GPIO_INPUT);
GPIO_setOutput(GPIO_BANK7, GPIO_PIN8, OUTPUT_HIGH);
GPIO_setOutput(GPIO_BANK7, GPIO_PIN9, OUTPUT_HIGH);
GPIO_setOutput(GPIO_BANK7, GPIO_PIN10, OUTPUT_HIGH);
GPIO_setOutput(GPIO_BANK7, GPIO_PIN11, OUTPUT_HIGH);
CLRBIT(SYSCONFIG->PINMUX[13], 0xFFFFFFFF);
SETBIT(SYSCONFIG->PINMUX[13], 0x88888811); //Set GPIO 6.8-13 to GPIOs and IMPORTANT Sets GP6[15] to /RESETOUT used by PHY, GP6[14] CLKOUT appears unconnected
#warn GP6.15 is also connected to CAMERA RESET This is a Bug in my board design Need to change Camera Reset to different IO.
GPIO_setDir(GPIO_BANK6, GPIO_PIN8, GPIO_OUTPUT);
GPIO_setDir(GPIO_BANK6, GPIO_PIN9, GPIO_OUTPUT);
GPIO_setDir(GPIO_BANK6, GPIO_PIN10, GPIO_OUTPUT);
GPIO_setDir(GPIO_BANK6, GPIO_PIN11, GPIO_OUTPUT);
GPIO_setDir(GPIO_BANK6, GPIO_PIN12, GPIO_OUTPUT);
GPIO_setDir(GPIO_BANK6, GPIO_PIN13, GPIO_INPUT);
// on power up wait until Linux has initialized Timer1
while ((T1_TGCR & 0x7) != 0x7) {
for (index=0;index<50000;index++) {} // small delay before checking again
}
USTIMER_init();
// Turn on McBSP1
EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_MCBSP1, PSC_ENABLE);
// If Linux has already booted It sets a flag so no need to delay
if ( GET_ISLINUX_BOOTED == 0) {
USTIMER_delay(4*DELAY_1_SEC); // delay allowing Linux to partially boot before continuing with DSP code
}
// init the us timer and i2c for all to use.
I2C_init(I2C0, I2C_CLK_100K);
init_ColorVision();
init_LCD_mem(); // added rick
EVTCLR0 = 0xFFFFFFFF;
EVTCLR1 = 0xFFFFFFFF;
EVTCLR2 = 0xFFFFFFFF;
EVTCLR3 = 0xFFFFFFFF;
init_DMA();
init_McBSP();
init_LADAR();
CLRBIT(SYSCONFIG->PINMUX[1], 0xFFFFFFFF);
SETBIT(SYSCONFIG->PINMUX[1], 0x22222220); // This is enabling the McBSP1 pins
CLRBIT(SYSCONFIG->PINMUX[5], 0x00FF0FFF);
SETBIT(SYSCONFIG->PINMUX[5], 0x00110111); // This is enabling SPI pins
CLRBIT(SYSCONFIG->PINMUX[16], 0xFFFF0000);
SETBIT(SYSCONFIG->PINMUX[16], 0x88880000); // setup GP7.8 through GP7.13
CLRBIT(SYSCONFIG->PINMUX[17], 0x000000FF);
SETBIT(SYSCONFIG->PINMUX[17], 0x00000088); // setup GP7.8 through GP7.13
init_LCD();
LADARps.x = 3.5/12; // 3.5/12 for front mounting
LADARps.y = 0;
LADARps.theta = 1; // not inverted
OPTITRACKps.x = 0;
OPTITRACKps.y = 0;
OPTITRACKps.theta = 0;
for(i = 0;i<LADAR_MAX_DATA_SIZE;i++)
{ LADARdistance[i] = LADAR_MAX_READING; } //initialize all readings to max value.
// ROBOTps will be updated by Optitrack during gyro calibration
// TODO: specify the starting position of the robot
ROBOTps.x = 0; //the estimate in array form (useful for matrix operations)
ROBOTps.y = 0;
ROBOTps.theta = 0; // was -PI: need to flip OT ground plane to fix this
// flag pins
GPIO_setDir(IMAGE_TO_LINUX_BANK, IMAGE_TO_LINUX_FLAG, GPIO_OUTPUT);
GPIO_setDir(OPTITRACKDATA_FROM_LINUX_BANK, OPTITRACKDATA_FROM_LINUX_FLAG, GPIO_OUTPUT);
GPIO_setDir(DATA_TO_LINUX_BANK, DATA_TO_LINUX_FLAG, GPIO_OUTPUT);
GPIO_setDir(DATA_FROM_LINUX_BANK, DATA_FROM_LINUX_FLAG, GPIO_OUTPUT);
GPIO_setDir(DATAFORFILE_TO_LINUX_BANK, DATAFORFILE_TO_LINUX_FLAG, GPIO_OUTPUT);
GPIO_setDir(LVDATA_FROM_LINUX_BANK, LVDATA_FROM_LINUX_FLAG, GPIO_OUTPUT);
GPIO_setDir(LVDATA_TO_LINUX_BANK, LVDATA_TO_LINUX_FLAG, GPIO_OUTPUT);
CLR_OPTITRACKDATA_FROM_LINUX; // Clear = tell linux DSP is ready for new Opitrack data
CLR_DATA_FROM_LINUX; // Clear = tell linux that DSP is ready for new data
CLR_DATAFORFILE_TO_LINUX; // Clear = linux not requesting data
SET_DATA_TO_LINUX; // Set = put float array data into shared memory for linux
SET_IMAGE_TO_LINUX; // Set = put image into shared memory for linux
CLR_LVDATA_FROM_LINUX; // Clear = tell linux that DSP is ready for new LV data
SET_LVDATA_TO_LINUX; // Set = put LV char data into shared memory for linux
// clear all possible EDMA
EDMA3_0_Regs->SHADOW[1].ICR = 0xFFFFFFFF;
// Add your init code here
}
void main (void)
{
/*开硬件浮点*/
SCB->CPACR |=((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
uint16 flag;
uint16 i,j;
DisableInterrupts;
LCD_init(1);
Disp_single_colour(Black);
LCD_PutString(10, 50,"Frequency: ", White, Black);
LCD_PutString(145, 50," KHz", White, Black);
LCD_PutString(10, 80,"Power: ", White, Black);
LCD_PutString(145, 80," W", White, Black);
LCD_PutString(10, 110,"Amplify: ", White, Black);
LCD_PutString(165, 110,"Restrain: ", White, Black);
init_ADC();
init_DAC();
init_DMA();
init_PDB();
init_PIT();
init_gpio_PE24();
EnableInterrupts;
LPLD_LPTMR_DelayMs(100);
flag = Result_flag;
uint16 ShowAFlag = 0;
uint16 ShowBFlag = 0;
uint16 ShowCFlag = 0;
arm_fir_init_f32(&S, NUM_TAPS, (float32_t *)&firCoeffs32[0], &firStateF32[0], blockSize);
while(1)
{
if( flag==Result_flag && Result_flag == 0)
{
if(++ShowAFlag<10)
{
for(j = 0;j<LENGTH;j++)
testInput_x[j*2] = Result_A[j];
for(j = 0;j<LENGTH;j++)
testInput_x[j*2+1] = 0;
arm_cfft_f32(&arm_cfft_sR_f32_len2048, testInput_x, ifftFlag, doBitReverse);
/* Process the data through the Complex Magnitude Module for
calculating the magnitude at each bin */
arm_cmplx_mag_f32(testInput_x, testOutput, fftSize);
testOutput[0] = 0;
/* Calculates maxValue and returns corresponding BIN value */
arm_max_f32(testOutput, fftSize, &maxValue, &testIndex);
}
else
{
ShowAFlag = 0;
if(starfir !=2 )
LCD_Put_Float(100, 50,"",testIndex*40.0/2048, White, Black);
}
if(starfir == 1)
{
PTE24_O = 1;
for(j = 0;j<LENGTH;j++)
firInput[j] = Result_A[j];
inputF32 = &firInput[0];
outputF32 = &firOutput[0];
for(i=0; i < numBlocks; i++)
arm_fir_f32(&S, inputF32 + (i * blockSize), outputF32 + (i * blockSize), blockSize);
for(j = 0;j<LENGTH;j++)
Result_A[j] = firOutput[j];
PTE24_O = 0;
}
flag = 1;
}
else if(flag==Result_flag && Result_flag == 1)
{
if(starfir !=2 )
{
if(++ShowBFlag<10)
{
power = 0;
for(i=0;i<LENGTH;i++)
power+=((Result_B[i] - OFFEST)/1241.0)*((Result_B[i] - OFFEST)/1241.0)*90*MyDb/8.0;
power = power/LENGTH;
}
else
{
ShowBFlag = 0;
LCD_Put_Float(100, 80,"",power, White, Black);
}
}
else
{
for(i = 0;i<160;i++)
{
FFT_RESULT_NEW[i] = testOutput[i*6]/FFT_VALUE;
if(FFT_RESULT_NEW[i]>239) FFT_RESULT_NEW[i] = 239;
}
}
// {
// for(j = 0;j<LENGTH;j++)
// testInput_x[j*2] = Result_B[j];
// for(j = 0;j<LENGTH;j++)
// testInput_x[j*2+1] = 0;
//
// arm_cfft_f32(&arm_cfft_sR_f32_len2048, testInput_x, ifftFlag, doBitReverse);
//
// /* Process the data through the Complex Magnitude Module for
// calculating the magnitude at each bin */
// arm_cmplx_mag_f32(testInput_x, testOutput, fftSize);
//
// testOutput[0] = 0;
// /* Calculates maxValue and returns corresponding BIN value */
// arm_max_f32(testOutput, fftSize, &maxValue, &testIndex);
// }
if(starfir == 1)
{
PTE24_O = 1;
for(j = 0;j<LENGTH;j++)
firInput[j] = Result_B[j];
inputF32 = &firInput[0];
outputF32 = &firOutput[0];
for(i=0; i < numBlocks; i++)
arm_fir_f32(&S, inputF32 + (i * blockSize), outputF32 + (i * blockSize), blockSize);
for(j = 0;j<LENGTH;j++)
Result_B[j] = firOutput[j];
PTE24_O = 0;
}
flag = 2;
}
else if(flag==Result_flag && Result_flag == 2)
{
//
// {
// for(j = 0;j<LENGTH;j++)
// testInput_x[j*2] = Result_C[j];
// for(j = 0;j<LENGTH;j++)
// testInput_x[j*2+1] = 0;
//
// arm_cfft_f32(&arm_cfft_sR_f32_len2048, testInput_x, ifftFlag, doBitReverse);
//
// /* Process the data through the Complex Magnitude Module for
// calculating the magnitude at each bin */
// arm_cmplx_mag_f32(testInput_x, testOutput, fftSize);
//
// testOutput[0] = 0;
// /* Calculates maxValue and returns corresponding BIN value */
// arm_max_f32(testOutput, fftSize, &maxValue, &testIndex);
// }
if(starfir == 1)
{
// PTE24_O = 1;
for(j = 0;j<LENGTH;j++)
firInput[j] = Result_C[j];
inputF32 = &firInput[0];
outputF32 = &firOutput[0];
for(i=0; i < numBlocks; i++)
arm_fir_f32(&S, inputF32 + (i * blockSize), outputF32 + (i * blockSize), blockSize);
for(j = 0;j<LENGTH;j++)
Result_C[j] = firOutput[j];
// PTE24_O = 0;
}
if(starfir != 2)
{
if(++ShowCFlag<5)
{
}
else
{
if(ShowMenu)
{
Disp_single_colour(Black);
LCD_PutString(10, 50,"Frequency: ", White, Black);
LCD_PutString(145, 50," KHz", White, Black);
LCD_PutString(10, 80,"Power: ", White, Black);
LCD_PutString(145, 80," W", White, Black);
LCD_PutString(10, 110,"Amplify: ", White, Black);
LCD_PutString(165, 110,"Restrain: ", White, Black);
ShowMenu = 0;
}
LCD_Put_Float(100, 110,"",MyDb/0.5, White, Black);
if(starfir)
LCD_PutString(260, 110,"On ", White, Black);
else
LCD_PutString(260, 110,"Off", White, Black);
}
}
else
{
if(ShowMenu)
{
Disp_single_colour(Black);
ShowMenu = 0;
}
draw_fft();
}
flag = 0;
}
}
}
//-------------------------------
// main function
int main(void) {
//u32 del;
// turn on execution counter
// default .crt does this for us
// __asm__ __volatile__("R0 = 0x32; SYSCFG = R0; CSYNC;":::"R0");
// initialize clocks and power
init_clocks();
// configure programmable flags
init_flags();
READY_LO;
// intialize the sdram controller
init_EBIU();
// intialize the flash controller (which, weirdly, handles gpio)
// init_flash();
/// initialize the CV dac (reset)
init_cv();
// intialize the sport0 for audio rx/tx
init_sport0();
// intialize the sport1 for cv out
init_sport1();
// intialize DMA for audio
init_DMA();
// // put the spi back in slave mode to receive param changes from avr32
init_spi_slave();
// intialize the audio processing unit (assign memory)
module_init();
// assign interrupts
init_interrupts();
// begin audio transfers
enable_DMA_sport0();
// begin cv transfers
enable_DMA_sport1();
// initialize the codec
init_1939();
// leds on
LED3_HI;
LED4_HI;
// signal the ready flag
READY_HI;
while(1) {
// fixme: everything happens in ISRs!
// ;;
/*
//// TODO / FIXME:
update a param change FIFO here?
for now, the answer is no:
instead, we are asking avr32 to hold off sending params
for as long as the ready-pin is deasserted by frame or control change processing.
*/
/// while frame processing
// ctl_next_frame();
// ctl_perform_last_change();
}
}