/*****************************************************************
*
* Function Name: hc_found_hci
*
* This function request IO memory regions, request IRQ, and
* allocate all other resources.
*
* Input: addr = first IO address
* addr2 = second IO address
* irq = interrupt number
*
* Return: 0 = success or error condition
*
*****************************************************************/
static int __devinit hc_found_hci (int addr, int addr2, int irq)
{
hci_t *hci;
hcipriv_t *hp;
DBGFUNC ("Enter hc_found_hci\n");
hci = hc_alloc_hci ();
if (!hci) {
return -ENOMEM;
}
init_irq ();
hp = &hci->hp;
if (!request_region (addr, 256, "SL811 USB HOST")) {
DBGERR ("request address %d failed", addr);
hc_release_hci (hci);
return -EBUSY;
}
hp->hcport = addr;
if (!hp->hcport) {
DBGERR ("Error mapping SL811 Memory 0x%x", hp->hcport);
}
if (!request_region (addr2, 256, "SL811 USB HOST")) {
DBGERR ("request address %d failed", addr2);
hc_release_hci (hci);
return -EBUSY;
}
hp->hcport2 = addr2;
if (!hp->hcport2) {
DBGERR ("Error mapping SL811 Memory 0x%x", hp->hcport2);
}
if (hc_alloc_trans_buffer (hci)) {
hc_release_hci (hci);
return -ENOMEM;
}
usb_register_bus (hci->bus);
if (request_irq (irq, hc_interrupt, 0, "SL811", hci) != 0) {
DBGERR ("request interrupt %d failed", irq);
hc_release_hci (hci);
return -EBUSY;
}
hp->irq = irq;
printk (KERN_INFO __FILE__ ": USB SL811 at %x, addr2 = %x, IRQ %d\n",
addr, addr2, irq);
hc_reset (hci);
if (hc_start (hci) < 0) {
DBGERR ("can't start usb-%x", addr);
hc_release_hci (hci);
return -EBUSY;
}
return 0;
}
/**
* @brief sys_init() - Register libmetal devices.
* This function register the libmetal generic bus, and then
* register the IPI, shared memory descriptor and shared memory
* devices to the libmetal generic bus.
*
* @return 0 - succeeded, non-zero for failures.
*/
int sys_init()
{
struct metal_init_params metal_param = METAL_INIT_DEFAULTS;
int ret;
enable_caches();
init_uart();
if (init_irq()) {
LPERROR("Failed to initialize interrupt\n");
}
/* Initialize libmetal environment */
metal_init(&metal_param);
/* Initialize metal Xilinx IRQ controller */
ret = metal_xlnx_irq_init();
if (ret) {
LPERROR("%s: Xilinx metal IRQ controller init failed.\n",
__func__);
return ret;
}
/* Register libmetal devices */
ret = platform_register_metal_device();
if (ret) {
LPERROR("%s: failed to register devices: %d\n", __func__, ret);
return ret;
}
/* Open libmetal devices which have been registered */
ret = open_metal_devices();
if (ret) {
LPERROR("%s: failed to open devices: %d\n", __func__, ret);
return ret;
}
return 0;
}
void k_main(multiboot_info_t * multiboot_info)
{
system_info.total_memory = multiboot_info->mem_upper;
clrscr();
printf("%s\n", &uname);
printf(" Copyright 2005-2006 Draco Project\n");
printf("%dM of extended memory.\n", multiboot_info->mem_upper >> 10);
cons_attribute = 7;
init_gdt();
init_idt();
init_irq(0x20, 0x28);
paging_kernel_env(system_info.total_memory / 4);
paging_init();
proc_init();
modules_init(multiboot_info);
printf("Kernel is initialized.\n");
sti();
while(1);
}
void STM32_M0_UART::init(uart_conf_t *uart_conf)
{
init_gpio();
init_irq();
init_uart(uart_conf);
USART_ClearITPendingBit(USART_PORT, USART_IT_RXNE);
USART_ITConfig(USART_PORT, USART_IT_RXNE, ENABLE);
tx_state = UART_TX_STATE_IDLE;
}
/* Response to user's open() call */
int aclpci_open(struct inode *inode, struct file *file) {
struct aclpci_dev *aclpci = 0;
int result = 0;
/* pointer to containing data structure of the character device inode */
aclpci = container_of(inode->i_cdev, struct aclpci_dev, cdev);
if (down_interruptible(&aclpci->sem)) {
return -ERESTARTSYS;
}
/* create a reference to our device state in the opened file */
file->private_data = aclpci;
ACL_DEBUG (KERN_DEBUG "aclpci = %p, pid = %d (%s)",
aclpci, current->pid, current->comm);
aclpci->user_pid = current->pid;
aclpci->user_task = current;
aclpci->global_mem_segment = 0;
aclpci->global_mem_segment_addr = get_segment_ctrl_addr(aclpci);
#if 0
if (aclpci->user_pid == -1) {
aclpci->user_pid = current->pid;
} else {
ACL_DEBUG (KERN_WARNING "Tried open() by pid %d. Already opened by %d", current->pid, aclpci->user_pid);
result = -EFAULT;
goto done;
}
#endif
if (init_irq (aclpci->pci_dev, aclpci)) {
ACL_DEBUG (KERN_WARNING "Could not allocate IRQ!");
result = -EFAULT;
goto done;
}
load_signal_info (aclpci);
#if !POLLING
if (aclpci->user_task == NULL) {
ACL_DEBUG (KERN_WARNING "Tried open() by pid %d but couldn't find associated task_info", current->pid);
result = -EFAULT;
goto done;
}
#endif
result = 0;
done:
up (&aclpci->sem);
return result;
}
void init() {
int i=0, j;
uart_init_hw();
init_irq();
updateTemps();
init_buffers(&fg_buffer);
#ifdef CBDEBUG
for (i=0; i < MAX_FG_DEVICES; i++) {
mprintf("cb[%d]: isEmpty = %d\n", i, cbisEmpty((struct circ_buffer *)&fg_buffer, i));
mprintf("cb[%d]: isFull = %d\n", i, cbisFull((struct circ_buffer *)&fg_buffer, i));
mprintf("cb[%d]: getCount = %d\n", i, cbgetCount((struct circ_buffer *)&fg_buffer, i));
}
#endif
scan_scu_bus(&scub, backplane_id, scub_base);
scan_for_fgs(&scub, &fgs);
//probe_scu_bus(scub_base, 55, 3, slaves);
configure_slaves();
#ifdef FGDEBUG
mprintf("ID: 0x%08x%08x\n", (int)(scub.unique_id >> 32), (int)scub.unique_id);
while(scub.slaves[i].unique_id) { /* more slaves in list */
mprintf("slaves[%d] ID: 0x%08x%08x\n",i, (int)(scub.slaves[i].unique_id>>32), (int)scub.slaves[i].unique_id);
mprintf("slave macro: 0x%x\n", scub.slaves[i].version);
mprintf("CID system: %d\n", scub.slaves[i].cid_sys);
mprintf("CID group: %d\n", scub.slaves[i].cid_group);
mprintf("slot: %d\n", scub.slaves[i].slot);
j = 0;
while(scub.slaves[i].devs[j].version) { /* more fgs in list */
mprintf(" fg[%d], version 0x%x \n", j, scub.slaves[i].devs[j].version);
j++;
}
i++;
}
mprintf("fg_list-------------------\n");
i = 0;
while(fgs.devs[i]) {
mprintf("fgs.devs[%d] 0x%x\n", i, fgs.devs[i]);
mprintf("fg[%d]: version 0x%x\n", i, fgs.devs[i]->version);
mprintf(" dev_number 0x%x\n", fgs.devs[i]->dev_number);
mprintf(" offset 0x%x\n", fgs.devs[i]->offset);
mprintf(" endvalue 0x%x\n", fgs.devs[i]->endvalue);
i++;
}
#endif
/* reset_slaves();
usleep(1000);
dis_irq();
usleep(1000000);
init_irq();
usleep(1000);
configure_slaves();
*/
}
int gboot_main()
{
int num;
#ifdef MMU_ON
mmu_init();
#endif
led_init();
button_init();
init_irq();
uart_init();
while(1)
{
printf("\n***************************************\n\r");
printf("\n*****************GBOOT*****************\n\r");
printf("1:Download Linux Kernel from TFTP Server!\n\r");
printf("2:Boot Linux from RAM!\n\r");
printf("3:Boor Linux from Nand Flash!\n\r");
printf("\n Plese Select:");
scanf("%d",&num);
switch (num)
{
case 1:
//tftp_load();
break;
case 2:
//boot_linux_ram();
break;
case 3:
//boot_linux_nand();
break;
default:
printf("Error: wrong selection!\n\r");
break;
}
}
return 0;
}
/*
* This is the kernel main routine. When the boot process is completed, this
* function is called.
*/
void start_kernel(void) {
int pid, i;
char *names[N_CONSOLES] = { "PRG1", "PRG2", "PRG3",
"PRG4", "PRG5", "PRG6" };
// init traps
init_traps();
// initialize IRQs
init_irq();
// initialize the tty driver. The tty is composed by a keyboard driver
// that read input keys a print the relative ASCII code on video.
tty_init();
// initialize the timer.
time_init();
// initialize the scheduler
sched_init();
printk("Kernel info: %u bytes, start at 0x%x0 end at 0x%x0.\n",
&__KERNEL_END__-K_START, K_START, &__KERNEL_END__);
sti();
// calibrate delay
calibrate_delay();
// floppy driver initialization
floppy_init();
// switch in user mode
move_to_user_mode();
// for a process for each console and execute the program PRGi
for (i=0; i<N_CONSOLES; ++i) {
// spawn process i and run PRG1
pid = fork();
if (pid == 0) {
exec(names[i]);
} else if (pid < 0) {
print("idle: cannot duplicate myself.\n");
}
}
print("Idle: ok!\n");
// idle loop
while(1);
}
/* _disable_irq:
* Masks a hardware interrupt.
*/
void _disable_irq(int num)
{
unsigned char pic;
init_irq();
if (num > 7) {
pic = inportb(0xA1);
outportb(0xA1, pic & (1<<(num-8))); /* mask PIC-2 interrupt */
altered_pic2 |= 1<<(num-8);
}
else {
pic = inportb(0x21);
outportb(0x21, pic & (1<<num)); /* mask PIC-1 interrupt */
altered_pic1 |= 1<<num;
}
}
void init(void)
{
init_video();
init_mm();
init_trap();
init_irq();
init_8259a();
init_keyboard();
init_timer();
init_harddisk();
init_mouse();
io_sti();
init_resource();
do_test();
}
int main(void)
{
#ifdef ENABLE_MMU
init_mmu();
#endif
//marquee();
#ifdef IRQ_TEST
init_button();
led_init();
init_irq();
#endif
while (1);
return 0;
}
int k0_main(multiboot_header_t *header) {
k0_cls();
module_header_t *mod_header = (module_header_t *)header->mods_addr;
//msg[4] = '\0';
//k0_print(msg);
//k0_print_char('\n');
k0_print("Kernel level 0 loaded.\nInitializing GDT... ");
init_gdt();
k0_print("OK\nInitializing IDT... ");
init_idt();
k0_print("OK\nInitializing ISR... ");
init_isr();
k0_print("OK\nInitializing IRQ... ");
init_irq();
k0_print("OK\n");
k1_main(mod_header);
return 0;
}
void osmain( void )
{
int i;
int j=0;
char nb[10];
char tmbuf[30];
/* ini screen first,so that we can output info as early as possible */
init_tty(); /* initialize the screen*/
kprintf( "TTY initialized\n" );
/* init both physical and virtual memory */
init_mm();
kprintf( "Memory manager initialized\n" );
init_irq(); /*initialize irq,with all interrupte disabled.*/
kprintf( "IRQ initialized\n" );
kprintf("\nHello\n");
install_syscall();
init_all_tasks();
init_kb(); /* set keyboard IRQ,and enable it */
kprintf( "\nKeyboard initialized\n" );
init_timer(); /* initialize time, enable timer irq */
/* init_system_clock(&real_tm); */
kprintf( "\nTimer initialized\n");
init_system_clock(&start_tm);
kprintf("\nSystem start time is \n");
kprintf(timetostr(&start_tm, tmbuf));
kprintf("\nStarting first process....\n");
start_first_process();
kprintf( "\nNow I am doing a loop ,waiting for interrupt :)\n" );
while(1);
halt();
}
/*main*/
int main(int argc,char** argv)
{
int ret = 0;
//swi_test();
clean_bss();
uart0_init();
init_led();
init_irq();
#ifdef _DEBUG
/*register extern4*/
key_init(4,EXTINT);
register_extern_int(EXTERNIRQ4,KeyINT2_Handle);
//invoking timer0 initialize and enable timer0 handle
register_interrupt(ISR_TIMER0_OFT,Timer0_Handle);
timer0_init();
#endif
ret = smdk2440_machine_init();
if(ret != 0)
{
goto tail;
}
ret = dm9000_initialize();
if(ret != 0)
{
printf("dm9000_initialize error.\n\t");
goto tail;
}
ret = eth_init();
if(ret != 0)
{
printf("eth_init error.\n\t");
goto tail;
}
wait(50000);
test_dm9000();
wait(500000);
test_dm9000();
//arp_test();
uip_exe();
tail:
while(1);
return 0;
}
/* _enable_irq:
* Unmasks a hardware interrupt.
*/
void _enable_irq(int num)
{
unsigned char pic;
init_irq();
pic = inportb(0x21);
if (num > 7) {
outportb(0x21, pic & 0xFB); /* unmask Cascade (IRQ2) interrupt */
pic = inportb(0xA1);
outportb(0xA1, pic & (~(1<<(num-8)))); /* unmask PIC-2 interrupt */
altered_pic2 |= 1<<(num-8);
}
else {
outportb(0x21, pic & (~(1<<num))); /* unmask PIC-1 interrupt */
altered_pic1 |= 1<<num;
}
}
int main()
{
// 1. Initiera (Görs ovan med definitionerna?)
unsigned int door = DOOR_CLOSED;
init_irq();
while(1)
{
// Sätt IRQ typ till 0 eftersom vi inte har avbrott
interrupt_type = NO_IRQ_TYPE;
// Vänta på avbrott, WAI i assembler modulen
standby();
// Nu har vi avbrott, switcha på interrupt_type som sätts
// i assemblermodulen för att avgöra vilken typ av avbrott
switch(interrupt_type)
{
// Sensor har gett utslag, öppna dörren
case SENSOR:
if(door == DOOR_CLOSED)
setControl(OPEN_DOOR);
break;
// Dörren har stängts
case DOOR_CLOSED:
door = DOOR_CLOSED;
break;
// Dörren har öppnats, börja räkna ner innan den ska stängas igen
case DOOR_OPENED:
door = DOOR_OPENED;
set_timeout(30);
break;
// Timeouten är klar, stäng nu dörren
case TIME_OUT:
if(door == DOOR_OPENED)
setControl(CLOSE_DOOR);
break;
}
}
return 0;
}
// Kernel
void kernel(dword magic, dword addr) {
dword * t;
byte * buffer;
multiboot_info_t * multiboot_info;
// Print something
clrscr();
puts("Starting...\n");
// MBoot check
if(magic != MULTIBOOT_BOOTLOADER_MAGIC) {
puts("Invalid magic number!\n");
for(;;);
}
multiboot_info = (multiboot_info_t *)addr;
if (CHECK_FLAG(multiboot_info -> flags, 4) && CHECK_FLAG(multiboot_info -> flags, 5)) {
puts("Invalid! Both bits 4 and 5 are set!\n");
for(;;);
}
printf("multiboot_info_flags = 0x%x\n", multiboot_info -> flags);
if(CHECK_FLAG(multiboot_info -> flags, 0)) {
printf("mem_lower = 0x%x KiB\n", multiboot_info -> mem_lower);
printf("mem_upper = 0x%x KiB\n", multiboot_info -> mem_upper);
}
if(CHECK_FLAG(multiboot_info -> flags, 1)) {
printf("boot_device = 0x%x\n", multiboot_info -> boot_device);
}
if(CHECK_FLAG(multiboot_info -> flags, 2)) {
printf("cmdline = %s\n", (char *)multiboot_info -> cmdline);
}
// Init GDT
set_gd(gd + 0, 0x0, 0x0, 0x0); // zero
set_gd(gd + 1, 0x0, 0xcfffff, 0x9a); // cs
set_gd(gd + 2, 0x0, 0xcfffff, 0x92); // ds
gdtr.limit = 0x2000;
gdtr.gd = gd;
asm("lgdt %0"::"m"(gdtr));
// Init IRQ
init_irq();
// Init IDT
populate_idt(id);
idtr.limit = 0x7ff;
idtr.id = id;
asm("lidt %0"::"m"(idtr));
// Init paging
init_paging();
asm ("" : :"a"(pdbr));
asm("mov %eax, %cr3");
asm("mov %cr0, %eax");
asm("bts $0x1f, %eax");
asm("mov %eax, %cr0");
asm("jmp . + 2");
// Test FAT
fat_init(& media_read, 30);
buffer = malloc(512);
fat_loadfile("test", buffer, 512);
puts((char *)buffer);
// Permit int
asm("sti");
// Test paging
t = (dword *)0x900000;
*t = 7;
// LOOP
for(;;);
}
int gboot_main()
{
int num;
//unsigned char buf[1024*4];
#ifdef MMU_ON
mmu_init();
#endif
uart_init();
led_init();
button_init();
init_irq();
led_off();
dma_init();
dma_start();
dm9000_init();
while(1)
{
printf("\n***************************************\n\r");
printf("\n****************MYBOOT*****************\n\r");
printf("1:Set Out a Arp Package to Get Host Ip and MAC!\n\r");
printf("2:Download Linux Kernel from TFTP Server!\n\r");
printf("3:Boot Linux from RAM!\n\r");
printf("\n Plese Select:");
scanf("%d",&num);
switch (num)
{
case 1:
arp_progress();
break;
case 2:
tftp_send_request("tftp.c");
while(FLAG_TFTP);
break;
case 3:
boot_linux();
//boot_linux_nand();
break;
default:
printf("Error: wrong selection!\n\r");
break;
}
}
return 0;
}
int gboot_main()
{
int num;
#ifdef MMU_ON
mmu_init();
#endif
led_init();
button_init();
init_irq();
led_on();
uart_init();
dma_init();
dma_start();
/*
putc(0x0d);
putc(0x0a);
putc('H');
*/
//uart_send_string(buf);
//putc('A');
while(1)
{
//getc();
printf("\n\r***************************************\n\r");
printf("\n\r*****************GBOOT*****************\n\r");
printf("1:Download Linux Kernel from TFTP Server!\n\r");
printf("2:Boot Linux from RAM!\n\r");
printf("3:Boor Linux from Nand Flash!\n\r");
printf("\n Plese Select:");
scanf("%d",&num);
switch (num)
{
case 1:
//tftp_load();
break;
case 2:
//boot_linux_ram();
break;
case 3:
//boot_linux_nand();
break;
default:
printf("Error: wrong selection!\n\r");
break;
}
}
return 0;
}
int kmain(int argc, char** argv, uint32_t table)
{
app_startup(); /* bss is valid after this point */
global_data = table;
unsigned long int oldSwi, oldSwi2, exitVal, *s_addr;
unsigned long int *irq_addr, oldIrq, oldIrq2, *ubootIrqAddr, *ubootSwiAddr;
uint32_t ICMR, ICLR, OIER, OSCR, OSMR, OSSR;
oldSwi = *(unsigned long int *)SWI_PTR;
oldSwi2 = *(unsigned long int *)(SWI_PTR+1);
if((oldSwi & LDR_MASK) != GOOD_INSTRUCTION) {
return BAD_CODE;
}
if((oldSwi & POSITIVE_OFFSET) == POSITIVE_OFFSET)
s_addr = (unsigned long int*) ((oldSwi & OFFSET_MASK) + UBOOT_SWI_PC);
else
s_addr = (unsigned long int*) (UBOOT_SWI_PC - (oldSwi & OFFSET_MASK));
ubootSwiAddr = (unsigned long int*) *(s_addr);
oldIrq = * (unsigned long int *) IRQ_PTR;
oldIrq2 = *(unsigned long int *)(IRQ_PTR + 1);
if((oldIrq & LDR_MASK) != GOOD_INSTRUCTION) {
return BAD_CODE;
}
if((oldIrq & POSITIVE_OFFSET) == POSITIVE_OFFSET)
irq_addr = (unsigned long int*) ((oldIrq & OFFSET_MASK) + UBOOT_IRQ_PC);
else
irq_addr = (unsigned long int*) (UBOOT_IRQ_PC - (oldIrq & OFFSET_MASK));
ubootIrqAddr = (unsigned long int*) *(irq_addr);
*(ubootSwiAddr) = LDR_PC_OPCODE;
*(ubootSwiAddr + 1) = (unsigned) &S_Handler;
*(ubootIrqAddr) = LDR_PC_OPCODE;
*(ubootIrqAddr+1) = (unsigned) &I_Handler;
ICMR = reg_read(INT_ICMR_ADDR);
ICLR = reg_read(INT_ICLR_ADDR);
OIER = reg_read(OSTMR_OIER_ADDR);
OSMR = reg_read(OSTMR_OSMR_ADDR(0));
OSCR = reg_read(OSTMR_OSCR_ADDR);
OSSR = reg_read(OSTMR_OSSR_ADDR);
// set osmr match reg bit to 1 for interrupts
reg_write(INT_ICMR_ADDR, SET_ICMR_M0_IRQ);
//make interrupts irq
reg_write(INT_ICLR_ADDR, 0x0);
// set match reg
reg_write(OSTMR_OSMR_ADDR(0), OSTMR_FREQ_VERDEX/FREQ_MS_FACTOR);
// enable os timer interrupt for match 0 reg
reg_write(OSTMR_OIER_ADDR, OSTMR_OIER_E0);
// set clock reg to 0
reg_write(OSTMR_OSCR_ADDR, 0x0);
//clear status reg
reg_write(OSTMR_OSSR_ADDR, 0x0);
init_irq();
exitVal = (int)load_user_prog(argc, argv);
*(ubootSwiAddr) = (unsigned long int) oldSwi;
*(ubootSwiAddr + 1) = (unsigned long int) oldSwi2;
*(ubootIrqAddr) = (unsigned long int) oldIrq;
*(ubootIrqAddr+1) = (unsigned long int) oldIrq2;
// restore interrupt registers
reg_write(INT_ICMR_ADDR, ICMR);
reg_write(INT_ICLR_ADDR, ICLR);
reg_write(OSTMR_OIER_ADDR, OIER);
reg_write(OSTMR_OSSR_ADDR, OSSR);
reg_write(OSTMR_OSCR_ADDR, OSCR);
reg_write(OSTMR_OSMR_ADDR(0), OSMR);
return exitVal;
}
void init_device() {
PCONP_bit.PCUART0 = 0;
PCONP_bit.PCPWM1 = 0;
PCONP_bit.PCI2C0 = 0;
PCONP_bit.PCSSP1 = 0;
PCONP_bit.PCAN1 = 0;
PCONP_bit.PCAN2 = 0;
PCONP_bit.PCI2C1 = 0;
PCONP_bit.PCSSP0 = 0;
PCONP_bit.PCTIM2 = 0;
PCONP_bit.PCTIM3 = 0;
PCONP_bit.PCUART2 = 0;
PCONP_bit.PCI2C2 = 0;
PCONP_bit.PCI2S = 0;
PCONP_bit.PCGPDMA = 0;
PCONP_bit.PCENET = 0;
init_timer0();
init_at25df();
init_led();
init_updater();
init_tasks();
init_app_settings();
create_ring_buff(pointerRingBuff, ring_buff, sizeof(ring_buff));
init_uart0(57600, 3);
INT_UART0RX_ON;
init_irq();
// Testing main pin (for locked mode)
if (FIO2PIN_bit.P2_10 == 0) {
return;
}
// Fork
if (is_need_update() == TRUE_T) {
DEBUG_PRINTF("BL:enable_update_task()\n\r");
enable_update_task();
} else {
if (*((uint32_t *)(IAP_MAIN_SECT_ADDR + SHIFT_FW_VALID_FLG)) != IAP_VALID_DATA) {
DEBUG_PRINTF("BL:repair_flash_iap()\n\r");
repair_flash_iap();
}
uint32_t success_count = 0;
const uint32_t fw_size = *((uint32_t *)(IAP_MAIN_SECT_ADDR + SHIFT_FW_SIZE_ADDR));
const uint32_t fw_crc = *((uint32_t *)(IAP_MAIN_SECT_ADDR + SHIFT_FW_CRC_ADDR));
DEBUG_PRINTF("BL:fw_size=0x%8x, fw_crc=0x%8x\n\r", fw_size, fw_crc);
for (uint32_t i = 0; i < 3; i++) {
uint8_t * pFw = (uint8_t *)FW_START_ADDRESS;
uint32_t crc = 0;
for (uint32_t k = 0; k < fw_size; k++) {
crc += (uint32_t)(*pFw++);
}
crc = 0UL - crc;
DEBUG_PRINTF("BL:compute crc=0x%8x\n\r", crc);
if (fw_crc == crc) {
success_count++;
break;
}
}
if (success_count > 0 && fw_crc) {
DEBUG_PRINTF("BL:run_main_firmware()\n\r");
waite_tx_all_uart0();
run_main_firmware();
}
}
}
/**
* Starts the initialization, the tasks and then the scheduler.
*/
int main(void)
{
/* disable ETM at very first */
PINSEL10 &= ~((unsigned int)(1 << 3));
/* Initialize BMC hardware */
global_data.bmc_resetcause = 0x00;
/* IPMI message sequence counter */
global_data.seq_counter = 0x00;
/* site number used for entity instance */
global_data.bmc_siteno = 0x00;
/* reset sdr list */
sdr_list.sdr_count = 0;
/* init PLL */
init_clock();
/* init interrupts */
init_irq();
/* get reset cause */
init_resetcause();
/* init port pins */
init_portpins();
/* CUSTOM BOARD INIT CODE LOCATION 1 */
custom_init_1();
/* get HW and IPMB address */
custom_get_hw_ipmb_address();
uptime_init();
/* init RTC */
rtc_init();
/* create the FreeRTOS queues */
create_queues();
uart_init(UART_DEBUG_CONNECTOR, 115200);
uart_printf("Firmware started...\n");
/* init SPI/SSP controllers */
spi_init();
/* init SPI FLASH */
spi_flash_init_devices();
spi_flash_init(&spi_flash);
#ifdef CFG_MMC_I2C_MASTER
/* init BMC master I2C bus */
master_i2c_init(MASTER_BUS_I2C);
#endif
/* init EEPROM file system */
//spi_eeprom_init(&spi_eeprom);
#ifdef CFG_FS
if (fs_init(&efs, &spi_eeprom) != 0)
{
uart_printf("\nEEPROM not accesable!\n");
/* reboot bmc */
lpc_watchdog_start(CFG_BL_WATCHDOG_TIMEOUT, WD_RESET_MODE);
while (1);
}
#endif
/* init leds */
//led_init();
#ifndef CFG_ONCHIP_FLASH_GLOBAL_CONF
/* check EEPROM areas */
//eeprom_integrity_check_areas();
#endif
/* init CLI (and debug console) */
cli_uart_init(115200);
/* handle reset type warm/cold? */
//fru_handle_reset_type();
#ifdef CFG_CM
cm_fru_get_last_known_state();
#endif
#ifdef CFG_EXT_INT
/* init external interrupts */
external_interrupt_init();
#endif
#ifdef CFG_HELPER
/* init the helper task */
helper_init();
#endif
#ifdef CFG_BIOS_FLASH
/* init BIOS FLASH */
spi_flash_init(&bios_flash);
/* init FPGA BIOS flash selection */
bios_restore_active_flash_from_eeprom();
#endif
/* CUSTOM BOARD INIT CODE LOCATION 2 */
//custom_init_2();
/* get global configuration from EEPROM */
global_config();
/* CUSTOM BOARD INIT CODE LOCATION 3 */
//custom_init_3();
/* parse FRU */
fru_init(0);
#if defined (CFG_CM) || defined (CFG_MMC) || defined (CFG_IRTM) || defined(CFG_MCMC)
/* init the IPMB-L interface(s) */
ipmbl_init();
#endif
#ifdef CFG_LAN
/* read and set ncsi mac address from fru */
custom_set_ncsi_mac();
#endif
/* create message pool for IPMI messages */
message_pool_init();
/* init board task */
board_init();
/* init the BMC task */
bmc_init();
#ifdef CFG_PI_SERIAL_BASIC
/* init the payload interface */
pi_uart_b_init(CFG_PI_PORT_RATE);
#endif /* CFG_PI_SERIAL_BASIC */
#ifdef CFG_PI_SERIAL_TERMINAL
/* init the payload interface */
pi_uart_t_init(CFG_PI_PORT_RATE);
#endif /* CFG_PI_SERIAL_TERMINAL */
#ifdef CFG_PI_KCS
/* initialise kcs interface */
kcs_init();
#endif /* CFG_PI_KCS */
#ifdef CFG_ATCA
if (global_conf.operation_mode == OPERATION_MODE_STANDALONE)
{
/* configure IPMB-A and IPMB-B as master only in stanalone mode */
master_i2c_init(IPMB0A_I2C);
master_i2c_init(IPMB0B_I2C);
/* enable IPMB-0 pull ups and buffer */
ipmb0_bus_ctrl(IPMB0_A, IPMB_ENABLE);
ipmb0_bus_ctrl(IPMB0_B, IPMB_ENABLE);
}
else
{
/* init the IPMB-0 interface */
ipmb0_init();
}
#endif
#ifdef CFG_LAN_PLUS
sol_init();
#endif
#ifdef CFG_LAN
/* init ethernet hardware and Task */
eth_start();
#endif
/* init the SDR task */
/* PORT_NOTE: Needs to be started AFTER BMC task because of Semaphore dependency */
sdr_init();
/* parse all PICMG Records in FRU data and store relevant information */
//fru_parse_picmg();
/* init the IPMI message hub */
msg_hub_init();
/* init the event task */
event_init();
#ifdef CFG_CM
/* init the CM task */
init_cm();
#endif
#ifdef CFG_COOLING_MANAGER
cool_init();
#endif
/* do all post tests */
//post_test();
/* needs to be done after sdr initialization */
//hpm_check_bl_flags();
#ifdef CFG_BIOS_FLASH
/* collect BIOS/NVRAM version info (if payload power is off) */
if (!(signal_read(&sig_payload_power_enable)))
{
bios_redundancy_get_versions();
}
#endif
#ifdef CFG_WATCHDOG
/* start the FW watchdog */
lpc_watchdog_start(CFG_FW_WATCHDOG_TIMEOUT, WD_RESET_MODE);
#endif
/* set desired debug output mode before starting scheduler */
global_debug_uart_enabled = CFG_GLOBAL_DEBUG_UART;
/* all tasks have been initialized, start the scheduler */
vTaskStartScheduler();
/* Should never reach here! */
while (1);
}
int My_boot_main()
{
//unsigned char buff[2048];
int num;
#ifdef MMU_ON
mmu_init();
#endif
led_init();
button_init();
init_irq();
uart_init();
ts_init();
//lcd_init();
//lcd_test();
dm9000_init();
while(1)
{
printf("\n**********************************************\n\r");
printf("\n*******************My-boot********************\n\r");
printf("[1], Download Linux Kernel from TFTP Server!\n\r");
printf("[2], Boot Linux from RAM!\n\r");
printf("[3], Boot Linux from Nand Flash\n\r");
printf("\n Please Select:");
int num;
scanf("%d", &num);
switch (num)
{
case 1:
//tftp_load();
tftp_send_request("start.o");
break;
case 2:
//boot_linux_ram();
//arp_request();
boot_linux();
break;
case 3:
//boot_linux_nand();
arp_request();
break;
default:
printf("Error: wrong selection!\n\r");
break;
}
return 0;
}
}