// Execute an instruction cycle
// Fetch an instruction
// Decode the instruction opcode
// Execute the instruction
//
void instruction_cycle(CPU *cpu) {
// Get current instruction to execute and its location,
// echo them out.
//
Address old_pc = cpu->pgm_counter;
fetch_instr(cpu);
printf("x%04hX: x%04hX \n", old_pc, cpu->instr_reg);
// Execute instruction; set halt = 1 if execution is to stop
// (TRAP HALT or internal error).
//
switch (op(cpu->instr_reg)) {
case 0: instr_BR(cpu); break;
case 1: instr_ADD(cpu); break;
case 2: instr_LD(cpu); break;
case 3: instr_ST(cpu); break;
case 4: instr_JSR(cpu); break;
case 5: instr_AND(cpu); break;
case 6: instr_LDR(cpu); break;
case 7: instr_STR(cpu); break;
case 8: instr_RTI(cpu); break;
case 9: instr_NOT(cpu); break;
case 10: instr_LDI(cpu); break;
case 11: instr_STI(cpu); break;
case 12: instr_RTI(cpu); break;
case 13: instr_STI(cpu); break;
case 14: instr_LEA(cpu); break;
case 15: instr_TRAP(cpu); break;
default: printf("Bad opcode: %d; quitting\n", op(cpu->instr_reg)); cpu->running = 0; break;
}
}
// Execute an instruction cycle
// Fetch an instruction
// Decode the instruction opcode
// Execute the instruction
//
void instruction_cycle(CPU *cpu) {
// Get current instruction to execute and its loc,
// echo them out.
//
Address old_pc = cpu->pgm_counter;
fetch_instr(cpu);
printf("x%04hX: x%04hX ", old_pc, cpu->instr_reg);
// Execute instruction; set cpu running = 0 if CPU execution
// is to stop (because of TRAP HALT or an internal error).
//
//>>>>>>>>>>>>>>>>SWITCH CASE MUST BE EDITED Compliar error
switch (cpu->instr_reg) {
case 0: instr_BR(cpu); break;
case 1: instr_ADD(cpu); break;
case 2: instr_LD(cpu); break;
case 3: instr_ST(cpu); break;
case 4: instr_JSR(cpu); break;
case 5: instr_AND(cpu); break;
case 6: instr_LDR(cpu); break;
case 7: instr_STR(cpu); break;
case 8: instr_RTI(cpu); break;
case 9: instr_NOT(cpu); break;
case 10: instr_LDI(cpu); break;
case 11: instr_STI(cpu); break;
case 12: instr_RTI(cpu); break;
case 13: instr_STI(cpu); break;
case 14: instr_LEA(cpu); break;
case 15: instr_TRAP(cpu); break;
default: printf("Bad opcode: %d; quitting\n", op(cpu->instr_reg)); cpu->running = 0; break;
}
}
// Execute an instruction cycle
// Fetch an instruction
// Decode the instruction opcode
// Execute the instruction
//
void instruction_cycle(CPU *cpu)
{
// Get current instruction to execute and its location,
// echo them out.
//
Address old_pc = cpu->pgm_counter;
fetch_instr(cpu);
printf("x%04hX: x%04hX ", old_pc, cpu->instr_reg);
// Execute instruction; set halt = 1 if execution is to stop
// (TRAP HALT or internal error).
//
switch ((cpu->instr_reg)) // ** Note ** place "op(cpu->instr_reg))"
{
case 0:
instr_BR(cpu);
break;
default:
printf("Bad opcode: %d; quitting\n", (cpu->instr_reg)); // ** Note ** place "op(cpu->instr_reg))"
cpu->running = 0;
}
}
void instruction_cycle(CPU *cpu, int order)
{
// Get current instruction to execute and its location,
// echo them out.
//
Address old_pc = cpu->memory[cpu->pgm_counter+1]; // OLD: cpu->pgm_counter
fetch_instr(cpu);
int op_code = 0;
u_reg = ((unsigned short int)(cpu->instr_reg));
op_code = u_reg/4096;
unsigned short movement1 = (old_pc << 4);
unsigned short movement2 = (old_pc << 7);
unsigned short movement3 = (old_pc << 12);
unsigned short movement4 = (old_pc << 7);
unsigned short movement5 = (old_pc << 13);
Commands.opCode = (old_pc >> 12); // Finished
Commands.intRest = (old_pc << 8); // Finished
Commands.trap = (Commands.intRest >> 8); // Finished
Commands.NZP = (movement1 >> 13);
Commands.offset = (movement2 >> 7);
Commands.last = (movement3 >> 12);
Commands.Src1 = (movement4 >> 6);
Commands.Src2 = (movement5 >> 13);
/* Tests
Output bit shifts
printf("\nShowing whats in memory, dividing integers:\n\n");
printf("First Hex: %hX\n", Commands.opCode);
printf("Second Hex: %hX\n", Commands.intSecond);
//printf("Remaining Hex: %hX\n", intRest);
printf("NZP value: %hX\n", Commands.NZP);
printf("offset value: %hX\n", Commands.offset);
printf("Trap value (last 2 digits): %hX\n", Commands.trap);
printf("Last value: %hX\n", Commands.last);
*/
// Execute instruction; set halt = 1 if execution is to stop
// (TRAP HALT or internal error).
//
switch ((Commands.opCode)) // ** Note ** place "op(cpu->instr_reg))"
{
case 0:
if (Commands.NZP > 0){
// Command loop that accounts for P and Z
// Removed because of the lack of time
/*if(Commands.NZP == 2){
printf("BRZ 3, CC = P, no go to\n");
//cpu->pgm_counter--;
}
else{ */
order ++;
printf("x%04X: x%04hX ", order, old_pc); // print location
cpu->pgm_counter = cpu->pgm_counter + Commands.last;
printf("BR %d, CC = Z, go to x%04X+%d = x%04X\n", Commands.last, order, (signed short)Commands.last, (order + Commands.last));
order = order + Commands.last;
}
else{
instr_BR(cpu);
}
break;
case 1:
printf("x%04X: x%04hX ", order, old_pc);
instr_ADD(cpu);
break;
case 2:
printf("x%04X: x%04hX ", order, old_pc);
instr_LD(cpu, order);
break;
case 3:
printf("x%04X: x%04hX ", order, old_pc);
instr_ST(cpu, order);
break;
case 4:
printf("x%04X: x%04hX ", order, old_pc);
instr_JSR(cpu);
break;
case 5:
printf("x%04X: x%04hX ", order, old_pc);
instr_AND(cpu);
break;
case 6:
printf("x%04X: x%04hX ", order, old_pc);
instr_LDR(cpu);
break;
case 7:
printf("x%04X: x%04hX ", order, old_pc);
instr_STR(cpu);
break;
case 8:
printf("x%04X: x%04hX ", order, old_pc);
instr_RTI(cpu);
break;
case 9:
printf("x%04X: x%04hX ", order, old_pc);
instr_NOT(cpu);
break;
case 10:
printf("x%04X: x%04hX ", order, old_pc);
instr_LDI(cpu);
break;
case 11:
printf("x%04X: x%04hX ", order, old_pc);
instr_STI(cpu);
break;
case 12:
printf("x%04X: x%04hX ", order, old_pc);
instr_JMP(cpu);
break;
case 13:
printf("x%04X: x%04hX ", order, old_pc);
instr_err(cpu);
break;
case 14:
printf("x%04X: x%04hX ", order, old_pc);
instr_LEA(cpu, order);
break;
case 15:
printf("x%04X: x%04hX ", order, old_pc);
instr_TRAP(cpu);
break;
default:
printf("Bad opcode: %d; quitting\n", (Commands.opCode)); // ** Note ** place "op(cpu->instr_reg))"
cpu->running = 0;
}
old_pc++;
}