static void cpu_porta_install(void)
{
uint32_t i;
DEV_GPIO_PTR port_ptr = &cpu_port_a;
DEV_GPIO_INFO_PTR info_ptr = &(cpu_port_a.gpio_info);
DW_GPIO_PORT_PTR dw_port_ptr = &(cpu_dw_gpio_port_a);
info_ptr->gpio_ctrl = (void *)dw_port_ptr;
info_ptr->opn_cnt = 0;
info_ptr->method = 0;
info_ptr->direction = 0;
info_ptr->extra = 0;
dw_port_ptr->no = DW_GPIO_PORT_A;
dw_port_ptr->regs = (DW_GPIO_REG_PTR)(HSDC_GPIO_REGBASE);
dw_port_ptr->valid_bit_mask = HSDK_CPU_GPIO_A_VALID_MASK;
dw_port_ptr->intno = DW_GPIO_INVALID_INTNO; /* pass invalid interrupt number */
dw_port_ptr->int_handler = cpu_porta_isr;
for (i=0; i < cpu_dw_gpio_bit_isr_a.int_bit_max_cnt; i++) {
int_handler_install(HSDC_GPIO0_ISR + i, cpu_porta_isr);
int_disable(HSDC_GPIO0_ISR + i);
cpu_dw_gpio_bit_isr_a.int_bit_handler_ptr[i] = NULL;
}
dw_port_ptr->gpio_bit_isr = &cpu_dw_gpio_bit_isr_a;
port_ptr->gpio_open = cpu_porta_open;
port_ptr->gpio_close = cpu_porta_close;
port_ptr->gpio_control = cpu_porta_control;
port_ptr->gpio_write = cpu_porta_write;
port_ptr->gpio_read = cpu_porta_read;
}
/* ----------------------------------------------------------------------------*/
static void prvSetupTimerInterrupt(void)
{
unsigned int cyc = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
int_disable(BOARD_OS_TIMER_INTNO); /* disable os timer interrupt */
timer_stop(BOARD_OS_TIMER_ID);
timer_start(BOARD_OS_TIMER_ID, TIMER_CTRL_IE | TIMER_CTRL_NH, cyc);
int_handler_install(BOARD_OS_TIMER_INTNO, (INT_HANDLER)vKernelTick);
int_enable(BOARD_OS_TIMER_INTNO);
}
/**
* \brief enable designware spi interrupt
* \param spi_info_ptr spi information structure pointer
*/
static void dw_spi_enable_interrupt(DEV_SPI_INFO *spi_info_ptr)
{
DW_SPI_CTRL *spi_ctrl_ptr = (DW_SPI_CTRL *)(spi_info_ptr->spi_ctrl);
if (spi_ctrl_ptr->intno != DW_SPI_INVALID_INTNO) {
int_handler_install(spi_ctrl_ptr->intno, spi_ctrl_ptr->dw_spi_int_handler);
spi_ctrl_ptr->int_status |= DW_SPI_GINT_ENABLE;
/** enable spi interrupt */
int_enable(spi_ctrl_ptr->intno);
} else {
spi_ctrl_ptr->int_status |= DW_SPI_GINT_ENABLE;
}
}
int rt_hw_timer_init(void)
{
unsigned int cyc = BOARD_CPU_CLOCK / RT_TICK_PER_SECOND;
int_disable(BOARD_OS_TIMER_INTNO); /* disable os timer interrupt */
arc_timer_stop(BOARD_OS_TIMER_ID);
arc_timer_start(BOARD_OS_TIMER_ID, TIMER_CTRL_IE | TIMER_CTRL_NH, cyc);
int_handler_install(BOARD_OS_TIMER_INTNO, (INT_HANDLER)rt_hw_timer_isr);
int_enable(BOARD_OS_TIMER_INTNO);
return 0;
}
/**
* \brief call FreeRTOS API, create and start tasks
*/
int main(void)
{
EMBARC_PRINTF("Benchmark CPU Frequency: %d Hz\r\n", BOARD_CPU_CLOCK);
EMBARC_PRINTF("Benchmark will run %d times, please wait about %d ms\r\n", MAX_SAMPLES, (TASK_DELAY_MS*MAX_SAMPLES));
// Register interrupts
int_handler_install(SWI_INTNO, (EXC_HANDLER)soft_interrupt);
//int_pri_set(SWI_INTNO, INT_PRI_MIN);
int_enable(SWI_INTNO);
exc_handler_install(EXC_NO_TRAP, trap_exception); /*!< install the exception handler */
vTaskSuspendAll();
// Create Tasks
if (xTaskCreate(task1, "task1", 128, (void *)1, TSK_PRIOR_LO, &task1_handle)
!= pdPASS) { /*!< FreeRTOS xTaskCreate() API function */
EMBARC_PRINTF("create task1 error\r\n");
return -1;
}
if (xTaskCreate(task2, "task2", 128, (void *)2, TSK_PRIOR_HI, &task2_handle)
!= pdPASS) { /*!< FreeRTOS xTaskCreate() API function */
EMBARC_PRINTF("create task2 error\r\n");
return -1;
}
// Create Mutex
mux1_id = xSemaphoreCreateMutex();
// Create Semaphores
sem1_id = xSemaphoreCreateBinary();
xSemaphoreGive(sem1_id);
// Create Events
evt1_cb = xEventGroupCreate();
// Create Queues
dtq1_id = xQueueCreate(1, sizeof(uint32_t));
xTaskResumeAll();
vTaskSuspend(NULL);
vTaskSuspend(NULL);
return 0;
}
/**
* \brief open a designware spi device
* \param[in] spi_obj spi object pointer
* \param[in] mode spi working mode (master or slave)
* \param[in] param parameter, for master, param is the freq, for slave, param is dfs
* \retval E_OK Open successfully without any issues
* \retval E_OPNED If device was opened before with different parameters,
* then just increase the \ref dev_spi_info::opn_cnt "opn_cnt" and return \ref E_OPNED
* \retval E_OBJ Device object is not valid
* \retval E_SYS Device is opened for different mode before, if you want to open it with different mode, you need to fully close it first.
* \retval E_PAR Parameter is not valid
* \retval E_NOSPT Open settings are not supported
*/
int32_t dw_spi_open (DEV_SPI *spi_obj, uint32_t mode, uint32_t param)
{
int32_t ercd = E_OK;
uint32_t param2check;
uint32_t clk_mode, dfs_val;
uint32_t support_modes;
DEV_SPI_INFO *spi_info_ptr = &(spi_obj->spi_info);
/* START ERROR CHECK */
VALID_CHK_SPI_INFO_OBJECT(spi_info_ptr);
DW_SPI_CHECK_EXP((mode==DEV_MASTER_MODE)||(mode==DEV_SLAVE_MODE), E_PAR);
if (mode == DEV_SLAVE_MODE) { /* clock mode should be in the enum structure */
DW_SPI_CHECK_EXP((param>=SPI_CPOL_0_CPHA_0) && (param<=SPI_CPOL_1_CPHA_1), E_PAR);
} else { /* frequence should > 0 */
DW_SPI_CHECK_EXP(param>0, E_PAR);
}
/* END OF ERROR CHECK */
DW_SPI_CTRL *spi_ctrl_ptr = (DW_SPI_CTRL_PTR)(spi_info_ptr->spi_ctrl);
/* Check supported modes, master or slave */
support_modes = spi_ctrl_ptr->support_modes;
DW_SPI_CHECK_EXP( (((support_modes)&DW_SPI_MASTER_SUPPORTED)&&(mode == DEV_MASTER_MODE)) || \
(((support_modes)&DW_SPI_SLAVE_SUPPORTED)&&(mode == DEV_SLAVE_MODE)), E_NOSPT);
/** Check opened before use case */
if (spi_info_ptr->opn_cnt > 0) {
if (mode != spi_info_ptr->mode) {
/* current working mode is different from passing mode */
return E_SYS;
}
if (mode == DEV_MASTER_MODE) { /* param is freq when as master */
param2check = spi_info_ptr->freq;
} else { /* param is clk_mode when as slave */
param2check = spi_info_ptr->clk_mode;
}
spi_info_ptr->opn_cnt ++;
if (param != param2check) { /* open with different speed mode */
return E_OPNED;
} else {
return E_OK;
}
}
/* auto increase open count */
spi_info_ptr->opn_cnt ++;
/* Do FIFO Length get before init */
#if DW_SPI_CALC_FIFO_LEN_ENABLE
spi_ctrl_ptr->tx_fifo_len = dw_spi_get_txfifo_len(spi_ctrl_ptr->dw_spi_regs);
spi_ctrl_ptr->rx_fifo_len = dw_spi_get_rxfifo_len(spi_ctrl_ptr->dw_spi_regs);
#endif
/* hardware init */
spi_info_ptr->mode = mode;
clk_mode = SPI_CLK_MODE_DEFAULT;
dfs_val = SPI_DFS_DEFAULT;
if (mode == DEV_SLAVE_MODE) {
clk_mode = param;
}
spi_info_ptr->dfs = dfs_val;
spi_info_ptr->clk_mode = clk_mode;
dw_spi_hw_init(spi_ctrl_ptr, clk_mode, dfs_val);
if (mode == DEV_MASTER_MODE) { /* Deselect all slaves, and set frequence */
dw_spi_deselect_slave(spi_ctrl_ptr->dw_spi_regs, 0);
dw_spi_set_freq(spi_ctrl_ptr, param);
spi_info_ptr->freq = param;
}
spi_info_ptr->status = DEV_ENABLED;
spi_info_ptr->extra = NULL;
spi_info_ptr->slave = SPI_SLAVE_NOT_SELECTED;
spi_info_ptr->dummy = 0xff;
spi_ctrl_ptr->int_status = 0;
dw_spi_init_transfer(spi_ctrl_ptr, NULL, dfs_val);
/** install spi interrupt into system */
dw_spi_disable_interrupt(spi_info_ptr);
if (spi_ctrl_ptr->intno != DW_SPI_INVALID_INTNO) {
int_handler_install(spi_ctrl_ptr->intno, spi_ctrl_ptr->dw_spi_int_handler);
}
memset(&(spi_info_ptr->xfer), 0, sizeof(DEV_SPI_TRANSFER));
memset(&(spi_info_ptr->spi_cbs), 0, sizeof(DEV_SPI_CBS));
error_exit:
return ercd;
}
