INLINE UINT16 RDPORT_W(int mode, UINT16 addr)
{
if( mode == 0 )
{
return io_read_byte_8((UINT16)(addr)) +
(io_read_byte_8((UINT16)(addr+1)) << 8);
}
else
{
/* how to handle MMU reads? */
return 0x0000;
}
}
INLINE UINT8 RDPORT_B(int mode, UINT16 addr)
{
if( mode == 0 )
{
return io_read_byte_8(addr);
}
else
{
/* how to handle MMU reads? */
return 0x00;
}
}
UINT8 h8_register_read8(UINT32 address)
{
UINT8 val;
UINT8 reg;
address &= 0xffffff;
reg = address & 0xff;
if(reg >= 0x60 && reg <= 0x9f)
{
return h8_itu_read8(reg);
}
else
{
switch(reg)
{
case 0xb4: // serial port A status
val = h8.per_regs[reg];
val |= 0xc4; // transmit finished, receive ready, no errors
break;
case 0xb5: // serial port A receive
val = io_read_byte(H8_SERIAL_A);
break;
case 0xbc: // serial port B status
val = h8.per_regs[reg];
val |= 0xc4; // transmit finished, receive ready, no errors
break;
case 0xbd: // serial port B receive
val = io_read_byte(H8_SERIAL_B);
break;
case 0xe0:
val = io_read_byte_8(H8_ADC_0_H);
break;
case 0xe1:
val = io_read_byte_8(H8_ADC_0_L);
break;
case 0xe2:
val = io_read_byte_8(H8_ADC_1_H);
break;
case 0xe3:
val = io_read_byte_8(H8_ADC_1_L);
break;
case 0xe4:
val = io_read_byte_8(H8_ADC_2_H);
break;
case 0xe5:
val = io_read_byte_8(H8_ADC_2_L);
break;
case 0xe6:
val = io_read_byte_8(H8_ADC_3_H);
break;
case 0xe7:
val = io_read_byte_8(H8_ADC_3_L);
break;
case 0xe8: // adc status
val = 0x80;
break;
case 0xc7: // port 4 data
val = io_read_byte_8(H8_PORT4);
break;
case 0xcb: // port 6 data
val = io_read_byte_8(H8_PORT6);
break;
case 0xce: // port 7 data
val = io_read_byte_8(H8_PORT7);
break;
case 0xcf: // port 8 data
val = io_read_byte_8(H8_PORT8);
break;
case 0xd2: // port 9 data
val = io_read_byte_8(H8_PORT9);
break;
case 0xd3: // port a data
val = io_read_byte_8(H8_PORTA);
break;
case 0xd6: // port b data
val = io_read_byte_8(H8_PORTB);
break;
default:
val = h8.per_regs[reg];
break;
}
}
return val;
}
