void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
{
/* Sanity check arguments */
MBED_ASSERT(obj);
if(FlowControlNone == type) {
/* Disable Hardware Handshaking. */
_USART(obj)->US_MR = (_USART(obj)->US_MR & ~US_MR_USART_MODE_Msk) | US_MR_USART_MODE_NORMAL;
return;
}
/*To determine the uart peripheral associated with pins*/
UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS);
UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS);
UARTName uart = (UARTName)pinmap_merge(uart_cts, uart_rts);
MBED_ASSERT(uart != (UARTName)NC);
if((FlowControlCTS == type) || (FlowControlRTSCTS== type)) {
/* Configure CTS pin. */
pin_function(txflow, pinmap_find_function(txflow, PinMap_UART_CTS));
ioport_disable_pin(txflow);
}
if((FlowControlRTS == type) || (FlowControlRTSCTS== type)) {
/* Configure CTS pin. */
pin_function(rxflow, pinmap_find_function(rxflow, PinMap_UART_RTS));
ioport_disable_pin(rxflow);
}
/* Set hardware handshaking mode. */
_USART(obj)->US_MR = (_USART(obj)->US_MR & ~US_MR_USART_MODE_Msk) | US_MR_USART_MODE_HW_HANDSHAKING;
}
/** Initialize the SPI peripheral
*
* Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
* @param[out] obj The SPI object to initialize
* @param[in] mosi The pin to use for MOSI
* @param[in] miso The pin to use for MISO
* @param[in] sclk The pin to use for SCLK
*/
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk)
{
MBED_ASSERT(obj);
MBED_ASSERT(mosi !=NC && miso!=NC && sclk !=NC );
if (g_sys_init == 0) {
sysclk_init();
system_board_init();
g_sys_init = 1;
}
Spi *sercombase = pinmap_find_sercom(mosi,miso,sclk);
MBED_ASSERT(sercombase!=NC);
pinmap_find_spi_info(sercombase, obj);
MBED_ASSERT(obj->spi.flexcom!=NC);
MBED_ASSERT(obj->spi.pdc!=NC);
/* Configure SPI pins */
pin_function(mosi, pinmap_find_function(mosi, PinMap_SPI_MOSI));
ioport_disable_pin(mosi);
pin_function(miso, pinmap_find_function(miso, PinMap_SPI_MISO));
ioport_disable_pin(miso);
pin_function(sclk, pinmap_find_function(sclk, PinMap_SPI_SCLK));
ioport_disable_pin(sclk);
#if (SAMG55)
/* Enable the peripheral and set SPI mode. */
flexcom_enable(obj->spi.flexcom);
flexcom_set_opmode(obj->spi.flexcom, FLEXCOM_SPI);
#else
/* Configure an SPI peripheral. */
spi_enable_clock(sercombase);
#endif
spi_disable(sercombase);
spi_reset(sercombase);
spi_set_lastxfer(sercombase);
spi_set_master_mode(sercombase);
spi_disable_mode_fault_detect(sercombase);
spi_set_peripheral_chip_select_value(sercombase, SPI_CHIP_SEL);
spi_set_clock_polarity(sercombase, SPI_CHIP_SEL, SPI_CLK_POLARITY);
spi_set_clock_phase(sercombase, SPI_CHIP_SEL, SPI_CLK_PHASE);
spi_set_bits_per_transfer(sercombase, SPI_CHIP_SEL, SPI_CSR_BITS_8_BIT);
spi_set_baudrate_div(sercombase, SPI_CHIP_SEL,(sysclk_get_cpu_hz() / gSPI_clock));
spi_set_transfer_delay(sercombase, SPI_CHIP_SEL, SPI_DLYBS,SPI_DLYBCT);
spi_enable(sercombase);
pdc_disable_transfer(obj->spi.pdc, PERIPH_PTCR_RXTDIS | PERIPH_PTCR_TXTDIS);
obj->spi.spi_base=sercombase;
obj->spi.cs= SPI_CHIP_SEL;
obj->spi.polarity=SPI_CLK_POLARITY;
obj->spi.phase=SPI_CLK_PHASE;
obj->spi.transferrate=SPI_CSR_BITS_8_BIT;
obj->spi.is_slave=0;
}
/*
* @fn nm_bus_init
* @brief Initialize the bus wrapper
* @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
*/
sint8 nm_bus_init(void *pvinit)
{
sint8 result = M2M_SUCCESS;
#ifdef CONF_WINC_USE_I2C
twihs_options_t opt;
/* Enable the peripheral clock for TWI */
pmc_enable_periph_clk(CONF_WINC_I2C_ID);
/* Configure the options of TWI driver */
opt.master_clk = sysclk_get_peripheral_hz();
opt.speed = CONF_WINC_TWIHS_CLOCK;
if (twihs_master_init(CONF_WINC_I2C, &opt) != TWIHS_SUCCESS) {
M2M_ERR("-E-\tTWI master initialization failed.\r");
while (1) {
/* Capture error */
}
}
#elif CONF_WINC_USE_SPI
/* Configure SPI pins. */
ioport_set_pin_mode(CONF_WINC_SPI_MISO_GPIO, CONF_WINC_SPI_MISO_FLAGS);
ioport_set_pin_mode(CONF_WINC_SPI_MOSI_GPIO, CONF_WINC_SPI_MOSI_FLAGS);
ioport_set_pin_mode(CONF_WINC_SPI_CLK_GPIO, CONF_WINC_SPI_CLK_FLAGS);
ioport_set_pin_mode(CONF_WINC_SPI_CS_GPIO, CONF_WINC_SPI_CS_FLAGS);
ioport_disable_pin(CONF_WINC_SPI_MISO_GPIO);
ioport_disable_pin(CONF_WINC_SPI_MOSI_GPIO);
ioport_disable_pin(CONF_WINC_SPI_CLK_GPIO);
ioport_disable_pin(CONF_WINC_SPI_CS_GPIO);
spi_enable_clock(CONF_WINC_SPI);
spi_disable(CONF_WINC_SPI);
spi_reset(CONF_WINC_SPI);
spi_set_master_mode(CONF_WINC_SPI);
spi_disable_mode_fault_detect(CONF_WINC_SPI);
spi_set_peripheral_chip_select_value(CONF_WINC_SPI, CONF_WINC_SPI_NPCS);
spi_set_clock_polarity(CONF_WINC_SPI,
CONF_WINC_SPI_NPCS, CONF_WINC_SPI_POL);
spi_set_clock_phase(CONF_WINC_SPI, CONF_WINC_SPI_NPCS, CONF_WINC_SPI_PHA);
spi_set_bits_per_transfer(CONF_WINC_SPI, CONF_WINC_SPI_NPCS, SPI_CSR_BITS_8_BIT);
spi_set_baudrate_div(CONF_WINC_SPI, CONF_WINC_SPI_NPCS,
(sysclk_get_cpu_hz() / CONF_WINC_SPI_CLOCK));
spi_set_transfer_delay(CONF_WINC_SPI, CONF_WINC_SPI_NPCS, CONF_WINC_SPI_DLYBS,
CONF_WINC_SPI_DLYBCT);
spi_enable(CONF_WINC_SPI);
nm_bsp_reset();
#endif
return result;
}
/**
* \brief Configure SPI
*/
void epd_spi_init(void) {
sysclk_enable_peripheral_clock(EPD_SPI_ID);
gpio_configure_pin(EPD_SPI_MISO_PIN, EPD_SPI_MISO_MUX);
ioport_disable_pin(EPD_SPI_MISO_PIN); // Disable IO (but enable peripheral mode)
gpio_configure_pin(EPD_SPI_MOSI_PIN, EPD_SPI_MOSI_MUX);
ioport_disable_pin(EPD_SPI_MOSI_PIN); // Disable IO (but enable peripheral mode)
gpio_configure_pin(EPD_SPI_CLK_PIN, EPD_SPI_CLK_MUX);
ioport_disable_pin(EPD_SPI_CLK_PIN); // Disable IO (but enable peripheral mode)
gpio_configure_pin(EPD_SPI_SS_PIN, IOPORT_INIT_HIGH | IOPORT_DIR_OUTPUT);
spi_master_init(EPD_SPI_ID);
spi_master_setup_device(EPD_SPI_ID, &epd_device_conf, SPI_MODE_0, EPD_SPI_baudrate, 0);
spi_enable(EPD_SPI_ID);
delay_ms(5);
}
/**
* \brief Configure to trigger AFEC by TIOA output of timer.
*/
static void configure_tc_trigger(void)
{
uint32_t ul_div = 0;
uint32_t ul_tc_clks = 0;
uint32_t ul_sysclk = sysclk_get_cpu_hz();
/* Enable peripheral clock. */
pmc_enable_periph_clk(ID_TC0);
/* TIOA configuration */
ioport_set_pin_mode(PIN_TC0_TIOA0, PIN_TC0_TIOA0_FLAGS);
ioport_disable_pin(PIN_TC0_TIOA0);
/* Configure TC for a 10Hz frequency and trigger on RC compare. */
tc_find_mck_divisor(10, ul_sysclk, &ul_div, &ul_tc_clks, ul_sysclk);
tc_init(TC0, 0, ul_tc_clks | TC_CMR_CPCTRG | TC_CMR_WAVE |
TC_CMR_ACPA_CLEAR | TC_CMR_ACPC_SET);
TC0->TC_CHANNEL[0].TC_RA = (ul_sysclk / ul_div) / 2;
TC0->TC_CHANNEL[0].TC_RC = (ul_sysclk / ul_div) / 1;
/* Start the Timer. */
tc_start(TC0, 0);
afec_set_trigger(AFEC0, AFEC_TRIG_TIO_CH_0);
}
static void _dbg_usart_pins_init(void)
{
#ifdef DBG_USART_PIN_EN
ioport_set_pin_dir(DBG_USART_PIN_EN, IOPORT_DIR_OUTPUT);
ioport_enable_pin(DBG_USART_PIN_EN);
ioport_set_pin_level(DBG_USART_PIN_EN, DBG_USART_PIN_EN_LEVEL);
#endif
#if defined(DBG_USART_PIN_TX)
ioport_set_pin_mode(DBG_USART_PIN_TX, DBG_USART_PIN_TX_MUX);
ioport_disable_pin(DBG_USART_PIN_TX);
#endif
#if defined(DBG_USART_PIN_RX)
ioport_set_pin_mode(DBG_USART_PIN_RX, DBG_USART_PIN_TX_MUX);
ioport_disable_pin(DBG_USART_PIN_RX);
#endif
}
static void setup_capture(void)
{
ioport_set_pin_mode(PIN_TC0_TIOA0, PIN_TC0_TIOA0_MUX);
ioport_disable_pin(PIN_TC0_TIOA0);
ioport_set_pin_mode(PIN_TC0_TIOA1, PIN_TC0_TIOA1_MUX);
ioport_disable_pin(PIN_TC0_TIOA1);
ioport_set_pin_mode(PIN_TC0_TIOB2, PIN_TC0_TIOB2_MUX);
ioport_disable_pin(PIN_TC0_TIOB2);
configure_tc_capture();
NVIC_DisableIRQ((IRQn_Type) ID_TC0);
NVIC_ClearPendingIRQ((IRQn_Type) ID_TC0);
NVIC_SetPriority((IRQn_Type) ID_TC0, 0);
NVIC_EnableIRQ((IRQn_Type) ID_TC0);
//tc_enable_interrupt(TC0, 0, TC_IER_ETRGS);
tc_enable_interrupt(TC0, 0, TC_IER_LDRAS);
tc_enable_interrupt(TC0, 0, TC_IER_LDRBS);
NVIC_DisableIRQ((IRQn_Type) ID_TC1);
NVIC_ClearPendingIRQ((IRQn_Type) ID_TC1);
NVIC_SetPriority((IRQn_Type) ID_TC1, 0);
NVIC_EnableIRQ((IRQn_Type) ID_TC1);
//tc_enable_interrupt(TC0, 1, TC_IER_ETRGS);
tc_enable_interrupt(TC0, 1, TC_IER_LDRAS);
tc_enable_interrupt(TC0, 1, TC_IER_LDRBS);
NVIC_DisableIRQ((IRQn_Type) ID_TC2);
NVIC_ClearPendingIRQ((IRQn_Type) ID_TC2);
NVIC_SetPriority((IRQn_Type) ID_TC2, 0);
NVIC_EnableIRQ((IRQn_Type) ID_TC2);
tc_enable_interrupt(TC0, 2, TC_IER_ETRGS);
tc_enable_interrupt(TC0, 2, TC_IER_LDRAS);
tc_enable_interrupt(TC0, 2, TC_IER_LDRBS);
tc_start(TC0, 0);
tc_start(TC0, 1);
tc_start(TC0, 2);
}
OSStatus platform_gpio_deinit( const platform_gpio_t* gpio )
{
OSStatus err = kNoErr;
platform_mcu_powersave_disable();
require_action_quiet( gpio != NULL, exit, err = kParamErr);
ioport_disable_pin( gpio->pin );
exit:
platform_mcu_powersave_enable();
return err;
}
/**
* \brief Main entry point for GPIO example.
*/
int main(void)
{
/* Initialize the SAM system */
sysclk_init();
board_init();
/* Initialize the console uart */
configure_console();
/* Output example information */
printf("\r\n\r\n-- GPIO interrupt and event example --\r\n");
printf("-- %s\r\n", BOARD_NAME);
printf("-- Compiled: %s %s --\r\n", __DATE__, __TIME__);
//! [config_button_0_trig_fall]
/* Configure push button 0 to trigger an interrupt on falling edge */
//! [config_button_0_trig_fall_1]
ioport_set_pin_dir(EXAMPLE_BUTTON_INT, IOPORT_DIR_INPUT);
ioport_set_pin_mode(EXAMPLE_BUTTON_INT, IOPORT_MODE_PULLUP |
IOPORT_MODE_GLITCH_FILTER);
ioport_set_pin_sense_mode(EXAMPLE_BUTTON_INT, IOPORT_SENSE_FALLING);
//! [config_button_0_trig_fall_1]
//! [config_button_0_trig_fall_2]
if (!gpio_set_pin_callback(EXAMPLE_BUTTON_INT, pb0_callback, 1)) {
printf("Set pin callback failure!\r\n");
while (1) {
}
}
//! [config_button_0_trig_fall_2]
//! [enable_pin_interrupt]
gpio_enable_pin_interrupt(EXAMPLE_BUTTON_INT);
//! [enable_pin_interrupt]
//! [config_button_0_trig_fall]
printf("Press %s to trigger LED.\r\n", BUTTON_0_NAME);
/* Configure pin to trigger an event on falling edge */
ioport_set_pin_mode(EXAMPLE_PIN_EVENT, IOPORT_MODE_PULLUP |
IOPORT_MODE_MUX_C);
ioport_disable_pin(EXAMPLE_PIN_EVENT);
ioport_set_pin_sense_mode(EXAMPLE_PIN_EVENT, IOPORT_SENSE_FALLING);
gpio_enable_pin_periph_event(EXAMPLE_PIN_EVENT);
printf("Connect %s to %s to trigger an event.\r\n", EXAMPLE_PIN_NAME,
EXAMPLE_GND_NAME);
init_pevc();
init_pdca();
while (1) {
}
}
int main(void)
{
sysclk_init();
board_init();
genclk_enable_config(GCLK_ID, GCLK_SOURCE, GCLK_DIV);
/* Enable GPIO Alternate to output GCLK */
ioport_set_pin_mode(GCLK_PIN, GCLK_FUNCTION);
ioport_disable_pin(GCLK_PIN);
while (1) {
/* Do nothing */
}
}
OSStatus platform_gpio_peripheral_pin_init( const platform_gpio_t* gpio, ioport_mode_t pin_mode )
{
OSStatus err = kNoErr;
platform_mcu_powersave_disable( );
require_action_quiet( gpio != NULL, exit, err = kParamErr);
/* Set pin mode and disable GPIO peripheral */
ioport_set_pin_mode( gpio->pin, pin_mode );
ioport_disable_pin( gpio->pin );
exit:
platform_mcu_powersave_enable();
return err;
}
OSStatus mico_gpio_finalize( mico_gpio_t gpio )
{
ioport_pin_t pin = 0;
if(gpio == (mico_gpio_t)MICO_GPIO_UNUSED ) return kUnsupportedErr;
mico_mcu_power_save_config(false);
pin = CREATE_IOPORT_PIN(gpio_mapping[gpio].bank, gpio_mapping[gpio].number);
ioport_disable_pin(pin);
mico_gpio_disable_IRQ( gpio );
mico_mcu_power_save_config(true);
return kNoErr;
}
/**
* \brief Initialize the clock system and output the CPU clock on pin
* PCK0 (please refer to datasheet for PIN number).
*
* \return Unused (ANSI-C compatibility).
*/
int main(void)
{
struct genclk_config gcfg;
sysclk_init();
board_init();
/* Configure specific CLKOUT pin */
ioport_set_pin_mode(GCLK_PIN, GCLK_PIN_MUX);
ioport_disable_pin(GCLK_PIN);
/* Configure the output clock */
genclk_config_defaults(&gcfg, GCLK_ID);
genclk_config_set_source(&gcfg, GCLK_SOURCE);
genclk_config_set_divider(&gcfg, GCLK_DIV);
genclk_enable(&gcfg, GCLK_ID);
while (1) {
/* Do nothing */
}
}
/**
* \brief Reset AT24CXX.
*
* Send 9 clock cycles to reset memory state.
*
* \note IO mode is used in this function, so it can be used even if TWI is not
* enabled.
*/
void at24cxx_reset(void)
{
uint32_t i;
/* MEM reset
* a) Clock up to 9 cycles (use 100K)
* b) look for SDA high in each cycle while SCL is high and then
* c) Create a start condition as SDA is high
*/
/* - Enable pin output mode */
ioport_set_pin_dir(BOARD_CLK_TWI_EEPROM, IOPORT_DIR_OUTPUT);
ioport_set_pin_level(BOARD_CLK_TWI_EEPROM, 1);
ioport_enable_pin(BOARD_CLK_TWI_EEPROM);
for (i = 0; i < 10; i ++) {
delay_us(5);
ioport_set_pin_level(BOARD_CLK_TWI_EEPROM, 0);
delay_us(5);
ioport_set_pin_level(BOARD_CLK_TWI_EEPROM, 1);
}
/* - Restore pin peripheral mode */
ioport_set_pin_mode(BOARD_CLK_TWI_EEPROM, BOARD_CLK_TWI_MUX_EEPROM);
ioport_disable_pin(BOARD_CLK_TWI_EEPROM);
/* - Start condition will do on R/W start */
}
void config_tccapture_freq(void){
/** Configure PIO Pins for TC */
ioport_set_pin_mode(PIN_TC0_TIOA2, PIN_TC0_TIOA2_MUX );
/** Disable I/O to enable peripheral mode) */
ioport_disable_pin(PIN_TC0_TIOA2);
sysclk_enable_peripheral_clock(ID_TC2);
tc_init(TC0, TC_CHANNEL_CAP_FREQ,
TC_CAPTURE_TCCLKS | // Clock Selection = MCLK/32 CLK3
TC_CMR_LDRA_RISING | // RA Loading = Rising edge of TIOA
TC_CMR_LDRB_FALLING | // RB Loading = Falling Edge of TIOA
TC_CMR_ABETRG | // External Trigger = TIOA
TC_CMR_ETRGEDG_FALLING // External Trigger Edge = Falling Edge
);
NVIC_DisableIRQ(TC2_IRQn);
NVIC_ClearPendingIRQ(TC2_IRQn);
NVIC_SetPriority(TC2_IRQn, PRIORITY_MEASURE);
NVIC_EnableIRQ(TC2_IRQn);
tc_enable_interrupt(TC0, TC_CHANNEL_CAP_FREQ, TC_IER_LDRBS);
tc_start(TC0, TC_CHANNEL_CAP_FREQ);
}
void config_tccapture_duty(void){
/** Configure PIO Pins for TC */
ioport_set_pin_mode(PIO_PC23_IDX, IOPORT_MODE_MUX_B );
/** Disable I/O to enable peripheral mode) */
ioport_disable_pin(PIO_PC23_IDX);
sysclk_enable_peripheral_clock(ID_TC3);
tc_init(TC1, TC_CHANNEL_CAP_DUTY,
TC_CAP_DUTY_TCCLKS | // Clock Selection = MCLK/32
TC_CMR_LDRA_RISING | // RA Loading = Rising edge of TIOA
TC_CMR_LDRB_FALLING | // RB Loading = Falling Edge of TIOA
TC_CMR_ABETRG | // External Trigger = TIOA
TC_CMR_ETRGEDG_FALLING // External Trigger Edge = Falling Edge
);
NVIC_DisableIRQ(TC3_IRQn);
NVIC_ClearPendingIRQ(TC3_IRQn);
NVIC_SetPriority(TC3_IRQn, PRIORITY_MEASURE);
NVIC_EnableIRQ(TC3_IRQn);
tc_enable_interrupt(TC1, TC_CHANNEL_CAP_DUTY, TC_IER_LDRBS);
tc_start(TC1, TC_CHANNEL_CAP_DUTY);
}
/**
* \brief Switch between various system clock sources and prescalers at
* run time.
*
* \return Unused (ANSI-C compatibility).
*/
int main(void)
{
struct genclk_config gcfg;
sysclk_init();
board_init();
/* Setup SysTick Timer for 1 msec interrupts */
if (SysTick_Config(SystemCoreClock / 1000)) {
while (1); // Capture error
}
/* Enable PIO module related clock */
sysclk_enable_peripheral_clock(PIN_PUSHBUTTON_1_ID);
/* Configure specific CLKOUT pin */
ioport_set_pin_mode(GCLK_PIN, GCLK_PIN_MUX);
ioport_disable_pin(GCLK_PIN);
/* Configure the output clock source and frequency */
genclk_config_defaults(&gcfg, GCLK_ID);
genclk_config_set_source(&gcfg, GENCLK_PCK_SRC_PLLACK);
genclk_config_set_divider(&gcfg, GENCLK_PCK_PRES_1);
genclk_enable(&gcfg, GCLK_ID);
while (1) {
/*
* Initial state.
*/
wait_for_switches();
/*
* Divide MCK frequency by 2.
*/
sysclk_set_prescalers(SYSCLK_PRES_2);
genclk_config_set_divider(&gcfg, GENCLK_PCK_PRES_2);
genclk_enable(&gcfg, GCLK_ID);
wait_for_switches();
#ifdef BOARD_NO_32K_XTAL
/*
* Switch to the slow clock with all prescalers disabled.
*/
sysclk_set_source(SYSCLK_SRC_SLCK_RC);
sysclk_set_prescalers(SYSCLK_PRES_1);
genclk_config_set_source(&gcfg, GENCLK_PCK_SRC_SLCK_RC);
genclk_config_set_divider(&gcfg, GENCLK_PCK_PRES_1);
genclk_enable(&gcfg, GCLK_ID);
osc_disable(OSC_MAINCK_XTAL);
wait_for_switches();
#endif
/*
* Switch to internal 8 MHz RC.
*/
/* Switch to slow clock before switch main clock */
sysclk_set_source(SYSCLK_SRC_SLCK_RC);
osc_enable(OSC_MAINCK_8M_RC);
osc_wait_ready(OSC_MAINCK_8M_RC);
sysclk_set_source(SYSCLK_SRC_MAINCK_8M_RC);
genclk_config_set_source(&gcfg, GENCLK_PCK_SRC_MAINCK_8M_RC);
genclk_enable(&gcfg, GCLK_ID);
wait_for_switches();
#if BOARD_FREQ_MAINCK_XTAL
/*
* Switch to external crystal (8MHz or 12MHz, depend on the board).
*/
osc_enable(OSC_MAINCK_XTAL);
osc_wait_ready(OSC_MAINCK_XTAL);
sysclk_set_source(SYSCLK_SRC_MAINCK_XTAL);
genclk_config_set_source(&gcfg, GENCLK_PCK_SRC_MAINCK_XTAL);
genclk_enable(&gcfg, GCLK_ID);
osc_disable(OSC_MAINCK_8M_RC);
wait_for_switches();
#endif
/*
* Go back to the initial state and start over.
*/
sysclk_init();
genclk_config_set_source(&gcfg, GENCLK_PCK_SRC_PLLACK);
genclk_config_set_divider(&gcfg, GENCLK_PCK_PRES_1);
genclk_enable(&gcfg, GCLK_ID);
}
}
/**
* Initialize the PDCA transfer for the example.
*/
static void init_pdca(void)
{
/* PDCA channel options */
static const pdca_channel_config_t pdca_tx_configs = {
.addr = (void *)event_string,
.pid = PDCA_PID_USART2_TX,
.size = sizeof(event_string),
.r_addr = 0,
.r_size = 0,
.ring = false,
.etrig = true,
.transfer_size = PDCA_MR_SIZE_BYTE
};
/* Enable PDCA module */
pdca_enable(PDCA);
/* Init PDCA channel with the pdca_options.*/
pdca_channel_set_config(PEVC_ID_USER_PDCA_0, &pdca_tx_configs);
/* Set callback for PDCA channel */
pdca_channel_set_callback(PEVC_ID_USER_PDCA_0, pdca_tranfer_done,
PDCA_0_IRQn, 1, PDCA_IER_TRC | PDCA_IER_TERR);
/* Enable PDCA channel */
pdca_channel_enable(PEVC_ID_USER_PDCA_0);
}
/**
* Configure serial console.
*/
static void configure_console(void)
{
const usart_serial_options_t uart_serial_options = {
.baudrate = CONF_UART_BAUDRATE,
#ifdef CONF_UART_CHAR_LENGTH
.charlength = CONF_UART_CHAR_LENGTH,
#endif
.paritytype = CONF_UART_PARITY,
#ifdef CONF_UART_STOP_BITS
.stopbits = CONF_UART_STOP_BITS,
#endif
};
/* Configure console. */
stdio_serial_init(CONF_UART, &uart_serial_options);
}
/**
* \brief Main entry point for event example.
*/
int main(void)
{
/* Initialize the SAM system */
sysclk_init();
board_init();
/* Initialize the console uart */
configure_console();
/* Output example information */
printf("\r\n\r\n-- Events example 2 --\r\n");
printf("-- %s\r\n", BOARD_NAME);
printf("-- Compiled: %s %s --\r\n", __DATE__, __TIME__);
/* Configure pin to trigger an enent on falling edge */
ioport_set_pin_mode(CONF_EXAMPLE_PIN_EVENT, IOPORT_MODE_PULLUP |
IOPORT_MODE_MUX_C);
ioport_disable_pin(CONF_EXAMPLE_PIN_EVENT);
ioport_set_pin_sense_mode(CONF_EXAMPLE_PIN_EVENT, IOPORT_SENSE_FALLING);
gpio_enable_pin_periph_event(CONF_EXAMPLE_PIN_EVENT);
printf(CONF_EXAMPLE_EVENT_MSG);
init_events();
init_pdca();
while (1) {
/* Toggle LED0 every 500 ms */
LED_Toggle(LED0);
delay_ms(500);
}
}
/**
* \brief Application entry point for pmc_clock switch example.
*
* \return Unused (ANSI-C compatibility).
*/
int main(void)
{
/* Initialize the SAM system */
sysclk_init();
board_init();
/* Initialize the console uart */
configure_console();
/* Output example information */
puts(STRING_HEADER);
/* Configure PCK */
ioport_set_pin_mode(GCLK_PIN, GCLK_PIN_MUX);
ioport_disable_pin(GCLK_PIN);
/* Configure the push button */
configure_buttons();
puts("-I- Press Button "BUTTON_NAME" to continue.\r\n");
/* Wait for UART transmit done */
while (!uart_is_tx_empty(CONF_UART)) {
};
for (gs_uc_wait_button = 1; gs_uc_wait_button;) {
}
puts("\n\r-I- Switch 8Mhz fast RC oscillator to be the source of the main clock \n\r"
"-I- The master clock is main clock divided by 2\n\r"
"-I- From now on, the UART baud rate is 2400bps. So please change the terminal setting before the next clock switch\r\n"
"-I- Press Button "BUTTON_NAME" to switch next clock configuration... \r\n");
/* Wait for UART transmit done */
while (!uart_is_tx_empty(CONF_UART)) {
};
/* First switch to slow clock */
pmc_switch_mck_to_sclk(PMC_MCKR_PRES_CLK_1);
#if (SAM3S || SAM4S || SAM4C)
/* Then cut the PLL B */
pmc_disable_pllbck();
#endif
/* Switch the mainck clock to the Fast RC, parameter '1' stands for 8Mhz */
pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_8_MHz);
/* And finalize by switching to Fast RC */
pmc_switch_mck_to_mainck(PMC_MCKR_PRES_CLK_2);
/* The clock source for the UART is the PCK, so the uart needs re-configuration */
config_uart_and_pck(PMC_PCK_CSS_MAIN_CLK, PMC_PCK_PRES_CLK_2,
(CHIP_FREQ_MAINCK_RC_8MHZ / 2));
for (gs_uc_wait_button = 1; gs_uc_wait_button;) {
}
puts("\n\r-I- Switch the XTAL 32K crystal oscillator to be the source of the slow clock\n\r"
"-I- The master clock is slow clock\n\r"
"-I- Press Button "BUTTON_NAME" to switch next clock configuration after it has been measured.\r\n");
/* Wait for UART transmit done */
while (!uart_is_tx_empty(CONF_UART)) {
};
/* Enable the External 32K oscillator */
pmc_switch_sclk_to_32kxtal(PMC_OSC_XTAL);
/* If a new value for CSS field corresponds to Main Clock or Slow Clock,
* program the CSS field first.
*/
pmc_switch_mck_to_sclk(PMC_MCKR_PRES_CLK_1);
/* The clock source for the UART is the PCK, so the uart needs
*re-configuration.
*/
config_uart_and_pck(PMC_PCK_CSS_SLOW_CLK, PMC_PCK_PRES_CLK_1,
BOARD_FREQ_SLCK_XTAL);
for (gs_uc_wait_button = 1; gs_uc_wait_button;) {
}
/* Switch the mainck to the Fast RC, parameter '2' stands for 12Mhz */
pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_12_MHz);
/* If a new value for CSS field corresponds to Main Clock or Slow Clock,
* program the CSS field first.
*/
pmc_switch_mck_to_mainck(PMC_PCK_PRES_CLK_1);
/* The clock source for the UART is the PCK, so the uart needs
* re-configuration.
*/
config_uart_and_pck(PMC_PCK_CSS_MAIN_CLK, PMC_PCK_PRES_CLK_1,
CHIP_FREQ_MAINCK_RC_12MHZ);
puts("\n\r-I- Switch 12Mhz fast RC oscillator to be the source of the main clock\n\r"
"-I- The master clock is the main clock\n\r"
"-I- Press Button "BUTTON_NAME" to switch next clock configuration after it has been measured.\r\n");
for (gs_uc_wait_button = 1; gs_uc_wait_button;) {
}
#if SAM4C
puts("-I- Switch to 8.192Mhz PLLA clock as the source of the master clock \n\r"
"-I- The master clock is PLLA clock divided by 2 \n\r"
"-I- Press Button "BUTTON_NAME" to switch next clock configuration... \r\n");
/* Wait for UART transmit done */
while (!uart_is_tx_empty(CONF_UART)) {
};
/* Enable the PLLA clock, the mainck equals 32.768K * 250 = 8.192Mhz */
pmc_enable_pllack((250 - 1), 0x3f, 1);
#else
puts("-I- Switch to 128Mhz PLLA clock as the source of the master clock \n\r"
"-I- The master clock is PLLA clock divided by 2 \n\r"
"-I- Press Button "BUTTON_NAME" to switch next clock configuration... \r\n");
/* Wait for UART transmit done */
while (!uart_is_tx_empty(CONF_UART)) {
};
/* Enable the PLLA clock, the mainck equals 12Mhz * (32-1+1) / 3 = 128Mhz */
pmc_enable_pllack((32 - 1), 0x3f, 3);
#endif
/* If a new value for CSS field corresponds to PLL Clock, Program the PRES
* field first.
*/
pmc_switch_mck_to_mainck(PMC_MCKR_PRES_CLK_2);
/* Delay for a while */
/* Wait for UART transmit done */
while (!uart_is_tx_empty(CONF_UART)) {
};
/* Then program the CSS field. */
pmc_switch_mck_to_pllack(PMC_MCKR_PRES_CLK_2);
/* The clock source for the UART is the PCK, so the uart needs
* re-configuration
*/
config_uart_and_pck(PMC_PCK_CSS_PLLA_CLK, PMC_PCK_PRES_CLK_2,
PMC_CLOCK_SWITCHING_EXAMPLE_FIXED_PLLA/2);
for (gs_uc_wait_button = 1; gs_uc_wait_button;) {
}
puts("\n\r-I- Switch the XTAL 32K crystal oscillator to be the source of the slow clock\n\r"
"-I- The master clock is slow clock\n\r"
"-I- Press Button "BUTTON_NAME" to switch next clock configuration...\r\n");
/* Wait for UART transmit done */
while (!uart_is_tx_empty(CONF_UART)) {
};
/* Switch slow clck to extern 32k xtal */
pmc_switch_sclk_to_32kxtal(PMC_OSC_XTAL);
/* Delay for a while to make sure the clock is stable */
/* Wait for UART transmit done */
while (!uart_is_tx_empty(CONF_UART)) {
};
/* If a new value for CSS field corresponds to Main Clock or Slow Clock,
* program the CSS field first.
*/
pmc_switch_mck_to_mainck(PMC_MCKR_PRES_CLK_2);
/* Switch the mck to sclk but keep the PRES field same */
pmc_switch_mck_to_sclk(PMC_MCKR_PRES_CLK_2);
/* Then program the PRES field. */
pmc_switch_mck_to_sclk(PMC_MCKR_PRES_CLK_1);
/* The clock source for the UART is the PCK, so the uart needs
* re-configuration
*/
config_uart_and_pck(PMC_PCK_CSS_SLOW_CLK, PMC_PCK_PRES_CLK_1,
BOARD_FREQ_SLCK_XTAL);
for (gs_uc_wait_button = 1; gs_uc_wait_button;) {
}
/* Switch mainck to external xtal */
pmc_switch_mainck_to_xtal(0, BOARD_OSC_STARTUP_US);
/* If a new value for CSS field corresponds to Main Clock or Slow Clock,
* program the CSS field first.
*/
pmc_switch_mck_to_mainck(PMC_MCKR_PRES_CLK_1);
/* Then program the PRES field. */
pmc_switch_mck_to_mainck(PMC_MCKR_PRES_CLK_16);
/* The clock source for the UART is the PCK, so the uart needs
* re-configuration.
*/
config_uart_and_pck(PMC_PCK_CSS_MAIN_CLK, PMC_PCK_PRES_CLK_16,
(BOARD_FREQ_MAINCK_XTAL / 16));
#if SAM4C
puts("\n\r-I- Switch the external 8MHz crystal oscillator to be the source of the main clock\n\r"
"-I- The master clock is main clock divided by 16\n\r"
"-I- Press Button "BUTTON_NAME" to switch next clock configuration...\r\n");
#else
puts("\n\r-I- Switch the external 12MHz crystal oscillator to be the source of the main clock\n\r"
"-I- The master clock is main clock divided by 16\n\r"
"-I- Press Button "BUTTON_NAME" to switch next clock configuration...\r\n");
#endif
#if (SAM3S || SAM4S || SAM4C)
for (gs_uc_wait_button = 1; gs_uc_wait_button;) {
}
puts("-I- Switch to 96Mhz PLLB clock as the source of the master clock\n\r"
"-I- The master clock is PLLB clock divided by 2 \r");
/* Wait for UART transmit done */
while (!uart_is_tx_empty(CONF_UART)) {
};
#if SAM4C
/* Enable the PLLB clock, the mainck equals (8Mhz * (11+1) / 1) = 96Mhz
* with the initialize counter be 0x3f
*/
pmc_enable_pllbck(11, 0x3f, 1);
#else
/* Enable the PLLB clock, the mainck equals (12Mhz * (7+1) / 1) = 96Mhz
* with the initialize counter be 0x3f
*/
pmc_enable_pllbck(7, 0x3f, 1);
#endif
/* If a new value for CSS field corresponds to PLL Clock, Program the PRES
* field first.
*/
pmc_switch_mck_to_mainck(PMC_MCKR_PRES_CLK_2);
/* Then program the CSS field. */
pmc_switch_mck_to_pllbck(PMC_MCKR_PRES_CLK_2);
/* The clock source for the UART is the PCK, so the uart needs
* re-configuration.
*/
#if SAM4C
config_uart_and_pck(PMC_PCK_CSS_PLLB_CLK, PMC_PCK_PRES_CLK_2,
(BOARD_FREQ_MAINCK_XTAL * 12 / 2));
#else
config_uart_and_pck(PMC_PCK_CSS_PLLB_CLK, PMC_PCK_PRES_CLK_2,
(BOARD_FREQ_MAINCK_XTAL * 8 / 2));
#endif
puts("-I- Press Button "BUTTON_NAME" to switch next clock configuration...\r\n");
#endif
for (gs_uc_wait_button = 1; gs_uc_wait_button;) {
}
puts("\r\n\r\n-I- Done.\r\n");
/* Wait for UART transmit done */
while (!uart_is_tx_empty(CONF_UART)) {
};
while (1) {
}
}
void serial_init(serial_t *obj, PinName tx, PinName rx)
{
/* Sanity check arguments */
MBED_ASSERT(obj);
int clockid = NC, flexcom = NC;
/*To determine the uart peripheral associated with pins*/
UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
MBED_ASSERT(uart != (UARTName)NC);
if (g_sys_init == 0) {
sysclk_init();
system_board_init();
g_sys_init = 1;
}
pUSART_S(obj) = uart;
pSERIAL_S(obj)->uart_serial_options.baudrate = (9600UL);
pSERIAL_S(obj)->uart_serial_options.charlength = US_MR_CHRL_8_BIT;
pSERIAL_S(obj)->uart_serial_options.paritytype = US_MR_PAR_NO;
pSERIAL_S(obj)->uart_serial_options.stopbits = US_MR_NBSTOP_1_BIT;
pSERIAL_S(obj)->actrec = false;
pSERIAL_S(obj)->acttra = false;
/* Configure UART pins */
if(tx != NC) {
pin_function(tx, pinmap_find_function(tx, PinMap_UART_TX));
ioport_disable_pin(tx);
}
if(rx != NC) {
pin_function(rx, pinmap_find_function(rx, PinMap_UART_RX));
ioport_disable_pin(rx);
}
clockid = get_usart_clock_id(uart);
if (clockid != NC) {
sysclk_enable_peripheral_clock(clockid);
}
flexcom = (int)get_flexcom_id(uart);
#if (!SAM4L)
#if (SAMG55)
/* Configure flexcom for usart */
flexcom_enable((Flexcom* )flexcom);
flexcom_set_opmode((Flexcom* )flexcom, FLEXCOM_USART);
#else
sysclk_enable_peripheral_clock(clockid);
#endif
/* Configure USART */
usart_init_rs232((Usart*)uart, (sam_usart_opt_t*)&(pSERIAL_S(obj)->uart_serial_options),
sysclk_get_peripheral_hz());
#endif
#if (SAM4L)
sysclk_enable_peripheral_clock(clockid);
/* Configure USART */
usart_init_rs232((Usart*)uart, (sam_usart_opt_t*)&(pSERIAL_S(obj)->uart_serial_options, sysclk_get_peripheral_bus_hz((Usart*)uart));
#endif
/* Disable rx and tx in case 1 line only required to be configured for usart */
usart_disable_tx((Usart*)uart);
usart_disable_rx((Usart*)uart);
/* Enable the receiver and transmitter. */
if(tx != NC) {
usart_enable_tx((Usart*)uart);
}
if(rx != NC) {
usart_enable_rx((Usart*)uart);
}
if(uart == STDIO_UART) {
stdio_uart_inited = 1;
memcpy(&stdio_uart, obj, sizeof(serial_t));
}
}
void serial_pinout_tx(PinName tx)
{
pin_function(tx, pinmap_find_function(tx, PinMap_UART_TX));
ioport_disable_pin(tx);
}
/**
* \brief Application entry point for tc_capture_waveform example.
*
* \return Unused (ANSI-C compatibility).
*/
int main(void)
{
uint8_t key;
uint16_t frequence, dutycycle;
/* Initialize the SAM system */
sysclk_init();
board_init();
/* Initialize the console uart */
configure_console();
/* Output example information */
printf("-- TC capture waveform Example --\r\n");
printf("-- %s\n\r", BOARD_NAME);
printf("-- Compiled: %s %s --\n\r", __DATE__, __TIME__);
/* Configure PIO Pins for TC */
#if (SAM4L || SAM4E)
ioport_set_pin_mode(PIN_TC_WAVEFORM, PIN_TC_WAVEFORM_FLAGS);
ioport_disable_pin(PIN_TC_WAVEFORM); // Disable IO (but enable peripheral mode)
ioport_set_pin_mode(PIN_TC_CAPTURE, PIN_TC_CAPTURE_FLAGS);
ioport_disable_pin(PIN_TC_CAPTURE); // Disable IO (but enable peripheral mode)
#else
gpio_configure_pin(PIN_TC_WAVEFORM, PIN_TC_WAVEFORM_FLAGS);
gpio_configure_pin(PIN_TC_CAPTURE, PIN_TC_CAPTURE_FLAGS);
#endif
/* Configure TC TC_CHANNEL_WAVEFORM as waveform operating mode */
printf("Configure TC%d channel %d as waveform operating mode \n\r",
TC_PERIPHERAL, TC_CHANNEL_WAVEFORM);
tc_waveform_initialize();
/* Configure TC TC_CHANNEL_CAPTURE as capture operating mode */
printf("Configure TC%d channel %d as capture operating mode \n\r",
TC_PERIPHERAL, TC_CHANNEL_CAPTURE);
tc_capture_initialize();
/* Configure TC interrupts for TC TC_CHANNEL_CAPTURE only */
NVIC_DisableIRQ(TC_IRQn);
NVIC_ClearPendingIRQ(TC_IRQn);
NVIC_SetPriority(TC_IRQn, 0);
NVIC_EnableIRQ(TC_IRQn);
/* Display menu */
display_menu();
while (1) {
scanf("%c", (char *)&key);
switch (key) {
case 'h':
display_menu();
break;
case 's':
if (gs_ul_captured_pulses) {
tc_disable_interrupt(TC, TC_CHANNEL_CAPTURE, TC_IDR_LDRBS);
printf("Captured %u pulses from TC%d channel %d, RA = %u, RB = %u \n\r",
gs_ul_captured_pulses, TC_PERIPHERAL,
TC_CHANNEL_CAPTURE, gs_ul_captured_ra,
gs_ul_captured_rb);
#if (SAM4L)
frequence = (sysclk_get_peripheral_bus_hz(TC) /
divisors[TC_CAPTURE_TIMER_SELECTION]) /
gs_ul_captured_rb;
#else
frequence = (sysclk_get_peripheral_hz() /
divisors[TC_CAPTURE_TIMER_SELECTION]) /
gs_ul_captured_rb;
#endif
dutycycle
= (gs_ul_captured_rb - gs_ul_captured_ra) * 100 /
gs_ul_captured_rb;
printf("Captured wave frequency = %d Hz, Duty cycle = %d%% \n\r",
frequence, dutycycle);
gs_ul_captured_pulses = 0;
gs_ul_captured_ra = 0;
gs_ul_captured_rb = 0;
} else {
puts("No waveform has been captured\r");
}
puts("\n\rPress 'h' to display menu\r");
break;
case 'c':
puts("Start capture, press 's' to stop \r");
tc_enable_interrupt(TC, TC_CHANNEL_CAPTURE, TC_IER_LDRBS);
/* Start the timer counter on TC TC_CHANNEL_CAPTURE */
tc_start(TC, TC_CHANNEL_CAPTURE);
break;
default:
/* Set waveform configuration #n */
if ((key >= '0') && (key <= ('0' + gc_uc_nbconfig - 1))) {
if (!gs_ul_captured_pulses) {
gs_uc_configuration = key - '0';
tc_waveform_initialize();
} else {
puts("Capturing ... , press 's' to stop capture first \r");
}
}
break;
}
}
}
