static void emit_expr_binary(ivl_scope_t scope, ivl_expr_t expr, unsigned wid)
{
char *oper = "<invalid>";
switch(ivl_expr_opcode(expr)) {
case '+': oper = "+"; break;
case '-': oper = "-"; break;
case '*': oper = "*"; break;
case '/': oper = "/"; break;
case '%': oper = "%"; break;
case 'p': oper = "**"; break;
case 'E': oper = "==="; break;
case 'e': oper = "=="; break;
case 'N': oper = "!=="; break;
case 'n': oper = "!="; break;
case '<': oper = "<"; break;
case 'L': oper = "<="; break;
case '>': oper = ">"; break;
case 'G': oper = ">="; break;
case '&': oper = "&"; break;
case '|': oper = "|"; break;
case '^': oper = "^"; break;
case 'A': oper = "&"; break;
case 'O': oper = "|"; break;
case 'X': oper = "~^"; break;
case 'a': oper = "&&"; break;
case 'o': oper = "||"; break;
case 'l': oper = "<<"; break;
case 'r': oper = ">>"; break;
case 'R': oper = ">>>"; break;
}
fprintf(vlog_out, "(");
switch(ivl_expr_opcode(expr)) {
case '%':
if (ivl_expr_value(expr) == IVL_VT_REAL) {
fprintf(stderr, "%s:%u: vlog95 error: Real modulus operator "
"is not supported.\n",
ivl_expr_file(expr), ivl_expr_lineno(expr));
vlog_errors += 1;
}
case '+':
case '-':
case '*':
case '/':
case 'E':
case 'e':
case 'N':
case 'n':
case '<':
case 'L':
case '>':
case 'G':
case '&':
case '|':
case '^':
case 'X':
emit_expr(scope, ivl_expr_oper1(expr), wid);
fprintf(vlog_out, " %s ", oper);
emit_expr(scope, ivl_expr_oper2(expr), wid);
break;
case 'a':
case 'o':
emit_expr(scope, ivl_expr_oper1(expr), 0);
fprintf(vlog_out, " %s ", oper);
emit_expr(scope, ivl_expr_oper2(expr), 0);
break;
case 'R':
if (! allow_signed) {
fprintf(stderr, "%s:%u: vlog95 error: >>> operator is not "
"supported.\n",
ivl_expr_file(expr), ivl_expr_lineno(expr));
vlog_errors += 1;
}
case 'l':
case 'r':
emit_expr(scope, ivl_expr_oper1(expr), wid);
fprintf(vlog_out, " %s ", oper);
emit_expr(scope, ivl_expr_oper2(expr), 0);
break;
case 'A':
case 'O':
fprintf(vlog_out, "~(");
emit_expr(scope, ivl_expr_oper1(expr), wid);
fprintf(vlog_out, " %s ", oper);
emit_expr(scope, ivl_expr_oper2(expr), wid);
fprintf(vlog_out, ")");
break;
case 'p':
if (! emit_power_as_shift(scope, expr, wid)) {
emit_expr(scope, ivl_expr_oper1(expr), wid);
fprintf(vlog_out, " ** ");
emit_expr(scope, ivl_expr_oper2(expr), 0);
fprintf(stderr, "%s:%u: vlog95 error: Power operator is not "
"supported.\n",
ivl_expr_file(expr), ivl_expr_lineno(expr));
vlog_errors += 1;
}
break;
default:
emit_expr(scope, ivl_expr_oper1(expr), wid);
fprintf(vlog_out, "<unknown>");
emit_expr(scope, ivl_expr_oper2(expr), wid);
fprintf(stderr, "%s:%u: vlog95 error: Unknown expression "
"operator (%c).\n",
ivl_expr_file(expr),
ivl_expr_lineno(expr),
ivl_expr_opcode(expr));
vlog_errors += 1;
break;
}
fprintf(vlog_out, ")");
}
static void show_expression(ivl_expr_t net)
{
if (net == 0)
return;
switch (ivl_expr_type(net)) {
case IVL_EX_BINARY: {
char code = ivl_expr_opcode(net);
show_expression(ivl_expr_oper1(net));
switch (code) {
case 'e':
fprintf(out, "==");
break;
case 'n':
fprintf(out, "!=");
break;
case 'N':
fprintf(out, "!==");
break;
case 'r':
fprintf(out, ">>");
break;
default:
fprintf(out, "%c", code);
}
show_expression(ivl_expr_oper2(net));
break;
}
case IVL_EX_CONCAT: {
unsigned idx;
fprintf(out, "{");
show_expression(ivl_expr_parm(net, 0));
for (idx = 1 ; idx < ivl_expr_parms(net) ; idx += 1) {
fprintf(out, ", ");
show_expression(ivl_expr_parm(net, idx));
}
fprintf(out, "}");
break;
}
case IVL_EX_NUMBER: {
int sigflag = ivl_expr_signed(net);
unsigned idx, width = ivl_expr_width(net);
const char*bits = ivl_expr_bits(net);
fprintf(out, "%u'%sb", width, sigflag? "s" : "");
for (idx = width ; idx > 0 ; idx -= 1)
fprintf(out, "%c", bits[idx-1]);
break;
}
case IVL_EX_SFUNC:
fprintf(out, "%s", ivl_expr_name(net));
break;
case IVL_EX_STRING:
fprintf(out, "\"%s\"", ivl_expr_string(net));
break;
case IVL_EX_SIGNAL:
fprintf(out, "%s", ivl_expr_name(net));
break;
default:
fprintf(out, "...");
}
}
static void draw_binary_vec4_compare(ivl_expr_t expr)
{
ivl_expr_t le = ivl_expr_oper1(expr);
ivl_expr_t re = ivl_expr_oper2(expr);
if ((ivl_expr_value(le) == IVL_VT_REAL)
|| (ivl_expr_value(re) == IVL_VT_REAL)) {
draw_binary_vec4_compare_real(expr);
return;
}
if ((ivl_expr_value(le)==IVL_VT_STRING)
&& (ivl_expr_value(re)==IVL_VT_STRING)) {
draw_binary_vec4_compare_string(expr);
return;
}
if ((ivl_expr_value(le)==IVL_VT_STRING)
&& (ivl_expr_type(re)==IVL_EX_STRING)) {
draw_binary_vec4_compare_string(expr);
return;
}
if ((ivl_expr_type(le)==IVL_EX_STRING)
&& (ivl_expr_value(re)==IVL_VT_STRING)) {
draw_binary_vec4_compare_string(expr);
return;
}
if ((ivl_expr_value(le)==IVL_VT_CLASS)
&& (ivl_expr_value(re)==IVL_VT_CLASS)) {
draw_binary_vec4_compare_class(expr);
return;
}
unsigned use_wid = ivl_expr_width(le);
if (ivl_expr_width(re) > use_wid)
use_wid = ivl_expr_width(re);
draw_eval_vec4(le);
resize_vec4_wid(le, use_wid);
draw_eval_vec4(re);
resize_vec4_wid(re, use_wid);
switch (ivl_expr_opcode(expr)) {
case 'e': /* == */
fprintf(vvp_out, " %%cmp/e;\n");
fprintf(vvp_out, " %%flag_get/vec4 4;\n");
break;
case 'n': /* != */
fprintf(vvp_out, " %%cmp/e;\n");
fprintf(vvp_out, " %%flag_get/vec4 4;\n");
fprintf(vvp_out, " %%inv;\n");
break;
case 'E': /* === */
fprintf(vvp_out, " %%cmp/e;\n");
fprintf(vvp_out, " %%flag_get/vec4 6;\n");
break;
case 'N': /* !== */
fprintf(vvp_out, " %%cmp/e;\n");
fprintf(vvp_out, " %%flag_get/vec4 6;\n");
fprintf(vvp_out, " %%inv;\n");
break;
default:
assert(0);
}
}
static void draw_binary_vec4_le(ivl_expr_t expr)
{
ivl_expr_t le = ivl_expr_oper1(expr);
ivl_expr_t re = ivl_expr_oper2(expr);
ivl_expr_t tmp;
if ((ivl_expr_value(le) == IVL_VT_REAL)
|| (ivl_expr_value(re) == IVL_VT_REAL)) {
draw_binary_vec4_le_real(expr);
return;
}
char use_opcode = ivl_expr_opcode(expr);
char s_flag = (ivl_expr_signed(le) && ivl_expr_signed(re)) ? 's' : 'u';
/* If this is a > or >=, then convert it to < or <= by
swapping the operands. Adjust the opcode to match. */
switch (use_opcode) {
case 'G':
tmp = le;
le = re;
re = tmp;
use_opcode = 'L';
break;
case '>':
tmp = le;
le = re;
re = tmp;
use_opcode = '<';
break;
}
if ((ivl_expr_value(le)==IVL_VT_STRING)
&& (ivl_expr_value(re)==IVL_VT_STRING)) {
draw_binary_vec4_le_string(expr);
return;
}
if ((ivl_expr_value(le)==IVL_VT_STRING)
&& (ivl_expr_type(re)==IVL_EX_STRING)) {
draw_binary_vec4_le_string(expr);
return;
}
if ((ivl_expr_type(le)==IVL_EX_STRING)
&& (ivl_expr_value(re)==IVL_VT_STRING)) {
draw_binary_vec4_le_string(expr);
return;
}
/* NOTE: I think I would rather the elaborator handle the
operand widths. When that happens, take this code out. */
unsigned use_wid = ivl_expr_width(le);
if (ivl_expr_width(re) > use_wid)
use_wid = ivl_expr_width(re);
draw_eval_vec4(le);
resize_vec4_wid(le, use_wid);
if (ivl_expr_width(re)==use_wid && test_immediate_vec4_ok(re)) {
/* Special case: If the right operand can be handled as
an immediate operand, then use that instead. */
char opcode[8];
snprintf(opcode, sizeof opcode, "%%cmpi/%c", s_flag);
draw_immediate_vec4(re, opcode);
} else {
draw_eval_vec4(re);
resize_vec4_wid(re, use_wid);
fprintf(vvp_out, " %%cmp/%c;\n", s_flag);
}
switch (use_opcode) {
case 'L':
fprintf(vvp_out, " %%flag_get/vec4 4;\n");
fprintf(vvp_out, " %%flag_get/vec4 5;\n");
fprintf(vvp_out, " %%or;\n");
break;
case '<':
fprintf(vvp_out, " %%flag_get/vec4 5;\n");
break;
default:
assert(0);
break;
}
}
static void draw_unary_vec4(ivl_expr_t expr)
{
ivl_expr_t sub = ivl_expr_oper1(expr);
if (debug_draw) {
fprintf(vvp_out, " ; %s:%u:draw_unary_vec4: opcode=%c\n",
ivl_expr_file(expr), ivl_expr_lineno(expr),
ivl_expr_opcode(expr));
}
switch (ivl_expr_opcode(expr)) {
case '&':
draw_eval_vec4(sub);
fprintf(vvp_out, " %%and/r;\n");
break;
case '|':
draw_eval_vec4(sub);
fprintf(vvp_out, " %%or/r;\n");
break;
case '^':
draw_eval_vec4(sub);
fprintf(vvp_out, " %%xor/r;\n");
break;
case '~':
draw_eval_vec4(sub);
fprintf(vvp_out, " %%inv;\n");
break;
case '!':
draw_eval_vec4(sub);
fprintf(vvp_out, " %%nor/r;\n");
break;
case '-':
draw_eval_vec4(sub);
fprintf(vvp_out, " %%inv;\n");
fprintf(vvp_out, " %%pushi/vec4 1, 0, %u;\n", ivl_expr_width(sub));
fprintf(vvp_out, " %%add;\n");
break;
case 'A': /* nand (~&) */
draw_eval_vec4(sub);
fprintf(vvp_out, " %%nand/r;\n");
break;
case 'D': /* pre-decrement (--x) */
draw_unary_inc_dec(sub, false, true);
break;
case 'd': /* post_decrement (x--) */
draw_unary_inc_dec(sub, false, false);
break;
case 'I': /* pre-increment (++x) */
draw_unary_inc_dec(sub, true, true);
break;
case 'i': /* post-increment (x++) */
draw_unary_inc_dec(sub, true, false);
break;
case 'N': /* nor (~|) */
draw_eval_vec4(sub);
fprintf(vvp_out, " %%nor/r;\n");
break;
case 'X': /* xnor (~^) */
draw_eval_vec4(sub);
fprintf(vvp_out, " %%xnor/r;\n");
break;
case 'm': /* abs(m) */
draw_eval_vec4(sub);
if (! ivl_expr_signed(sub))
break;
/* Test if (m) < 0 */
fprintf(vvp_out, " %%dup/vec4;\n");
fprintf(vvp_out, " %%pushi/vec4 0, 0, %u;\n", ivl_expr_width(sub));
fprintf(vvp_out, " %%cmp/s;\n");
fprintf(vvp_out, " %%jmp/0xz T_%u.%u, 5;\n", thread_count, local_count);
/* If so, calculate -(m) */
fprintf(vvp_out, " %%inv;\n");
fprintf(vvp_out, " %%pushi/vec4 1, 0, %u;\n", ivl_expr_width(sub));
fprintf(vvp_out, " %%add;\n");
fprintf(vvp_out, "T_%u.%u ;\n", thread_count, local_count);
local_count += 1;
break;
case 'v': /* Cast real to vec4 */
assert(ivl_expr_value(sub) == IVL_VT_REAL);
draw_eval_real(sub);
fprintf(vvp_out, " %%cvt/vr %u;\n", ivl_expr_width(expr));
break;
case '2': /* Cast expression to bool */
switch (ivl_expr_value(sub)) {
case IVL_VT_LOGIC:
draw_eval_vec4(sub);
fprintf(vvp_out, " %%cast2;\n");
resize_vec4_wid(sub, ivl_expr_width(expr));
break;
case IVL_VT_BOOL:
draw_eval_vec4(sub);
resize_vec4_wid(sub, ivl_expr_width(expr));
break;
case IVL_VT_REAL:
draw_eval_real(sub);
fprintf(vvp_out, " %%cvt/vr %u;\n", ivl_expr_width(expr));
break;
default:
assert(0);
break;
}
break;
default:
fprintf(stderr, "XXXX Unary operator %c not implemented\n", ivl_expr_opcode(expr));
break;
}
}
static void draw_binary_vec4_compare_class(ivl_expr_t expr)
{
ivl_expr_t le = ivl_expr_oper1(expr);
ivl_expr_t re = ivl_expr_oper2(expr);
if (ivl_expr_type(le) == IVL_EX_NULL) {
ivl_expr_t tmp = le;
le = re;
re = tmp;
}
/* Special case: If both operands are null, then the
expression has a constant value. */
if (ivl_expr_type(le)==IVL_EX_NULL && ivl_expr_type(re)==IVL_EX_NULL) {
switch (ivl_expr_opcode(expr)) {
case 'e': /* == */
fprintf(vvp_out, " %%pushi/vec4 1, 0, 1;\n");
break;
case 'n': /* != */
fprintf(vvp_out, " %%pushi/vec4 0, 0, 1;\n");
break;
default:
assert(0);
break;
}
return;
}
/* A signal/variable is compared to null. Implement this with
the %test_nul statement, which peeks at the variable
contents directly. */
if (ivl_expr_type(re)==IVL_EX_NULL && ivl_expr_type(le)==IVL_EX_SIGNAL) {
ivl_signal_t sig= ivl_expr_signal(le);
if (ivl_signal_dimensions(sig) == 0) {
fprintf(vvp_out, " %%test_nul v%p_0;\n", sig);
} else {
ivl_expr_t word_ex = ivl_expr_oper1(le);
int word_ix = allocate_word();
draw_eval_expr_into_integer(word_ex, word_ix);
fprintf(vvp_out, " %%test_nul/a v%p, %d;\n", sig, word_ix);
clr_word(word_ix);
}
fprintf(vvp_out, " %%flag_get/vec4 4;\n");
if (ivl_expr_opcode(expr) == 'n')
fprintf(vvp_out, " %%inv;\n");
return;
}
if (ivl_expr_type(re)==IVL_EX_NULL && ivl_expr_type(le)==IVL_EX_PROPERTY) {
ivl_signal_t sig = ivl_expr_signal(le);
unsigned pidx = ivl_expr_property_idx(le);
ivl_expr_t idx_expr = ivl_expr_oper1(le);
int idx = 0;
/* If the property has an array index, then evaluate it
into an index register. */
if ( idx_expr ) {
idx = allocate_word();
draw_eval_expr_into_integer(idx_expr, idx);
}
fprintf(vvp_out, " %%load/obj v%p_0;\n", sig);
fprintf(vvp_out, " %%test_nul/prop %u, %d;\n", pidx, idx);
fprintf(vvp_out, " %%pop/obj 1, 0;\n");
fprintf(vvp_out, " %%flag_get/vec4 4;\n");
if (ivl_expr_opcode(expr) == 'n')
fprintf(vvp_out, " %%inv;\n");
if (idx != 0) clr_word(idx);
return;
}
fprintf(stderr, "SORRY: Compare class handles not implemented\n");
fprintf(vvp_out, " ; XXXX compare class handles. re-type=%d, le-type=%d\n",
ivl_expr_type(re), ivl_expr_type(le));
vvp_errors += 1;
}
static void draw_binary_vec4_arith(ivl_expr_t expr)
{
ivl_expr_t le = ivl_expr_oper1(expr);
ivl_expr_t re = ivl_expr_oper2(expr);
unsigned lwid = ivl_expr_width(le);
unsigned rwid = ivl_expr_width(re);
unsigned ewid = ivl_expr_width(expr);
int signed_flag = ivl_expr_signed(le) && ivl_expr_signed(re) ? 1 : 0;
const char*signed_string = signed_flag? "/s" : "";
/* All the arithmetic operations handled here require that the
operands (and the result) be the same width. We further
assume that the core has not given us an operand wider then
the expression width. So padd operands as needed. */
draw_eval_vec4(le);
if (lwid != ewid) {
fprintf(vvp_out, " %%pad/%c %u;\n", ivl_expr_signed(le)? 's' : 'u', ewid);
}
/* Special case: If the re expression can be collected into an
immediate operand, and the instruction supports it, then
generate an immediate instruction instead of the generic
version. */
if (rwid==ewid && test_immediate_vec4_ok(re)) {
switch (ivl_expr_opcode(expr)) {
case '+':
draw_immediate_vec4(re, "%addi");
return;
case '-':
draw_immediate_vec4(re, "%subi");
return;
case '*':
draw_immediate_vec4(re, "%muli");
return;
default:
break;
}
}
draw_eval_vec4(re);
if (rwid != ewid) {
fprintf(vvp_out, " %%pad/%c %u;\n", ivl_expr_signed(re)? 's' : 'u', ewid);
}
switch (ivl_expr_opcode(expr)) {
case '+':
fprintf(vvp_out, " %%add;\n");
break;
case '-':
fprintf(vvp_out, " %%sub;\n");
break;
case '*':
fprintf(vvp_out, " %%mul;\n");
break;
case '/':
fprintf(vvp_out, " %%div%s;\n", signed_string);
break;
case '%':
fprintf(vvp_out, " %%mod%s;\n", signed_string);
break;
case 'p':
/* Note that the power operator is signed if EITHER of
the operands is signed. This is different from other
arithmetic operators. */
if (ivl_expr_signed(le) || ivl_expr_signed(re))
signed_string = "/s";
fprintf(vvp_out, " %%pow%s;\n", signed_string);
break;
default:
assert(0);
break;
}
}
/*
* Icarus translated <var> = repeat(<count>) <event> <value> into
* begin
* <tmp> = <value>;
* repeat(<count>) <event>;
* <var> = <tmp>;
* end
* This routine looks for this pattern and turns it back into the
* appropriate blocking assignment.
*/
static unsigned is_repeat_event_assign(ivl_scope_t scope, ivl_statement_t stmt)
{
unsigned wid;
ivl_statement_t assign, event, event_assign, repeat;
ivl_lval_t lval;
ivl_expr_t rval;
ivl_signal_t lsig, rsig;
/* We must have three block elements. */
if (ivl_stmt_block_count(stmt) != 3) return 0;
/* The first must be an assign. */
assign = ivl_stmt_block_stmt(stmt, 0);
if (ivl_statement_type(assign) != IVL_ST_ASSIGN) return 0;
/* The second must be a repeat with an event or an event. */
repeat = ivl_stmt_block_stmt(stmt, 1);
if (ivl_statement_type(repeat) != IVL_ST_REPEAT) return 0;
/* The repeat must have an event statement. */
event = ivl_stmt_sub_stmt(repeat);
if (ivl_statement_type(event) != IVL_ST_WAIT) return 0;
/* The third must be an assign. */
event_assign = ivl_stmt_block_stmt(stmt, 2);
if (ivl_statement_type(event_assign) != IVL_ST_ASSIGN) return 0;
/* The L-value must be a single signal. */
if (ivl_stmt_lvals(assign) != 1) return 0;
lval = ivl_stmt_lval(assign, 0);
/* It must not have an array select. */
if (ivl_lval_idx(lval)) return 0;
/* It must not have a non-zero base. */
if (ivl_lval_part_off(lval)) return 0;
lsig = ivl_lval_sig(lval);
/* It must not be part of the signal. */
if (ivl_lval_width(lval) != ivl_signal_width(lsig)) return 0;
/* The R-value must be a single signal. */
rval = ivl_stmt_rval(event_assign);
if (ivl_expr_type(rval) != IVL_EX_SIGNAL) return 0;
/* It must not be an array word. */
if (ivl_expr_oper1(rval)) return 0;
rsig = ivl_expr_signal(rval);
/* The two signals must be the same. */
if (lsig != rsig) return 0;
/* And finally the four statements must have the same line number
* as the block. */
if ((ivl_stmt_lineno(stmt) != ivl_stmt_lineno(assign)) ||
(ivl_stmt_lineno(stmt) != ivl_stmt_lineno(repeat)) ||
(ivl_stmt_lineno(stmt) != ivl_stmt_lineno(event)) ||
(ivl_stmt_lineno(stmt) != ivl_stmt_lineno(event_assign))) {
return 0;
}
/* The pattern matched so generate the appropriate code. */
fprintf(vlog_out, "%*c", get_indent(), ' ');
wid = emit_stmt_lval(scope, event_assign);
fprintf(vlog_out, " =");
if (repeat) {
fprintf(vlog_out, " repeat (");
emit_expr(scope, ivl_stmt_cond_expr(repeat), 0);
fprintf(vlog_out, ")");
}
fprintf(vlog_out, " @(");
emit_event(scope, event);
fprintf(vlog_out, ") ");
emit_expr(scope, ivl_stmt_rval(assign), wid);
fprintf(vlog_out, ";");
emit_stmt_file_line(stmt);
fprintf(vlog_out, "\n");
return 1;
}
/*
* Icarus translated <var> = <delay or event> <value> into
* begin
* <tmp> = <value>;
* <delay or event> <var> = <tmp>;
* end
* This routine looks for this pattern and turns it back into the
* appropriate blocking assignment.
*/
static unsigned is_delayed_or_event_assign(ivl_scope_t scope,
ivl_statement_t stmt)
{
unsigned wid;
ivl_statement_t assign, delay, delayed_assign;
ivl_statement_type_t delay_type;
ivl_lval_t lval;
ivl_expr_t rval;
ivl_signal_t lsig, rsig;
/* We must have two block elements. */
if (ivl_stmt_block_count(stmt) != 2) return 0;
/* The first must be an assign. */
assign = ivl_stmt_block_stmt(stmt, 0);
if (ivl_statement_type(assign) != IVL_ST_ASSIGN) return 0;
/* The second must be a delayx. */
delay = ivl_stmt_block_stmt(stmt, 1);
delay_type = ivl_statement_type(delay);
if ((delay_type != IVL_ST_DELAYX) &&
(delay_type != IVL_ST_WAIT)) return 0;
/* The statement for the delayx must be an assign. */
delayed_assign = ivl_stmt_sub_stmt(delay);
if (ivl_statement_type(delayed_assign) != IVL_ST_ASSIGN) return 0;
/* The L-value must be a single signal. */
if (ivl_stmt_lvals(assign) != 1) return 0;
lval = ivl_stmt_lval(assign, 0);
/* It must not have an array select. */
if (ivl_lval_idx(lval)) return 0;
/* It must not have a non-zero base. */
if (ivl_lval_part_off(lval)) return 0;
lsig = ivl_lval_sig(lval);
/* It must not be part of the signal. */
if (ivl_lval_width(lval) != ivl_signal_width(lsig)) return 0;
/* The R-value must be a single signal. */
rval = ivl_stmt_rval(delayed_assign);
if (ivl_expr_type(rval) != IVL_EX_SIGNAL) return 0;
/* It must not be an array word. */
if (ivl_expr_oper1(rval)) return 0;
rsig = ivl_expr_signal(rval);
/* The two signals must be the same. */
if (lsig != rsig) return 0;
/* And finally the three statements must have the same line number
* as the block. */
if ((ivl_stmt_lineno(stmt) != ivl_stmt_lineno(assign)) ||
(ivl_stmt_lineno(stmt) != ivl_stmt_lineno(delay)) ||
(ivl_stmt_lineno(stmt) != ivl_stmt_lineno(delayed_assign))) {
return 0;
}
/* The pattern matched so generate the appropriate code. */
fprintf(vlog_out, "%*c", get_indent(), ' ');
wid = emit_stmt_lval(scope, delayed_assign);
fprintf(vlog_out, " = ");
if (delay_type == IVL_ST_DELAYX) {
fprintf(vlog_out, "#(");
emit_scaled_delayx(scope, ivl_stmt_delay_expr(delay), 1);
} else {
fprintf(vlog_out, "@(");
emit_event(scope, delay);
}
fprintf(vlog_out, ") ");
emit_expr(scope, ivl_stmt_rval(assign), wid);
fprintf(vlog_out, ";");
emit_stmt_file_line(stmt);
fprintf(vlog_out, "\n");
return 1;
}
static int draw_condition_binary_compare(ivl_expr_t expr)
{
ivl_expr_t le = ivl_expr_oper1(expr);
ivl_expr_t re = ivl_expr_oper2(expr);
if ((ivl_expr_value(le) == IVL_VT_REAL)
|| (ivl_expr_value(re) == IVL_VT_REAL)) {
return draw_condition_fallback(expr);
}
if ((ivl_expr_value(le)==IVL_VT_STRING)
&& (ivl_expr_value(re)==IVL_VT_STRING)) {
return draw_condition_fallback(expr);
}
if ((ivl_expr_value(le)==IVL_VT_STRING)
&& (ivl_expr_type(re)==IVL_EX_STRING)) {
return draw_condition_fallback(expr);
}
if ((ivl_expr_type(le)==IVL_EX_STRING)
&& (ivl_expr_value(re)==IVL_VT_STRING)) {
return draw_condition_fallback(expr);
}
if ((ivl_expr_value(le)==IVL_VT_CLASS)
&& (ivl_expr_value(re)==IVL_VT_CLASS)) {
return draw_condition_fallback(expr);
}
unsigned use_wid = ivl_expr_width(le);
if (ivl_expr_width(re) > use_wid)
use_wid = ivl_expr_width(re);
/* If the le is constant, then swap the operands so that we
can possibly take advantage of the immediate version of the
%cmp instruction. */
if (ivl_expr_width(le)==use_wid && test_immediate_vec4_ok(le)) {
ivl_expr_t tmp = le;
re = le;
le = tmp;
}
draw_eval_vec4(le);
resize_vec4_wid(le, use_wid);
char use_opcode = ivl_expr_opcode(expr);
if (ivl_expr_width(re)==use_wid && test_immediate_vec4_ok(re)) {
/* Special case: If the right operand can be handled as
an immediate operand, then use that instead. */
if (use_opcode=='n' || use_opcode=='N')
draw_immediate_vec4(re, "%cmpi/ne");
else
draw_immediate_vec4(re, "%cmpi/e");
} else {
draw_eval_vec4(re);
resize_vec4_wid(re, use_wid);
if (use_opcode=='n' || use_opcode=='N')
fprintf(vvp_out, " %%cmp/ne;\n");
else
fprintf(vvp_out, " %%cmp/e;\n");
}
switch (ivl_expr_opcode(expr)) {
case 'n': /* != */
case 'e': /* == */
return 4;
break;
case 'N': /* !== */
case 'E': /* === */
return 6;
default:
assert(0);
return -1;
}
}
void show_expression(ivl_expr_t net, unsigned ind)
{
unsigned idx;
const ivl_expr_type_t code = ivl_expr_type(net);
ivl_parameter_t par = ivl_expr_parameter(net);
unsigned width = ivl_expr_width(net);
const char*sign = ivl_expr_signed(net)? "signed" : "unsigned";
const char*sized = ivl_expr_sized(net)? "sized" : "unsized";
const char*vt = vt_type_string(net);
switch (code) {
case IVL_EX_ARRAY:
show_array_expression(net, ind);
break;
case IVL_EX_BACCESS:
show_branch_access_expression(net, ind);
break;
case IVL_EX_BINARY:
show_binary_expression(net, ind);
break;
case IVL_EX_CONCAT:
fprintf(out, "%*s<concat repeat=%u, width=%u, %s, type=%s>\n",
ind, "", ivl_expr_repeat(net), width, sign, vt);
for (idx = 0 ; idx < ivl_expr_parms(net) ; idx += 1)
show_expression(ivl_expr_parm(net, idx), ind+3);
break;
case IVL_EX_MEMORY:
show_memory_expression(net, ind);
break;
case IVL_EX_NUMBER: {
const char*bits = ivl_expr_bits(net);
fprintf(out, "%*s<number=%u'b", ind, "", width);
for (idx = width ; idx > 0 ; idx -= 1)
fprintf(out, "%c", bits[idx-1]);
fprintf(out, ", %s %s %s", sign, sized, vt);
if (par != 0)
fprintf(out, ", parameter=%s",
ivl_parameter_basename(par));
fprintf(out, ">\n");
break;
}
case IVL_EX_SELECT:
/* The SELECT expression can be used to express part
select, or if the base is null vector extension. */
if (ivl_expr_oper2(net)) {
fprintf(out, "%*s<select: width=%u, %s>\n", ind, "",
width, sign);
show_expression(ivl_expr_oper1(net), ind+3);
show_expression(ivl_expr_oper2(net), ind+3);
} else {
fprintf(out, "%*s<expr pad: width=%u, %s>\n", ind, "",
width, sign);
show_expression(ivl_expr_oper1(net), ind+3);
}
break;
case IVL_EX_STRING:
fprintf(out, "%*s<string=\"%s\", width=%u", ind, "",
ivl_expr_string(net), ivl_expr_width(net));
if (par != 0)
fprintf(out, ", parameter=%s",
ivl_parameter_basename(par));
fprintf(out, ", type=%s>\n", vt);
break;
case IVL_EX_SFUNC:
fprintf(out, "%*s<function=\"%s\", width=%u, %s, type=%s file=%s:%u>\n",
ind, "", ivl_expr_name(net), width, sign, vt,
ivl_expr_file(net), ivl_expr_lineno(net));
{ unsigned cnt = ivl_expr_parms(net);
unsigned jdx;
for (jdx = 0 ; jdx < cnt ; jdx += 1)
show_expression(ivl_expr_parm(net, jdx), ind+3);
}
break;
case IVL_EX_SIGNAL:
show_signal_expression(net, ind);
break;
case IVL_EX_TERNARY:
show_ternary_expression(net, ind);
break;
case IVL_EX_UNARY:
show_unary_expression(net, ind);
break;
case IVL_EX_UFUNC:
show_function_call(net, ind);
break;
case IVL_EX_REALNUM:
{
int jdx;
union foo {
double rv;
unsigned char bv[sizeof(double)];
} tmp;
tmp.rv = ivl_expr_dvalue(net);
fprintf(out, "%*s<realnum=%f (", ind, "", tmp.rv);
for (jdx = sizeof(double) ; jdx > 0 ; jdx -= 1)
fprintf(out, "%02x", tmp.bv[jdx-1]);
fprintf(out, ")");
if (par != 0)
fprintf(out, ", parameter=%s",
ivl_parameter_basename(par));
fprintf(out, ">\n");
}
break;
default:
fprintf(out, "%*s<expr_type=%u>\n", ind, "", code);
break;
}
}
