/**
* ixgbe_get_link_capabilities - Returns link capabilities
* @hw: pointer to hardware structure
*
* Determines the link capabilities of the current configuration.
**/
s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
bool *autoneg)
{
return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,
speed, autoneg), IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_get_supported_physical_layer - Returns physical layer type
* @hw: pointer to hardware structure
*
* Determines physical layer capabilities of the current configuration.
**/
u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
{
return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
(hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
}
/**
* ixgbe_enable_sec_rx_path - Enables the receive data path
* @hw: pointer to hardware structure
*
* Enables the receive data path.
**/
s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw)
{
return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path,
(hw), IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_write_analog_reg8 - Writes 8 bit analog register
* @hw: pointer to hardware structure
* @reg: analog register to write
* @val: value to write
*
* Performs write operation to Atlas analog register specified.
**/
s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
{
return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
val), IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_write_i2c_byte - Writes 8 bit word over I2C
* @hw: pointer to hardware structure
* @byte_offset: byte offset to write
* @data: value to write
*
* Performs byte write operation to SFP module's EEPROM over I2C interface
* at a specified device address.
**/
s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
u8 data)
{
return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset,
dev_addr, data), IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_fc_enable - Enable flow control
* @hw: pointer to hardware structure
*
* Configures the flow control settings based on SW configuration.
**/
s32 ixgbe_fc_enable(struct ixgbe_hw *hw)
{
return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw),
IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_get_thermal_sensor_data - Gathers thermal sensor data
* @hw: pointer to hardware structure
*
* Updates the temperatures in mac.thermal_sensor_data
**/
s32 ixgbe_get_thermal_sensor_data(struct ixgbe_hw *hw)
{
return ixgbe_call_func(hw, hw->mac.ops.get_thermal_sensor_data, (hw),
IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
* @hw: pointer to hardware structure
* @checksum_val: calculated checksum
*
* Performs checksum calculation and validates the EEPROM checksum
**/
s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
{
return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
(hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
* @hw: pointer to hardware structure
**/
s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
{
return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_write_eeprom - Write word to EEPROM
* @hw: pointer to hardware structure
* @offset: offset within the EEPROM to be written to
* @data: 16 bit word to be written to the EEPROM
*
* Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
* called after this function, the EEPROM will most likely contain an
* invalid checksum.
**/
s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
{
return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_read_eeprom - Read word from EEPROM
* @hw: pointer to hardware structure
* @offset: offset within the EEPROM to be read
* @data: read 16 bit value from EEPROM
*
* Reads 16 bit value from EEPROM
**/
s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
{
return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_init_eeprom_params - Initialize EEPROM parameters
* @hw: pointer to hardware structure
*
* Initializes the EEPROM parameters ixgbe_eeprom_info within the
* ixgbe_hw struct in order to set up EEPROM access.
**/
s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
{
return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),
IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_blink_led_stop - Stop blinking LEDs
* @hw: pointer to hardware structure
*
* Stop blinking LED based on index.
**/
s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
{
return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),
IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_led_off - Turn off LEDs
* @hw: pointer to hardware structure
* @index: led number to turn off
*
* Turns off the software controllable LEDs.
**/
s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
{
return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),
IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_set_vfta - Set VLAN filter table
* @hw: pointer to hardware structure
* @vlan: VLAN id to write to VLAN filter
* @vind: VMDq output index that maps queue to VLAN id in VFTA
* @vlan_on: boolean flag to turn on/off VLAN in VFTA
*
* Turn on/off specified VLAN in the VLAN filter table.
**/
s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
{
return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
vlan_on), IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_insert_mac_addr - Find a RAR for this mac address
* @hw: pointer to hardware structure
* @addr: Address to put into receive address register
* @vmdq: VMDq pool to assign
*
* Puts an ethernet address into a receive address register, or
* finds the rar that it is aleady in; adds to the pool list
**/
s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
{
return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr,
(hw, addr, vmdq),
IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_set_vlvf - Set VLAN Pool Filter
* @hw: pointer to hardware structure
* @vlan: VLAN id to write to VLAN filter
* @vind: VMDq output index that maps queue to VLAN id in VFVFB
* @vlan_on: boolean flag to turn on/off VLAN in VFVF
* @vfta_changed: pointer to boolean flag which indicates whether VFTA
* should be changed
*
* Turn on/off specified bit in VLVF table.
**/
s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
bool *vfta_changed)
{
return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind,
vlan_on, vfta_changed), IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_set_rar - Set Rx address register
* @hw: pointer to hardware structure
* @index: Receive address register to write
* @addr: Address to put into receive address register
* @vmdq: VMDq "set"
* @enable_addr: set flag that address is active
*
* Puts an ethernet address into a receive address register.
**/
s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
u32 enable_addr)
{
return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
enable_addr), IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_set_fw_drv_ver - Try to send the driver version number FW
* @hw: pointer to hardware structure
* @maj: driver major number to be sent to firmware
* @min: driver minor number to be sent to firmware
* @build: driver build number to be sent to firmware
* @ver: driver version number to be sent to firmware
**/
s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
u8 ver)
{
return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min,
build, ver), IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_clear_rar - Clear Rx address register
* @hw: pointer to hardware structure
* @index: Receive address register to write
*
* Puts an ethernet address into a receive address register.
**/
s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
{
return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds
* @hw: pointer to hardware structure
*
* Inits the thermal sensor thresholds according to the NVM map
**/
s32 ixgbe_init_thermal_sensor_thresh(struct ixgbe_hw *hw)
{
return ixgbe_call_func(hw, hw->mac.ops.init_thermal_sensor_thresh, (hw),
IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address
* @hw: pointer to hardware structure
* @vmdq: VMDq default pool index
**/
s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)
{
return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac,
(hw, vmdq), IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
* @hw: pointer to hardware structure
*
* Initializes the Unicast Table Arrays to zero on device load. This
* is part of the Rx init addr execution path.
**/
s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
{
return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
* @hw: pointer to hardware structure
* @rar: receive address register index to disassociate with VMDq index
* @vmdq: VMDq set or pool index
**/
s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
{
return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
* @hw: pointer to hardware structure
* @byte_offset: EEPROM byte offset to read
* @eeprom_data: value read
*
* Performs byte read operation to SFP module's EEPROM over I2C interface.
**/
s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
{
return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
(hw, byte_offset, eeprom_data),
IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_disable_mc - Disable multicast address in RAR
* @hw: pointer to hardware structure
*
* Disables multicast address in RAR and the use of the multicast hash table.
**/
s32 ixgbe_disable_mc(struct ixgbe_hw *hw)
{
return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),
IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics
* @hw: pointer to hardware structure
* @regval: bitfield to write to the Rx DMA register
*
* Enables the Rx DMA unit of the device.
**/
s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
{
return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
(hw, regval), IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_clear_vfta - Clear VLAN filter table
* @hw: pointer to hardware structure
*
* Clears the VLAN filer table, and the VMDq index associated with the filter
**/
s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
{
return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
* @hw: pointer to hardware structure
* @mask: Mask to specify which semaphore to acquire
*
* Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
* function (CSR, PHY0, PHY1, EEPROM, Flash)
**/
s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask)
{
return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
(hw, mask), IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_check_phy_link - Determine link and speed status
* @hw: pointer to hardware structure
*
* Reads a PHY register to determine if link is up and the current speed for
* the PHY.
**/
s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
bool *link_up)
{
return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,
link_up), IXGBE_NOT_IMPLEMENTED);
}
