void nf10_dcb_init(struct net_device *netdev){
struct ixgbe_dcb_tc_config *tc;
int j, bwg_pct;
netdev->dcbnl_ops = &dcbnl_ops;
fcoe_up = 0x3;
fcoe_up_set = 0x3;
dcb_cfg.num_tcs.pg_tcs = 8;
dcb_cfg.num_tcs.pfc_tcs = 8;
bwg_pct = 100 / dcb_cfg.num_tcs.pg_tcs;
printk("dcb_init\n");
for (j = 0; j < dcb_cfg.num_tcs.pg_tcs; j++) {
tc = &dcb_cfg.tc_config[j];
tc->path[0].bwg_id = 0;
tc->path[0].bwg_percent = bwg_pct;
tc->path[1].bwg_id = 0;
tc->path[1].bwg_percent = bwg_pct;
tc->pfc = ixgbe_dcb_pfc_disabled;
}
/* reset back to TC 0 */
tc = &dcb_cfg.tc_config[0];
/* total of all TCs bandwidth needs to be 100 */
bwg_pct += 100 % dcb_cfg.num_tcs.pg_tcs;
tc->path[0].bwg_percent = bwg_pct;
tc->path[1].bwg_percent = bwg_pct;
/* Initialize default user to priority mapping, UPx->TC0 */
tc->path[0].up_to_tc_bitmap = 0xFF;
tc->path[1].up_to_tc_bitmap = 0xFF;
dcb_cfg.bw_percentage[0][0] = 100;
dcb_cfg.bw_percentage[1][0] = 100;
dcb_cfg.rx_pba_cfg = ixgbe_dcb_pba_equal;
dcb_cfg.pfc_mode_enable = false;
dcb_cfg.round_robin_enable = false;
dcb_set_bitmap = 0x00;
memcpy(&temp_dcb_cfg, &dcb_cfg,
sizeof(temp_dcb_cfg));
ixgbe_dcb_calculate_tc_credits_cee(&dcb_cfg,0);
ixgbe_dcb_calculate_tc_credits_cee(&dcb_cfg,1);
ixgbe_dcb_hw_config_cee(&dcb_cfg);
}
static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)
{
int ret = DCB_NO_HW_CHG;
u8 prio_tc[8] = { 0 };
u8 i;
dcb_set_bitmap |= ixgbe_copy_dcb_cfg(8);
if (dcb_set_bitmap)
return ret;
ixgbe_dcb_unpack_map_cee(&dcb_cfg, 0, prio_tc);
ixgbe_dcb_calculate_tc_credits_cee(&dcb_cfg,0);
ixgbe_dcb_calculate_tc_credits_cee(&dcb_cfg,1);
ixgbe_dcb_hw_config_cee(&dcb_cfg);
if (dcb_set_bitmap & (BIT_PG_TX | BIT_PG_RX)) {
for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
netdev_set_prio_tc_map(netdev, i, prio_tc[i]);
ret = DCB_HW_CHG_RST;
}
if (dcb_set_bitmap & BIT_PFC) {
if (dcb_cfg.pfc_mode_enable) {
u8 pfc_en;
ixgbe_dcb_unpack_pfc_cee(&dcb_cfg, prio_tc, &pfc_en);
}
if (ret != DCB_HW_CHG_RST)
ret = DCB_HW_CHG;
}
if (dcb_set_bitmap & BIT_APP_UPCHG) {
fcoe_up_set = fcoe_up;
ret = DCB_HW_CHG_RST;
}
dcb_set_bitmap = 0x00;
return ret;
}
static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)
{
struct ixgbe_adapter *adapter = netdev_priv(netdev);
int ret;
u8 prio_tc[IXGBE_DCB_MAX_USER_PRIORITY] = { 0 };
u8 pfc_en;
/* Fail command if not in CEE mode */
if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE))
return 1;
ret = ixgbe_copy_dcb_cfg(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
IXGBE_DCB_MAX_TRAFFIC_CLASS);
if (ret)
return DCB_NO_HW_CHG;
if (adapter->dcb_cfg.pfc_mode_enable) {
switch (adapter->hw.mac.type) {
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
if (adapter->hw.fc.current_mode != ixgbe_fc_pfc)
adapter->last_lfc_mode =
adapter->hw.fc.current_mode;
break;
default:
break;
}
adapter->hw.fc.requested_mode = ixgbe_fc_pfc;
} else {
switch (adapter->hw.mac.type) {
case ixgbe_mac_82598EB:
adapter->hw.fc.requested_mode = ixgbe_fc_none;
break;
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
break;
default:
break;
}
}
ixgbe_dcb_unpack_map_cee(&adapter->dcb_cfg,
IXGBE_DCB_TX_CONFIG,
prio_tc);
if (adapter->dcb_set_bitmap & (BIT_PG_TX | BIT_PG_RX)) {
/* Priority to TC mapping in CEE case default to 1:1 */
int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
#ifdef HAVE_MQPRIO
int i;
#endif
#ifdef IXGBE_FCOE
if (adapter->netdev->features & NETIF_F_FCOE_MTU)
max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
#endif
ixgbe_dcb_calculate_tc_credits_cee(&adapter->hw,
&adapter->dcb_cfg,
max_frame,
IXGBE_DCB_TX_CONFIG);
ixgbe_dcb_calculate_tc_credits_cee(&adapter->hw,
&adapter->dcb_cfg,
max_frame,
IXGBE_DCB_RX_CONFIG);
ixgbe_dcb_hw_config_cee(&adapter->hw, &adapter->dcb_cfg);
#ifdef HAVE_MQPRIO
for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
netdev_set_prio_tc_map(netdev, i, prio_tc[i]);
#endif /* HAVE_MQPRIO */
}
if (adapter->dcb_set_bitmap & BIT_PFC) {
ixgbe_dcb_unpack_pfc_cee(&adapter->dcb_cfg, prio_tc, &pfc_en);
ixgbe_dcb_config_pfc(&adapter->hw, pfc_en, prio_tc);
ret = DCB_HW_CHG;
}
if (adapter->dcb_cfg.pfc_mode_enable)
adapter->hw.fc.current_mode = ixgbe_fc_pfc;
#ifdef IXGBE_FCOE
if ((adapter->fcoe.up_set != adapter->fcoe.up) ||
(adapter->dcb_set_bitmap & BIT_APP_UPCHG)) {
adapter->fcoe.up_set = adapter->fcoe.up;
ixgbe_dcbnl_devreset(netdev);
}
#endif /* IXGBE_FCOE */
adapter->dcb_set_bitmap = 0x00;
return ret;
}
static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)
{
struct ixgbe_adapter *adapter = netdev_priv(netdev);
struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
struct ixgbe_hw *hw = &adapter->hw;
int ret = DCB_NO_HW_CHG;
u8 prio_tc[IXGBE_DCB_MAX_USER_PRIORITY] = { 0 };
/* Fail command if not in CEE mode */
if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE))
return ret;
adapter->dcb_set_bitmap |= ixgbe_copy_dcb_cfg(adapter,
IXGBE_DCB_MAX_TRAFFIC_CLASS);
if (!adapter->dcb_set_bitmap)
return ret;
ixgbe_dcb_unpack_map_cee(dcb_cfg, IXGBE_DCB_TX_CONFIG, prio_tc);
if (adapter->dcb_set_bitmap & (BIT_PG_TX | BIT_PG_RX)) {
/* Priority to TC mapping in CEE case default to 1:1 */
int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
#ifdef HAVE_MQPRIO
int i;
#endif
#ifdef IXGBE_FCOE
if (adapter->netdev->features & NETIF_F_FCOE_MTU)
max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
#endif
ixgbe_dcb_calculate_tc_credits_cee(hw, dcb_cfg, max_frame,
IXGBE_DCB_TX_CONFIG);
ixgbe_dcb_calculate_tc_credits_cee(hw, dcb_cfg, max_frame,
IXGBE_DCB_RX_CONFIG);
ixgbe_dcb_hw_config_cee(hw, dcb_cfg);
#ifdef HAVE_MQPRIO
for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
netdev_set_prio_tc_map(netdev, i, prio_tc[i]);
#endif /* HAVE_MQPRIO */
ret = DCB_HW_CHG_RST;
}
if (adapter->dcb_set_bitmap & BIT_PFC) {
if (dcb_cfg->pfc_mode_enable) {
u8 pfc_en;
ixgbe_dcb_unpack_pfc_cee(dcb_cfg, prio_tc, &pfc_en);
ixgbe_dcb_config_pfc(hw, pfc_en, prio_tc);
} else {
hw->mac.ops.fc_enable(hw);
}
ixgbe_set_rx_drop_en(adapter);
if (ret != DCB_HW_CHG_RST)
ret = DCB_HW_CHG;
}
#ifdef IXGBE_FCOE
/* Reprogam FCoE hardware offloads when the traffic class
* FCoE is using changes. This happens if the APP info
* changes or the up2tc mapping is updated.
*/
if (adapter->dcb_set_bitmap & BIT_APP_UPCHG) {
adapter->fcoe.up_set = adapter->fcoe.up;
ixgbe_dcbnl_devreset(netdev);
ret = DCB_HW_CHG_RST;
}
#endif /* IXGBE_FCOE */
adapter->dcb_set_bitmap = 0x00;
return ret;
}
