static void rk3026_output_lvds(rk_screen *screen)
{
	u32 val =0;

	#if defined(CONFIG_LCDC0_RK3188)	
		val |= LVDS_DATA_SEL(0);
	#else
		val |= LVDS_DATA_SEL(1);
	#endif
	
	if(screen->lvds_format == 0 || screen->lvds_format == 1)
		val |= LVDS_CBS_COL_SEL(2);  //24bit lvds
	else
		val |= LVDS_CBS_COL_SEL(1);  //16bit lvds

	val |= ((LVDS_OUTPUT_FORMAT(screen->lvds_format))|LVDS_INPUT_FORMAT(1)|LVDS_OUTPUT_LOAD_SEL(0)|
		LVDS_CBG_PWD_EN(1)|LVDS_PLL_PWD_EN(0)|LVDS_OUTPUT_EN(0)|LVDS_SWING_SEL(0));

	val |= ((m_DATA_SEL|m_CBS_COL_SEL|m_OUTPUT_FORMAT|m_INPUT_FORMAT|m_OUTPUT_LOAD_SEL|
		m_CBG_PWD_EN|m_PLL_PWD_EN|m_OUTPUT_EN|m_SWING_SEL)<<16);

	lvds_writel(val,CRU_LVDS_CON0);
	
	return;
}
static void rk3026_output_disable(void)
{	

	u32 val =0;

	val |= (LVDS_CBG_PWD_EN(1)|LVDS_PLL_PWD_EN(0)|LVDS_OUTPUT_EN(0)|LVDS_CBS_COL_SEL(0));
	val |= ((m_CBG_PWD_EN|m_PLL_PWD_EN|m_OUTPUT_EN|m_CBS_COL_SEL)<<16);

	lvds_writel(val,CRU_LVDS_CON0);
	
}
static void rk3026_output_lvttl(rk_screen *screen)
{

	u32 val =0;

	val |= (LVDS_CBG_PWD_EN(0)|LVDS_PLL_PWD_EN(1)|LVDS_OUTPUT_EN(1));
	val |= ((m_CBG_PWD_EN|m_PLL_PWD_EN|m_OUTPUT_EN)<<16);
	
	lvds_writel(val,CRU_LVDS_CON0);

	return;			
}
int rk_lvds_enable(struct udevice *dev, int panel_bpp,
		   const struct display_timing *edid)
{
	struct rk_lvds_priv *priv = dev_get_priv(dev);
	struct display_plat *uc_plat = dev_get_uclass_platdata(dev);
	int ret = 0;
	unsigned int val = 0;

	ret = panel_enable_backlight(priv->panel);
	if (ret) {
		debug("%s: backlight error: %d\n", __func__, ret);
		return ret;
	}

	/* Select the video source */
	if (uc_plat->source_id)
		val = RK3288_LVDS_SOC_CON6_SEL_VOP_LIT |
		    (RK3288_LVDS_SOC_CON6_SEL_VOP_LIT << 16);
	else
		val = RK3288_LVDS_SOC_CON6_SEL_VOP_LIT << 16;
	rk_setreg(&priv->grf->soc_con6, val);

	/* Select data transfer format */
	val = priv->format;
	if (priv->output == LVDS_OUTPUT_DUAL)
		val |= LVDS_DUAL | LVDS_CH0_EN | LVDS_CH1_EN;
	else if (priv->output == LVDS_OUTPUT_SINGLE)
		val |= LVDS_CH0_EN;
	else if (priv->output == LVDS_OUTPUT_RGB)
		val |= LVDS_TTL_EN | LVDS_CH0_EN | LVDS_CH1_EN;
	val |= (0xffff << 16);
	rk_setreg(&priv->grf->soc_con7, val);

	/* Enable LVDS PHY */
	if (priv->output == LVDS_OUTPUT_RGB) {
		lvds_writel(priv, RK3288_LVDS_CH0_REG0,
			    RK3288_LVDS_CH0_REG0_TTL_EN |
			    RK3288_LVDS_CH0_REG0_LANECK_EN |
			    RK3288_LVDS_CH0_REG0_LANE4_EN |
			    RK3288_LVDS_CH0_REG0_LANE3_EN |
			    RK3288_LVDS_CH0_REG0_LANE2_EN |
			    RK3288_LVDS_CH0_REG0_LANE1_EN |
			    RK3288_LVDS_CH0_REG0_LANE0_EN);
		lvds_writel(priv, RK3288_LVDS_CH0_REG2,
			    RK3288_LVDS_PLL_FBDIV_REG2(0x46));

		lvds_writel(priv, RK3288_LVDS_CH0_REG3,
			    RK3288_LVDS_PLL_FBDIV_REG3(0x46));
		lvds_writel(priv, RK3288_LVDS_CH0_REG4,
			    RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE |
			    RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE |
			    RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE |
			    RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE |
			    RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE |
			    RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE);
		lvds_writel(priv, RK3288_LVDS_CH0_REG5,
			    RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA |
			    RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA |
			    RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA |
			    RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA |
			    RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA |
			    RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA);
		lvds_writel(priv, RK3288_LVDS_CH0_REGD,
			    RK3288_LVDS_PLL_PREDIV_REGD(0x0a));
		lvds_writel(priv, RK3288_LVDS_CH0_REG20,
			    RK3288_LVDS_CH0_REG20_LSB);
	} else {
		lvds_writel(priv, RK3288_LVDS_CH0_REG0,
			    RK3288_LVDS_CH0_REG0_LVDS_EN |
			    RK3288_LVDS_CH0_REG0_LANECK_EN |
			    RK3288_LVDS_CH0_REG0_LANE4_EN |
			    RK3288_LVDS_CH0_REG0_LANE3_EN |
			    RK3288_LVDS_CH0_REG0_LANE2_EN |
			    RK3288_LVDS_CH0_REG0_LANE1_EN |
			    RK3288_LVDS_CH0_REG0_LANE0_EN);
		lvds_writel(priv, RK3288_LVDS_CH0_REG1,
			    RK3288_LVDS_CH0_REG1_LANECK_BIAS |
			    RK3288_LVDS_CH0_REG1_LANE4_BIAS |
			    RK3288_LVDS_CH0_REG1_LANE3_BIAS |
			    RK3288_LVDS_CH0_REG1_LANE2_BIAS |
			    RK3288_LVDS_CH0_REG1_LANE1_BIAS |
			    RK3288_LVDS_CH0_REG1_LANE0_BIAS);
		lvds_writel(priv, RK3288_LVDS_CH0_REG2,
			    RK3288_LVDS_CH0_REG2_RESERVE_ON |
			    RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE |
			    RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE |
			    RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE |
			    RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE |
			    RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE |
			    RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE |
			    RK3288_LVDS_PLL_FBDIV_REG2(0x46));
		lvds_writel(priv, RK3288_LVDS_CH0_REG3,
			    RK3288_LVDS_PLL_FBDIV_REG3(0x46));
		lvds_writel(priv, RK3288_LVDS_CH0_REG4, 0x00);
		lvds_writel(priv, RK3288_LVDS_CH0_REG5, 0x00);
		lvds_writel(priv, RK3288_LVDS_CH0_REGD,
			    RK3288_LVDS_PLL_PREDIV_REGD(0x0a));
		lvds_writel(priv, RK3288_LVDS_CH0_REG20,
			    RK3288_LVDS_CH0_REG20_LSB);
	}

	/* Power on */
	writel(RK3288_LVDS_CFG_REGC_PLL_ENABLE,
	       priv->regs + RK3288_LVDS_CFG_REGC);

	writel(RK3288_LVDS_CFG_REG21_TX_ENABLE,
	       priv->regs + RK3288_LVDS_CFG_REG21);

	return 0;
}
Beispiel #5
0
static int rk32_lvds_en(vidinfo_t *vid)
{
	u32 h_bp = vid->vl_hspw + vid->vl_hbpd;
	u32 val ;

	if (vid->lcdc_id == 1) /*lcdc1 = vop little,lcdc0 = vop big*/
		val = LVDS_SEL_VOP_LIT | (LVDS_SEL_VOP_LIT << 16);
	else
		val = LVDS_SEL_VOP_LIT << 16; 
	grf_writel(val, GRF_SOC_CON6);

	val = vid->lvds_format;
	if (vid->screen_type == SCREEN_DUAL_LVDS)
		val |= LVDS_DUAL | LVDS_CH0_EN | LVDS_CH1_EN;
	else if(vid->screen_type == SCREEN_LVDS)
		val |= LVDS_CH0_EN;
	else if (vid->screen_type == SCREEN_RGB)
		val = LVDS_TTL_EN | LVDS_CH0_EN | LVDS_CH1_EN;

	if (h_bp & 0x01)
		val |= LVDS_START_PHASE_RST_1;

	val |= (vid->vl_clkp << 8) | (vid->vl_hsp << 9) |
		(vid->vl_oep << 10);
	val |= 0xffff << 16;

	grf_writel(val, GRF_SOC_CON7);
	grf_writel(0x0f000f00, GRF_GPIO1H_SR);
	grf_writel(0x00ff00ff, GRF_GPIO1D_E);
	
	if(vid->screen_type == SCREEN_RGB) {
		grf_writel(0x00550055, GRF_GPIO1D_IOMUX);
	    	lvds_writel( LVDS_CH0_REG_0, 0x7f);
	    	lvds_writel( LVDS_CH0_REG_1, 0x40);
	    	lvds_writel( LVDS_CH0_REG_2, 0x00);
	    	lvds_writel( LVDS_CH0_REG_4, 0x3f);
	    	lvds_writel( LVDS_CH0_REG_5, 0x3f);
	    	lvds_writel( LVDS_CH0_REG_3, 0x46);
	    	lvds_writel( LVDS_CH0_REG_d, 0x0a);
	    	lvds_writel( LVDS_CH0_REG_20,0x44);/* 44:LSB  45:MSB*/
	    	writel(0x00, lvds_regs + LVDS_CFG_REG_c); /*eanble pll*/
	    	writel(0x92, lvds_regs + LVDS_CFG_REG_21); /*enable tx*/
	    	lvds_writel( 0x100, 0x7f);
	    	lvds_writel( 0x104, 0x40);
	    	lvds_writel( 0x108, 0x00);
	    	lvds_writel( 0x10c, 0x46);
	    	lvds_writel( 0x110, 0x3f);
	    	lvds_writel( 0x114, 0x3f);
	    	lvds_writel( 0x134, 0x0a);
	} else {
	    	lvds_writel( LVDS_CH0_REG_0, 0xbf);
	    	lvds_writel( LVDS_CH0_REG_1, 0x3f);
	    	lvds_writel( LVDS_CH0_REG_2, 0xfe);
	    	lvds_writel( LVDS_CH0_REG_3, 0x46);
	    	lvds_writel( LVDS_CH0_REG_4, 0x00);
	    	lvds_writel( LVDS_CH0_REG_d, 0x0a);//0a
	    	lvds_writel( LVDS_CH0_REG_20,0x44);/* 44:LSB  45:MSB*/
	    	writel(0x00, lvds_regs + LVDS_CFG_REG_c); /*eanble pll*/
	    	writel(0x92, lvds_regs + LVDS_CFG_REG_21); /*enable tx*/
	}

	return 0;
}
static int rk32_lvds_en(void)
{
	struct rk32_lvds *lvds = rk32_lvds;
	struct rk_screen *screen = &lvds->screen;
	u32 h_bp = 0;
	u32 val = 0;

	rk_fb_get_prmry_screen(screen);

	/* enable clk */
	rk32_lvds_clk_enable(lvds);

	/* select lcdc source */
	if (screen->lcdc_id == 1) /*lcdc1 = vop little,lcdc0 = vop big*/
		val = LVDS_SEL_VOP_LIT | (LVDS_SEL_VOP_LIT << 16);
	else
		val = LVDS_SEL_VOP_LIT << 16;
	grf_writel(val, RK3288_GRF_SOC_CON6);

	/* set lvds format */
	val = screen->lvds_format;
	if (screen->type == SCREEN_DUAL_LVDS)
		val |= LVDS_DUAL | LVDS_CH0_EN | LVDS_CH1_EN;
	else if(screen->type == SCREEN_LVDS)
		val |= LVDS_CH0_EN;
	else if (screen->type == SCREEN_RGB)
		val |= LVDS_TTL_EN | LVDS_CH0_EN | LVDS_CH1_EN;

	h_bp = screen->mode.hsync_len + screen->mode.left_margin;
	if (h_bp & 0x01)
		val |= LVDS_START_PHASE_RST_1;

	val |= (screen->pin_dclk << 8) | (screen->pin_hsync << 9) |
		(screen->pin_den << 10);
	val |= (0xffff << 16);
	grf_writel(val, RK3288_GRF_SOC_CON7);

	if (screen->type == SCREEN_RGB) {
		val = 0x007f007f;//0x1<<6 |0x1 <<4;
		grf_writel(val, RK3288_GRF_GPIO1D_IOMUX);

		lvds_writel(lvds, LVDS_CH0_REG_0, 0x7f);
		lvds_writel(lvds, LVDS_CH0_REG_1, 0x40);
		lvds_writel(lvds, LVDS_CH0_REG_2, 0x00);

		lvds_writel(lvds, LVDS_CH0_REG_4, 0x3f);
		lvds_writel(lvds, LVDS_CH0_REG_5, 0x3f);
		lvds_writel(lvds, LVDS_CH0_REG_3, 0x46);
		lvds_writel(lvds, LVDS_CH0_REG_d, 0x0a);
		lvds_writel(lvds, LVDS_CH0_REG_20,0x44);/* 44:LSB  45:MSB*/
		writel_relaxed(0x00, lvds->regs + LVDS_CFG_REG_c); /*eanble pll*/
		writel_relaxed(0x92, lvds->regs + LVDS_CFG_REG_21); /*enable tx*/

		lvds_writel(lvds, 0x100, 0x7f);
		lvds_writel(lvds, 0x104, 0x40);
		lvds_writel(lvds, 0x108, 0x00);
		lvds_writel(lvds, 0x10c, 0x46);
		lvds_writel(lvds, 0x110, 0x3f);
		lvds_writel(lvds, 0x114, 0x3f);
		lvds_writel(lvds, 0x134, 0x0a);
	} else {
		lvds_writel(lvds, LVDS_CH0_REG_0, 0xbf);
		lvds_writel(lvds, LVDS_CH0_REG_1, 0x3f);
		lvds_writel(lvds, LVDS_CH0_REG_2, 0xfe);
		lvds_writel(lvds, LVDS_CH0_REG_3, 0x46);
		lvds_writel(lvds, LVDS_CH0_REG_4, 0x00);
		lvds_writel(lvds, LVDS_CH0_REG_d, 0x0a);
		lvds_writel(lvds, LVDS_CH0_REG_20,0x44);/* 44:LSB  45:MSB*/
		writel_relaxed(0x00, lvds->regs + LVDS_CFG_REG_c); /*eanble pll*/
		writel_relaxed(0x92, lvds->regs + LVDS_CFG_REG_21); /*enable tx*/
	}

	return 0;
}