/* Called by drivers */ void acia6850_config(int which, const struct acia6850_interface *intf) { acia_6850 *acia_p = &acia[which]; if (which >= MAX_ACIA) { return; } acia_p->rx_clock = intf->rx_clock; acia_p->tx_clock = intf->tx_clock; acia_p->rx_pin = intf->rx_pin; acia_p->tx_pin = intf->tx_pin; acia_p->rx_timer = timer_alloc(receive_event); acia_p->tx_timer = timer_alloc(transmit_event); acia_p->int_callback = intf->int_callback; mame_timer_reset(acia_p->rx_timer, time_never); mame_timer_reset(acia_p->tx_timer, time_never); // TODO *acia_p->tx_pin = 1; }
static void dma8237_update_status(int which) { UINT16 pending_transfer; int channel; unsigned int new_eop; if ((dma[which].status & 0xF0) == 0) { /* no transfer is active right now; is there a transfer pending right now? */ pending_transfer = dma[which].drq & ~dma[which].mask; if (pending_transfer) { /* we do have a transfer in progress */ for (channel = 3; (pending_transfer & (1 << channel)) == 0; channel--) ; dma[which].status |= 0x10 << channel; dma[which].status &= ~(0x01 << channel); mame_timer_adjust(dma[which].timer, time_zero, which * 4 + channel, double_to_mame_time(dma[which].intf->bus_speed)); } else { /* no transfers active right now */ mame_timer_reset(dma[which].timer, time_never); } /* set the halt line */ if (dma[which].intf && dma[which].intf->cpunum >= 0) { cpunum_set_input_line(dma[which].intf->cpunum, INPUT_LINE_HALT, pending_transfer ? ASSERT_LINE : CLEAR_LINE); } /* set the eop line, if it has changed */ new_eop = (dma[which].status & 0x0F) == 0x0F ? 1 : 0; if (dma[which].eop != new_eop) { dma[which].eop = new_eop; if (dma[which].intf->out_eop_func) dma[which].intf->out_eop_func(new_eop ? ASSERT_LINE : CLEAR_LINE); } } }