otError utilsFlashErasePage(uint32_t aAddress) { int32_t status; status = MSC_ErasePage((uint32_t *)mapAddress(aAddress)); return returnTypeConvert(status); }
otError utilsFlashErasePage(uint32_t aAddress) { otError error = OT_ERROR_NONE; otEXPECT_ACTION(aAddress < utilsFlashGetSize(), error = OT_ERROR_INVALID_ARGS); error = nrf5FlashPageErase(mapAddress(aAddress & FLASH_PAGE_ADDR_MASK)); exit: return error; }
uint32_t utilsFlashRead(uint32_t aAddress, uint8_t *aData, uint32_t aSize) { uint32_t result = 0; otEXPECT(aData); otEXPECT(aAddress < utilsFlashGetSize()); memcpy(aData, (uint8_t *)mapAddress(aAddress), aSize); result = aSize; exit: return result; }
uint32_t utilsFlashWrite(uint32_t aAddress, uint8_t *aData, uint32_t aSize) { uint32_t result = 0; otEXPECT(aData); otEXPECT(aAddress < utilsFlashGetSize()); otEXPECT(aSize); result = nrf5FlashWrite(mapAddress(aAddress), aData, aSize); exit: return result; }
uint32_t utilsFlashWrite(uint32_t aAddress, uint8_t *aData, uint32_t aSize) { uint32_t rval = aSize; int32_t status; otEXPECT_ACTION(aData, rval = 0); otEXPECT_ACTION(((aAddress + aSize) < utilsFlashGetSize()) && (!(aAddress & 3)) && (!(aSize & 3)), rval = 0); status = MSC_WriteWord((uint32_t *)mapAddress(aAddress), aData, aSize); otEXPECT_ACTION(returnTypeConvert(status) == OT_ERROR_NONE, rval = 0); exit: return rval; }
uint32_t utilsFlashRead(uint32_t aAddress, uint8_t *aData, uint32_t aSize) { uint32_t rval = aSize; uint32_t pAddress = mapAddress(aAddress); uint8_t *byte = aData; otEXPECT_ACTION(aData, rval = 0); otEXPECT_ACTION((aAddress + aSize) < utilsFlashGetSize(), rval = 0); while (aSize--) { *byte++ = (*(uint8_t *)(pAddress++)); } exit: return rval; }
/* * DIPCliMapAddr */ void DIGCLIENT DIPCliMapAddr( addr_ptr *addr, void *ptr ) { mapAddress( addr, ptr ); }
/* * Function invoked by roottask on pagefault */ int pager(L4_ThreadId_t tid, L4_Msg_t *msgP) { send = 1; // Get the faulting address L4_Word_t addr = L4_MsgWord(msgP, 0); L4_Word_t physicalAddress = 0; L4_Word_t permission = 0; L4_MsgTag_t tag; // Alignment addr = (addr / PAGESIZE)*PAGESIZE; tag = L4_MsgMsgTag(msgP); L4_Word_t access_type = L4_Label(tag) & 0x07; //printf("pager invoked addr=%lx by %lx %lx for access 0x%lx\n", addr,L4_ThreadNo(tid),tid.raw,access_type); // Construct fpage IPC message L4_Fpage_t targetFpage = L4_FpageLog2(addr, 12); if(VIRTUAL(addr)) { if(addr >= BASE_CODE_SEGMENT_ADDRESS) { //Code segment int inPage = isInPage(tid,targetFpage); if(inPage == -1) { //It should be in page table so this should not happen printf("Panic !!! Cannot load the code segment"); } else { physicalAddress = new_low + inPage*PAGESIZE; permission = L4_FullyAccessible; } } else { //Heap and stack int inPage = isInPage(tid, targetFpage); if (inPage == -1) { //We need to check if the page is in swap inPage = isInSwap(tid,targetFpage); mapAddress(tid, targetFpage,inPage); //We dont need to map any addresses here as mapAddresses maps the addresses return send; } else { physicalAddress = new_low+inPage*PAGESIZE; targetFpage = page_table[inPage].pageNo; page_table[inPage].referenced = 1; if(access_type & L4_Writable) { //We now need to set the dirty bit and provide read write access page_table[inPage].dirty = 1; permission = L4_ReadWriteOnly; } else { permission = L4_Readable; } } } } else { // we need to map physical addresses 1:1 physicalAddress = addr; if(addr < new_low) { // This is beyond the low memory range ie the page table // and some other addresses which is below the low range permission = L4_FullyAccessible; } else { // This would be the code segment between the new_low and high permission = L4_Readable; } } L4_Set_Rights(&targetFpage,permission); L4_PhysDesc_t phys = L4_PhysDesc(physicalAddress, L4_DefaultMemory); if ( !L4_MapFpage(tid, targetFpage, phys) ) { sos_print_error(L4_ErrorCode()); printf(" Can't map page at %lx\n", addr); } return send; }