C++ (Cpp) mdio_wait Beispiele

Beispiel #1

Datei: xilinx_emaclite.c Projekt: Noltari/u-boot

static u32 phywrite(struct xemaclite *emaclite, u32 phyaddress, u32 registernum,
		    u16 data)
{
	struct emaclite_regs *regs = emaclite->regs;

	if (mdio_wait(regs))
		return 1;

	/*
	 * Write the PHY address, register number and clear the OP bit in the
	 * MDIO Address register and then write the value into the MDIO Write
	 * Data register. Finally, set the Status bit in the MDIO Control
	 * register to start a MDIO write transaction.
	 */
	u32 ctrl_reg = __raw_readl(&regs->mdioctrl);
	__raw_writel(~XEL_MDIOADDR_OP_MASK
		& ((phyaddress << XEL_MDIOADDR_PHYADR_SHIFT)
		| registernum), &regs->mdioaddr);
	__raw_writel(data, &regs->mdiowr);
	__raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK, &regs->mdioctrl);

	if (mdio_wait(regs))
		return 1;

	return 0;
}

Beispiel #2

Datei: xilinx_axi_emac.c Projekt: AeroGirl/u-boot-kern3.2

static u32 phywrite(struct eth_device *dev, u32 phyaddress, u32 registernum,
								u32 data)
{
	struct axi_regs *regs = (struct axi_regs *)dev->iobase;
	u32 mdioctrlreg = 0;

	if (mdio_wait(dev))
		return 1;

	mdioctrlreg = ((phyaddress << XAE_MDIO_MCR_PHYAD_SHIFT) &
			XAE_MDIO_MCR_PHYAD_MASK) |
			((registernum << XAE_MDIO_MCR_REGAD_SHIFT)
			& XAE_MDIO_MCR_REGAD_MASK) |
			XAE_MDIO_MCR_INITIATE_MASK |
			XAE_MDIO_MCR_OP_WRITE_MASK;

	/* Write data */
	out_be32(&regs->mdio_mwd, data);

	out_be32(&regs->mdio_mcr, mdioctrlreg);

	if (mdio_wait(dev))
		return 1;

	return 0;
}

Beispiel #3

Datei: xilinx_axi_emac.c Projekt: AeroGirl/u-boot-kern3.2

static u32 phyread(struct eth_device *dev, u32 phyaddress, u32 registernum,
								u16 *val)
{
	struct axi_regs *regs = (struct axi_regs *)dev->iobase;
	u32 mdioctrlreg = 0;

	if (mdio_wait(dev))
		return 1;

	mdioctrlreg = ((phyaddress << XAE_MDIO_MCR_PHYAD_SHIFT) &
			XAE_MDIO_MCR_PHYAD_MASK) |
			((registernum << XAE_MDIO_MCR_REGAD_SHIFT)
			& XAE_MDIO_MCR_REGAD_MASK) |
			XAE_MDIO_MCR_INITIATE_MASK |
			XAE_MDIO_MCR_OP_READ_MASK;

	out_be32(&regs->mdio_mcr, mdioctrlreg);

	if (mdio_wait(dev))
		return 1;

	/* Read data */
	*val = in_be32(&regs->mdio_mrd);
	return 0;
}

Beispiel #4

Datei: xilinx_axi_emac.c Projekt: analogdevicesinc/u-boot-xlnx

static u32 phywrite(struct axidma_priv *priv, u32 phyaddress, u32 registernum,
		    u32 data)
{
	struct axi_regs *regs = priv->iobase;
	u32 mdioctrlreg = 0;

	if (mdio_wait(regs))
		return 1;

	mdioctrlreg = ((phyaddress << XAE_MDIO_MCR_PHYAD_SHIFT) &
			XAE_MDIO_MCR_PHYAD_MASK) |
			((registernum << XAE_MDIO_MCR_REGAD_SHIFT)
			& XAE_MDIO_MCR_REGAD_MASK) |
			XAE_MDIO_MCR_INITIATE_MASK |
			XAE_MDIO_MCR_OP_WRITE_MASK;

	/* Write data */
	writel(data, &regs->mdio_mwd);

	writel(mdioctrlreg, &regs->mdio_mcr);

	if (mdio_wait(regs))
		return 1;

	return 0;
}

Beispiel #5

Datei: xilinx_axi_emac.c Projekt: analogdevicesinc/u-boot-xlnx

static u32 phyread(struct axidma_priv *priv, u32 phyaddress, u32 registernum,
		   u16 *val)
{
	struct axi_regs *regs = priv->iobase;
	u32 mdioctrlreg = 0;

	if (mdio_wait(regs))
		return 1;

	mdioctrlreg = ((phyaddress << XAE_MDIO_MCR_PHYAD_SHIFT) &
			XAE_MDIO_MCR_PHYAD_MASK) |
			((registernum << XAE_MDIO_MCR_REGAD_SHIFT)
			& XAE_MDIO_MCR_REGAD_MASK) |
			XAE_MDIO_MCR_INITIATE_MASK |
			XAE_MDIO_MCR_OP_READ_MASK;

	writel(mdioctrlreg, &regs->mdio_mcr);

	if (mdio_wait(regs))
		return 1;

	/* Read data */
	*val = readl(&regs->mdio_mrd);
	return 0;
}

Beispiel #6

Datei: zynq_gem.c Projekt: CelerityEDS/u-boot-xlnx

static u32 phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum,
			u32 op, u16 *data)
{
	u32 mgtcr;
	struct zynq_gem_regs *regs = priv->iobase;

	if (mdio_wait(regs))
		return 1;

	/* Construct mgtcr mask for the operation */
	mgtcr = ZYNQ_GEM_PHYMNTNC_OP_MASK | op |
		(phy_addr << ZYNQ_GEM_PHYMNTNC_PHYAD_SHIFT_MASK) |
		(regnum << ZYNQ_GEM_PHYMNTNC_PHREG_SHIFT_MASK) | *data;

	/* Write mgtcr and wait for completion */
	writel(mgtcr, &regs->phymntnc);

	if (mdio_wait(regs))
		return 1;

	if (op == ZYNQ_GEM_PHYMNTNC_OP_R_MASK)
		*data = readl(&regs->phymntnc);

	return 0;
}

Beispiel #7

Datei: zynq_gem.c Projekt: youncta-dev/u-boot-xlnx

static u32 phy_setup_op(struct eth_device *dev, u32 phy_addr, u32 regnum,
							u32 op, u16 *data)
{
	u32 mgtcr;
	struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase;

	if (mdio_wait(dev))
		return 1;

	/* Construct mgtcr mask for the operation */
	mgtcr = ZYNQ_GEM_PHYMNTNC_OP_MASK | op |
		(phy_addr << ZYNQ_GEM_PHYMNTNC_PHYAD_SHIFT_MASK) |
		(regnum << ZYNQ_GEM_PHYMNTNC_PHREG_SHIFT_MASK) | *data;


	debug("%s: phy_addr %d, regnum 0x%x, mgtcr %08x, reg_phymntnc %08x\n", __func__, phy_addr, regnum, mgtcr, &regs->phymntnc);

	/* Write mgtcr and wait for completion */
	writel(mgtcr, &regs->phymntnc);

	if (mdio_wait(dev))
		return 1;

	if (op == ZYNQ_GEM_PHYMNTNC_OP_R_MASK)
		*data = readl(&regs->phymntnc);

	return 0;
}

Beispiel #8

Datei: xilinx_emaclite.c Projekt: Noltari/u-boot

static u32 phyread(struct xemaclite *emaclite, u32 phyaddress, u32 registernum,
		   u16 *data)
{
	struct emaclite_regs *regs = emaclite->regs;

	if (mdio_wait(regs))
		return 1;

	u32 ctrl_reg = __raw_readl(&regs->mdioctrl);
	__raw_writel(XEL_MDIOADDR_OP_MASK
		| ((phyaddress << XEL_MDIOADDR_PHYADR_SHIFT)
		| registernum), &regs->mdioaddr);
	__raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK, &regs->mdioctrl);

	if (mdio_wait(regs))
		return 1;

	/* Read data */
	*data = __raw_readl(&regs->mdiord);
	return 0;
}