static void mdnie_pwm_control(struct mdnie_info *mdnie, int value)
{
mutex_lock(&mdnie->dev_lock);
mdnie_write(0x00, 0x0001);
mdnie_write(0xB6, 0xC000 | value);
mdnie_write(0xff, 0x0000);
mutex_unlock(&mdnie->dev_lock);
}
static void mdnie_pwm_control(struct mdnie_info *mdnie, int value)
{
mutex_lock(&mdnie->dev_lock);
mdnie_write(MDNIE_REG_BANK_SEL, MDNIE_PWM_BANK);
mdnie_write(MDNIE_REG_PWM_CONTROL, 0xC000 | value);
mdnie_write(MDNIE_REG_MASK, 0);
mutex_unlock(&mdnie->dev_lock);
}
static void mdnie_pwm_control_cabc(struct mdnie_info *mdnie, int value)
{
int reg;
const unsigned char *p_plut;
u16 min_duty;
unsigned idx;
mutex_lock(&mdnie->dev_lock);
idx = tunning_table[mdnie->cabc][mdnie->mode][mdnie->scenario].idx_lut;
p_plut = power_lut[idx];
min_duty = p_plut[7] * value / 100;
mdnie_write(0x00, 0x0001);
if (min_duty < 4)
reg = 0xC000 | (max(1, (value * p_plut[3] / 100)));
else {
/*PowerLUT*/
mdnie_write(0x79, (p_plut[0] * value / 100) << 8 | (p_plut[1] * value / 100));
mdnie_write(0x7a, (p_plut[2] * value / 100) << 8 | (p_plut[3] * value / 100));
mdnie_write(0x7b, (p_plut[4] * value / 100) << 8 | (p_plut[5] * value / 100));
mdnie_write(0x7c, (p_plut[6] * value / 100) << 8 | (p_plut[7] * value / 100));
mdnie_write(0x7d, (p_plut[8] * value / 100) << 8);
reg = 0x5000 | (value << 4);
}
mdnie_write(0xB6, reg);
mdnie_write(0xff, 0x0000);
mutex_unlock(&mdnie->dev_lock);
}
static void mdnie_pwm_control_cabc(struct mdnie_info *mdnie, int value)
{
int reg;
const unsigned char *p_plut;
u16 min_duty;
unsigned idx;
mutex_lock(&mdnie->dev_lock);
idx = SCENARIO_IS_VIDEO(mdnie->scenario) ? LUT_VIDEO : LUT_DEFAULT;
p_plut = power_lut[mdnie->power_lut_idx][idx];
min_duty = p_plut[7] * value / 100;
mdnie_write(MDNIE_REG_BANK_SEL, MDNIE_PWM_BANK);
if (min_duty < 4)
reg = 0xC000 | (max(1, (value * p_plut[3] / 100)));
else {
/*PowerLUT*/
mdnie_write(MDNIE_REG_POWER_LUT0, (p_plut[0] * value / 100) << 8 | (p_plut[1] * value / 100));
mdnie_write(MDNIE_REG_POWER_LUT2, (p_plut[2] * value / 100) << 8 | (p_plut[3] * value / 100));
mdnie_write(MDNIE_REG_POWER_LUT4, (p_plut[4] * value / 100) << 8 | (p_plut[5] * value / 100));
mdnie_write(MDNIE_REG_POWER_LUT6, (p_plut[6] * value / 100) << 8 | (p_plut[7] * value / 100));
mdnie_write(MDNIE_REG_POWER_LUT8, (p_plut[8] * value / 100) << 8);
reg = 0x5000 | (value << 4);
}
mdnie_write(MDNIE_REG_PWM_CONTROL, reg);
mdnie_write(MDNIE_REG_MASK, 0);
mutex_unlock(&mdnie->dev_lock);
}
int mdnie_send_sequence(struct mdnie_info *mdnie, const unsigned short *seq)
{
int ret = 0, i = 0;
const unsigned short *wbuf;
if (IS_ERR_OR_NULL(seq)) {
dev_err(mdnie->dev, "mdnie sequence is null\n");
return -EPERM;
}
mutex_lock(&mdnie->dev_lock);
wbuf = seq;
s3c_mdnie_mask();
while (wbuf[i] != END_SEQ) {
mdnie_write(wbuf[i], wbuf[i+1]);
i += 2;
}
s3c_mdnie_unmask();
mutex_unlock(&mdnie->dev_lock);
return ret;
}
int mdnie_send_sequence(struct mdnie_info *mdnie, const unsigned short *seq)
{
int ret = 0, i = 0;
const unsigned short *wbuf;
if (!mdnie->enable) {
dev_err(mdnie->dev, "do not configure mDNIe after LCD/mDNIe power off\n");
return -EPERM;
}
mutex_lock(&mdnie->dev_lock);
wbuf = seq;
s3c_mdnie_mask();
while (wbuf[i] != END_SEQ) {
mdnie_write(wbuf[i], wbuf[i+1]);
i += 2;
}
s3c_mdnie_unmask();
mutex_unlock(&mdnie->dev_lock);
return ret;
}
int mdnie_send_sequence(struct mdnie_info *mdnie, unsigned short *seq)
{
int ret = 0, i = 0;
unsigned short *wbuf;
if (IS_ERR_OR_NULL(seq)) {
dev_err(mdnie->dev, "mdnie sequence is null\n");
return -EPERM;
}
mutex_lock(&mdnie->dev_lock);
wbuf = mdnie_sequence_hook(mdnie, seq);
mdnie_mask();
while (wbuf[i] != END_SEQ) {
ret += mdnie_write(wbuf[i], mdnie_reg_hook(wbuf[i], wbuf[i+1]));
i += 2;
}
mdnie_unmask();
mutex_unlock(&mdnie->dev_lock);
return ret;
}
int mdnie_send_sequence(struct mdnie_info *mdnie, const unsigned short *seq)
{
int ret = 0, i = 0;
const unsigned short *wbuf;
if (!mdnie->enable) {
dev_err(mdnie->dev, "do not configure mDNIe after LCD/mDNIe power off\n");
return -EPERM;
}
mutex_lock(&mdnie->dev_lock);
wbuf = seq;
s3c_mdnie_mask();
while (wbuf[i] != END_SEQ) {
if (g_mdnie->user_mode != 0x0000) {
switch (wbuf[i]) {
case 0x0063:
mdnie_write(wbuf[i], g_mdnie->user_cb);
break;
case 0x0065:
mdnie_write(wbuf[i], g_mdnie->user_cr);
break;
default:
mdnie_write(wbuf[i], wbuf[i+1]);
break;
}
} else {
mdnie_write(wbuf[i], wbuf[i+1]);
}
i += 2;
}
s3c_mdnie_unmask();
mutex_unlock(&mdnie->dev_lock);
return ret;
}
static int mdnie_write_table(struct mdnie_info *mdnie, struct mdnie_table *table)
{
int i, ret = 0;
struct mdnie_table *buf = NULL;
for (i = 0; table->seq[i].len; i++) {
if (IS_ERR_OR_NULL(table->seq[i].cmd)) {
dev_err(mdnie->dev, "mdnie sequence %s %dth command is null,\n", table->name, i);
return -EPERM;
}
}
mutex_lock(&mdnie->dev_lock);
buf = table;
ret = mdnie_write(mdnie, buf, i);
mutex_unlock(&mdnie->dev_lock);
return ret;
}
static int mdnie_write_table(struct mdnie_info *mdnie, struct mdnie_table *table)
{
int i, ret = 0;
struct mdnie_table *buf = NULL;
for (i = 0; i < MDNIE_CMD_MAX; i++) {
if (IS_ERR_OR_NULL(table->tune[i].sequence)) {
dev_err(mdnie->dev, "mdnie sequence %s is null, %lx\n",
table->name, (unsigned long)table->tune[i].sequence);
return -EPERM;
}
}
mutex_lock(&mdnie->dev_lock);
buf = table;
ret = mdnie_write(mdnie, buf);
mutex_unlock(&mdnie->dev_lock);
return ret;
}
