static int mdss_dsi_blank(struct mdss_panel_data *pdata)
{
int ret = 0;
struct mipi_panel_info *mipi;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
pr_debug("%s+:\n", __func__);
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
return -EINVAL;
}
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
mipi = &pdata->panel_info.mipi;
if (__mdss_dsi_ulps_feature_enabled(pdata) &&
(ctrl_pdata->ulps)) {
/* Disable ULPS mode before blanking the panel */
ret = mdss_dsi_ulps_config(ctrl_pdata, 0);
if (ret) {
pr_err("%s: failed to exit ULPS mode. rc=%d\n",
__func__, ret);
return ret;
}
}
if (pdata->panel_info.type == MIPI_VIDEO_PANEL &&
ctrl_pdata->off_cmds.link_state == DSI_LP_MODE) {
mdss_dsi_sw_reset(pdata);
mdss_dsi_host_init(pdata);
}
mdss_dsi_op_mode_config(DSI_CMD_MODE, pdata);
if (pdata->panel_info.dynamic_switch_pending) {
pr_info("%s: switching to %s mode\n", __func__,
(pdata->panel_info.mipi.mode ? "video" : "command"));
if (pdata->panel_info.type == MIPI_CMD_PANEL) {
ctrl_pdata->switch_mode(pdata, DSI_VIDEO_MODE);
} else if (pdata->panel_info.type == MIPI_VIDEO_PANEL) {
ctrl_pdata->switch_mode(pdata, DSI_CMD_MODE);
mdss_dsi_set_tear_off(ctrl_pdata);
}
}
if (pdata->panel_info.type == MIPI_CMD_PANEL) {
if (mipi->vsync_enable && mipi->hw_vsync_mode
&& gpio_is_valid(ctrl_pdata->disp_te_gpio)) {
mdss_dsi_set_tear_off(ctrl_pdata);
}
}
if (ctrl_pdata->ctrl_state & CTRL_STATE_PANEL_INIT) {
if (!pdata->panel_info.dynamic_switch_pending) {
ret = ctrl_pdata->off(pdata);
if (ret) {
pr_err("%s: Panel OFF failed\n", __func__);
return ret;
}
}
ctrl_pdata->ctrl_state &= ~CTRL_STATE_PANEL_INIT;
}
pr_debug("%s-:End\n", __func__);
return ret;
}
static int mdss_dsi_event_handler(struct mdss_panel_data *pdata,
int event, void *arg)
{
int rc = 0;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
return -EINVAL;
}
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
pr_debug("%s+:event=%d\n", __func__, event);
MDSS_XLOG(event, arg, ctrl_pdata->ndx, 0x3333);
switch (event) {
case MDSS_EVENT_UNBLANK:
rc = mdss_dsi_on(pdata);
mdss_dsi_op_mode_config(pdata->panel_info.mipi.mode,
pdata);
if (ctrl_pdata->on_cmds.link_state == DSI_LP_MODE)
rc = mdss_dsi_unblank(pdata);
break;
case MDSS_EVENT_PANEL_ON:
ctrl_pdata->ctrl_state |= CTRL_STATE_MDP_ACTIVE;
if (ctrl_pdata->on_cmds.link_state == DSI_HS_MODE)
rc = mdss_dsi_unblank(pdata);
break;
case MDSS_EVENT_BLANK:
if (ctrl_pdata->off_cmds.link_state == DSI_HS_MODE)
rc = mdss_dsi_blank(pdata);
break;
case MDSS_EVENT_PANEL_OFF:
ctrl_pdata->ctrl_state &= ~CTRL_STATE_MDP_ACTIVE;
if (ctrl_pdata->off_cmds.link_state == DSI_LP_MODE)
rc = mdss_dsi_blank(pdata);
rc = mdss_dsi_off(pdata);
break;
case MDSS_EVENT_CONT_SPLASH_FINISH:
if (ctrl_pdata->off_cmds.link_state == DSI_LP_MODE)
rc = mdss_dsi_blank(pdata);
ctrl_pdata->ctrl_state &= ~CTRL_STATE_MDP_ACTIVE;
rc = mdss_dsi_cont_splash_on(pdata);
break;
case MDSS_EVENT_PANEL_CLK_CTRL:
mdss_dsi_clk_req(ctrl_pdata, (int)arg);
break;
case MDSS_EVENT_DSI_CMDLIST_KOFF:
mdss_dsi_cmdlist_commit(ctrl_pdata, 1);
break;
case MDSS_EVENT_PANEL_UPDATE_FPS:
if (arg != NULL) {
rc = mdss_dsi_dfps_config(pdata, (int)arg);
pr_debug("%s:update fps to = %d\n",
__func__, (int)arg);
}
break;
case MDSS_EVENT_CONT_SPLASH_BEGIN:
if (ctrl_pdata->off_cmds.link_state == DSI_HS_MODE) {
/* Panel is Enabled in Bootloader */
rc = mdss_dsi_blank(pdata);
}
break;
case MDSS_EVENT_ENABLE_PARTIAL_UPDATE:
rc = mdss_dsi_ctl_partial_update(pdata);
break;
case MDSS_EVENT_DSI_ULPS_CTRL:
rc = mdss_dsi_ulps_config(ctrl_pdata, (int)arg);
break;
case MDSS_EVENT_REGISTER_RECOVERY_HANDLER:
rc = mdss_dsi_register_recovery_handler(ctrl_pdata,
(struct mdss_panel_recovery *)arg);
break;
case MDSS_EVENT_DSI_DYNAMIC_SWITCH:
rc = mdss_dsi_update_panel_config(ctrl_pdata,
(int)(unsigned long) arg);
break;
default:
pr_debug("%s: unhandled event=%d\n", __func__, event);
break;
}
pr_debug("%s-:event=%d, rc=%d\n", __func__, event, rc);
return rc;
}
static int mdss_dsi_ulps_config_sub(struct mdss_dsi_ctrl_pdata *ctrl_pdata,
int enable)
{
int ret = 0;
struct mdss_panel_data *pdata = NULL;
struct mipi_panel_info *pinfo = NULL;
u32 lane_status = 0;
u32 active_lanes = 0;
if (!ctrl_pdata) {
pr_err("%s: invalid input\n", __func__);
return -EINVAL;
}
pdata = &ctrl_pdata->panel_data;
if (!pdata) {
pr_err("%s: Invalid panel data\n", __func__);
return -EINVAL;
}
pinfo = &pdata->panel_info.mipi;
if (!__mdss_dsi_ulps_feature_enabled(pdata)) {
pr_debug("%s: ULPS feature not supported. enable=%d\n",
__func__, enable);
return -ENOTSUPP;
}
if (enable && !ctrl_pdata->ulps) {
/* No need to configure ULPS mode when entering suspend state */
if (!pdata->panel_info.panel_power_on) {
pr_err("%s: panel off. returning\n", __func__);
goto error;
}
if (__mdss_dsi_clk_enabled(ctrl_pdata, DSI_LINK_CLKS)) {
pr_err("%s: cannot enter ulps mode if dsi clocks are on\n",
__func__);
ret = -EPERM;
goto error;
}
ret = mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 1);
if (ret) {
pr_err("%s: Failed to enable clocks. rc=%d\n",
__func__, ret);
goto error;
}
/*
* ULPS Entry Request.
* Wait for a short duration to ensure that the lanes
* enter ULP state.
*/
MIPI_OUTP(ctrl_pdata->ctrl_base + 0x0AC, 0x01F);
usleep(100);
/* Check to make sure that all active data lanes are in ULPS */
if (pinfo->data_lane3)
active_lanes |= BIT(11);
if (pinfo->data_lane2)
active_lanes |= BIT(10);
if (pinfo->data_lane1)
active_lanes |= BIT(9);
if (pinfo->data_lane0)
active_lanes |= BIT(8);
active_lanes |= BIT(12); /* clock lane */
lane_status = MIPI_INP(ctrl_pdata->ctrl_base + 0xA8);
if (lane_status & active_lanes) {
pr_err("%s: ULPS entry req failed. Lane status=0x%08x\n",
__func__, lane_status);
ret = -EINVAL;
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 0);
goto error;
}
/* Enable MMSS DSI Clamps */
MIPI_OUTP(ctrl_pdata->mmss_misc_io.base + 0x14, 0x3FF);
MIPI_OUTP(ctrl_pdata->mmss_misc_io.base + 0x14, 0x83FF);
wmb();
MIPI_OUTP(ctrl_pdata->mmss_misc_io.base + 0x108, 0x1);
/* disable DSI controller */
mdss_dsi_controller_cfg(0, pdata);
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 0);
ctrl_pdata->ulps = true;
} else if (ctrl_pdata->ulps) {
ret = mdss_dsi_clk_ctrl(ctrl_pdata, DSI_BUS_CLKS, 1);
if (ret) {
pr_err("%s: Failed to enable bus clocks. rc=%d\n",
__func__, ret);
goto error;
}
MIPI_OUTP(ctrl_pdata->mmss_misc_io.base + 0x108, 0x0);
mdss_dsi_phy_init(pdata);
__mdss_dsi_ctrl_setup(pdata);
mdss_dsi_sw_reset(pdata);
mdss_dsi_host_init(pdata);
mdss_dsi_op_mode_config(pdata->panel_info.mipi.mode,
pdata);
/*
* ULPS Entry Request. This is needed because, after power
* collapse and reset, the DSI controller resets back to
* idle state and not ULPS.
* Wait for a short duration to ensure that the lanes
* enter ULP state.
*/
MIPI_OUTP(ctrl_pdata->ctrl_base + 0x0AC, 0x01F);
usleep(100);
/* Disable MMSS DSI Clamps */
MIPI_OUTP(ctrl_pdata->mmss_misc_io.base + 0x14, 0x3FF);
MIPI_OUTP(ctrl_pdata->mmss_misc_io.base + 0x14, 0x0);
ret = mdss_dsi_clk_ctrl(ctrl_pdata, DSI_LINK_CLKS, 1);
if (ret) {
pr_err("%s: Failed to enable link clocks. rc=%d\n",
__func__, ret);
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_BUS_CLKS, 0);
goto error;
}
/*
* ULPS Exit Request
* Hardware requirement is to wait for at least 1ms
*/
MIPI_OUTP(ctrl_pdata->ctrl_base + 0x0AC, 0x1F00);
usleep(1000);
MIPI_OUTP(ctrl_pdata->ctrl_base + 0x0AC, 0x0);
/*
* Wait for a short duration before enabling
* data transmission
*/
usleep(100);
lane_status = MIPI_INP(ctrl_pdata->ctrl_base + 0xA8);
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_LINK_CLKS, 0);
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_BUS_CLKS, 0);
ctrl_pdata->ulps = false;
}
pr_debug("%s: DSI lane status = 0x%08x. Ulps %s\n", __func__,
lane_status, enable ? "enabled" : "disabled");
error:
return ret;
}
int mdss_dsi_ulps_config(struct mdss_dsi_ctrl_pdata *ctrl_pdata, int enable)
{
int ret = 0;
struct mdss_panel_data *pdata = NULL;
struct mdss_panel_info *pinfo;
struct mipi_panel_info *mipi;
u32 lane_status = 0, regval;
u32 active_lanes = 0, clamp_reg;
if (!ctrl_pdata) {
pr_err("%s: invalid input\n", __func__);
return -EINVAL;
}
if (&ctrl_pdata->mmss_misc_io == NULL) {
pr_err("%s: mmss_misc_io is NULL. ULPS not valid\n", __func__);
return -EINVAL;
}
pdata = &ctrl_pdata->panel_data;
if (!pdata) {
pr_err("%s: Invalid panel data\n", __func__);
return -EINVAL;
}
pinfo = &pdata->panel_info;
mipi = &pinfo->mipi;
if (!mdss_dsi_ulps_feature_enabled(pdata)) {
pr_debug("%s: ULPS feature not supported. enable=%d\n",
__func__, enable);
return -ENOTSUPP;
}
if (pinfo->cont_splash_enabled) {
pr_debug("%s: skip ULPS config with splash screen enabled\n",
__func__);
return 0;
}
active_lanes = BIT(4);
clamp_reg = BIT(8) | BIT(9);
if (mipi->data_lane0) {
active_lanes |= BIT(0);
clamp_reg |= (BIT(0) | BIT(1));
}
if (mipi->data_lane1) {
active_lanes |= BIT(1);
clamp_reg |= (BIT(2) | BIT(3));
}
if (mipi->data_lane2) {
active_lanes |= BIT(2);
clamp_reg |= (BIT(4) | BIT(5));
}
if (mipi->data_lane3) {
active_lanes |= BIT(3);
clamp_reg |= (BIT(6) | BIT(7));
}
pr_debug("%s: configuring ulps (%s) for ctrl%d, active lanes=0x%08x\n",
__func__, (enable ? "on" : "off"), ctrl_pdata->ndx,
active_lanes);
if (enable && !ctrl_pdata->ulps) {
MIPI_OUTP(ctrl_pdata->ctrl_base + 0x0AC, active_lanes);
usleep(100);
lane_status = MIPI_INP(ctrl_pdata->ctrl_base + 0xA8);
if (lane_status & (active_lanes << 8)) {
pr_err("%s: ULPS entry req failed for ctrl%d. Lane status=0x%08x\n",
__func__, ctrl_pdata->ndx, lane_status);
ret = -EINVAL;
goto error;
}
if (ctrl_pdata->ndx == DSI_CTRL_0) {
regval = MIPI_INP(ctrl_pdata->mmss_misc_io.base + 0x14);
MIPI_OUTP(ctrl_pdata->mmss_misc_io.base + 0x14,
regval | clamp_reg);
MIPI_OUTP(ctrl_pdata->mmss_misc_io.base + 0x14,
regval | (clamp_reg | BIT(15)));
} else if (ctrl_pdata->ndx == DSI_CTRL_1) {
regval = MIPI_INP(ctrl_pdata->mmss_misc_io.base + 0x14);
MIPI_OUTP(ctrl_pdata->mmss_misc_io.base + 0x14,
regval | (clamp_reg << 16));
MIPI_OUTP(ctrl_pdata->mmss_misc_io.base + 0x14,
regval | ((clamp_reg << 16) | BIT(31)));
}
wmb();
MIPI_OUTP(ctrl_pdata->mmss_misc_io.base + 0x108, 0x1);
ctrl_pdata->ulps = true;
} else if (ctrl_pdata->ulps) {
MIPI_OUTP(ctrl_pdata->mmss_misc_io.base + 0x108, 0x0);
mdss_dsi_phy_init(pdata);
__mdss_dsi_ctrl_setup(pdata);
mdss_dsi_sw_reset(pdata);
mdss_dsi_host_init(pdata);
mdss_dsi_op_mode_config(pdata->panel_info.mipi.mode,
pdata);
MIPI_OUTP(ctrl_pdata->ctrl_base + 0x0AC, active_lanes);
usleep(100);
if (ctrl_pdata->ndx == DSI_CTRL_0) {
regval = MIPI_INP(ctrl_pdata->mmss_misc_io.base + 0x14);
MIPI_OUTP(ctrl_pdata->mmss_misc_io.base + 0x14,
regval & ~(clamp_reg | BIT(15)));
} else if (ctrl_pdata->ndx == DSI_CTRL_1) {
regval = MIPI_INP(ctrl_pdata->mmss_misc_io.base + 0x14);
MIPI_OUTP(ctrl_pdata->mmss_misc_io.base + 0x14,
regval & ~((clamp_reg << 16) | BIT(31)));
}
MIPI_OUTP(ctrl_pdata->ctrl_base + 0x0AC, active_lanes << 8);
usleep(1000);
MIPI_OUTP(ctrl_pdata->ctrl_base + 0x0AC, 0x0);
usleep(100);
lane_status = MIPI_INP(ctrl_pdata->ctrl_base + 0xA8);
ctrl_pdata->ulps = false;
}
pr_debug("%s: DSI lane status = 0x%08x. Ulps %s\n", __func__,
lane_status, enable ? "enabled" : "disabled");
error:
return ret;
}
static int mdss_dsi_clk_ctrl_sub(struct mdss_dsi_ctrl_pdata *ctrl,
u8 clk_type, int enable)
{
int rc = 0;
struct mdss_panel_data *pdata;
if (!ctrl) {
pr_err("%s: Invalid arg\n", __func__);
return -EINVAL;
}
pdata = &ctrl->panel_data;
pr_debug("%s: ndx=%d clk_type=%08x enable=%d\n", __func__,
ctrl->ndx, clk_type, enable);
if (enable) {
if (clk_type & DSI_BUS_CLKS) {
/* enable mdss gdsc */
pr_debug("%s: Enable MDP FS\n", __func__);
rc = msm_dss_enable_vreg(
ctrl->power_data[DSI_CORE_PM].vreg_config,
ctrl->power_data[DSI_CORE_PM].num_vreg, 1);
if (rc) {
pr_err("%s: failed to enable vregs for %s\n",
__func__,
__mdss_dsi_pm_name(DSI_CORE_PM));
goto error;
}
rc = mdss_dsi_bus_clk_start(ctrl);
if (rc) {
pr_err("Failed to start bus clocks. rc=%d\n",
rc);
goto error_vreg;
}
}
if (clk_type & DSI_LINK_CLKS) {
if (ctrl->mmss_clamp) {
mdss_dsi_phy_init(pdata);
mdss_dsi_ctrl_setup(pdata);
mdss_dsi_host_init(pdata);
mdss_dsi_op_mode_config(pdata->panel_info.mipi.mode,
pdata);
/*
* ULPS Entry Request. This is needed because, after power
* collapse and reset, the DSI controller resets back to
* idle state and not ULPS.
*/
mdss_dsi_ulps_config(ctrl, 1);
mdss_dsi_clamp_ctrl(ctrl, 0);
}
rc = mdss_dsi_link_clk_start(ctrl);
if (rc) {
pr_err("Failed to start link clocks. rc=%d\n",
rc);
goto error_link_clk_start;
}
/* Disable ULPS, if enabled */
if (ctrl->ulps) {
rc = mdss_dsi_ulps_config(ctrl, 0);
if (rc) {
pr_err("Failed to exit ulps. rc=%d\n",
rc);
goto error_ulps_exit;
}
}
}
} else {
if (clk_type & DSI_LINK_CLKS) {
/*
* If ULPS feature is enabled, enter ULPS first.
* No need to enable ULPS when turning off clocks
* while blanking the panel.
*/
if (((mdss_dsi_ulps_feature_enabled(pdata)) &&
(pdata->panel_info.panel_power_on)) ||
(pdata->panel_info.ulps_suspend_enabled &&
!pdata->panel_info.panel_power_on)) {
mdss_dsi_ulps_config(ctrl, 1);
mdss_dsi_link_clk_stop(ctrl);
mdss_dsi_clamp_ctrl(ctrl, 1);
} else {
mdss_dsi_link_clk_stop(ctrl);
}
}
if (clk_type & DSI_BUS_CLKS) {
mdss_dsi_bus_clk_stop(ctrl);
/* disable mdss gdsc */
pr_debug("%s: Disable MDP FS\n", __func__);
rc = msm_dss_enable_vreg(
ctrl->power_data[DSI_CORE_PM].vreg_config,
ctrl->power_data[DSI_CORE_PM].num_vreg, 0);
if (rc) {
pr_warn("%s: failed to disable vregs for %s\n",
__func__,
__mdss_dsi_pm_name(DSI_CORE_PM));
rc = 0;
}
}
}
return rc;
error_ulps_exit:
mdss_dsi_link_clk_stop(ctrl);
error_link_clk_start:
if (clk_type & DSI_BUS_CLKS)
mdss_dsi_bus_clk_stop(ctrl);
error_vreg:
if ((clk_type & DSI_BUS_CLKS) &&
(msm_dss_enable_vreg(ctrl->power_data[DSI_CORE_PM].vreg_config,
ctrl->power_data[DSI_CORE_PM].num_vreg, 0))) {
pr_warn("%s: failed to disable vregs for %s\n", __func__,
__mdss_dsi_pm_name(DSI_CORE_PM));
}
error:
return rc;
}
static int mdss_dsi_event_handler(struct mdss_panel_data *pdata,
int event, void *arg)
{
int rc = 0;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
return -EINVAL;
}
#if defined(CONFIG_LCD_CONNECTION_CHECK) && defined(CONFIG_FB_MSM_MDSS_HIMAX_QHD_PANEL)
if(is_lcd_attached() == 0){
pr_err("%s: LCD not connected.\n", __func__);
return 0;
}
#endif
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
pr_debug("%s+:event=%d\n", __func__, event);
switch (event) {
case MDSS_EVENT_UNBLANK:
rc = mdss_dsi_on(pdata);
mdss_dsi_op_mode_config(pdata->panel_info.mipi.mode,
pdata);
if (ctrl_pdata->on_cmds.link_state == DSI_LP_MODE)
rc = mdss_dsi_unblank(pdata);
break;
case MDSS_EVENT_PANEL_ON:
ctrl_pdata->ctrl_state |= CTRL_STATE_MDP_ACTIVE;
if (ctrl_pdata->on_cmds.link_state == DSI_HS_MODE)
rc = mdss_dsi_unblank(pdata);
break;
case MDSS_EVENT_BLANK:
if (ctrl_pdata->off_cmds.link_state == DSI_HS_MODE)
rc = mdss_dsi_blank(pdata);
break;
case MDSS_EVENT_PANEL_OFF:
ctrl_pdata->ctrl_state &= ~CTRL_STATE_MDP_ACTIVE;
if (ctrl_pdata->off_cmds.link_state == DSI_LP_MODE)
rc = mdss_dsi_blank(pdata);
rc = mdss_dsi_off(pdata);
break;
case MDSS_EVENT_FB_REGISTERED:
/*
* Okay, since framebuffer is registered, display the kernel logo if needed
*/
if (!ctrl_pdata->panel_data.panel_info.cont_splash_enabled) {
// load_samsung_boot_logo();
}
break;
case MDSS_EVENT_CONT_SPLASH_FINISH:
ctrl_pdata->ctrl_state &= ~CTRL_STATE_MDP_ACTIVE;
if (ctrl_pdata->on_cmds.link_state == DSI_LP_MODE) {
rc = mdss_dsi_cont_splash_on(pdata);
} else {
pr_debug("%s:event=%d, Dsi On not called: ctrl_state: %d\n",
__func__, event,
ctrl_pdata->on_cmds.link_state);
rc = -EINVAL;
}
break;
case MDSS_EVENT_PANEL_CLK_CTRL:
mdss_dsi_clk_req(ctrl_pdata, (int)arg);
break;
case MDSS_EVENT_DSI_CMDLIST_KOFF:
mdss_dsi_cmdlist_commit(ctrl_pdata, 1);
break;
case MDSS_EVENT_PANEL_UPDATE_FPS:
if (arg != NULL) {
rc = mdss_dsi_dfps_config(pdata, (int)arg);
pr_debug("%s:update fps to = %d\n",
__func__, (int)arg);
}
break;
case MDSS_EVENT_CONT_SPLASH_BEGIN:
if (ctrl_pdata->off_cmds.link_state == DSI_HS_MODE) {
/* Panel is Enabled in Bootloader */
rc = mdss_dsi_blank(pdata);
}
break;
case MDSS_EVENT_ENABLE_PARTIAL_UPDATE:
rc = mdss_dsi_ctl_partial_update(pdata);
break;
default:
pr_debug("%s: unhandled event=%d\n", __func__, event);
break;
}
pr_debug("%s-:event=%d, rc=%d\n", __func__, event, rc);
return rc;
}
int mdss_dsi_cont_splash_on(struct mdss_panel_data *pdata)
{
int ret = 0;
struct mipi_panel_info *mipi;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
pr_info("%s:%d DSI on for continuous splash.\n", __func__, __LINE__);
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
return -EINVAL;
}
#if defined(CONFIG_FB_MSM_MDSS_S6E8AA0A_HD_PANEL)
mdss_dsi_reset(pdata);
#endif
mipi = &pdata->panel_info.mipi;
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
pr_debug("%s+: ctrl=%p ndx=%d\n", __func__,
ctrl_pdata, ctrl_pdata->ndx);
WARN((ctrl_pdata->ctrl_state & CTRL_STATE_PANEL_INIT),
"Incorrect Ctrl state=0x%x\n", ctrl_pdata->ctrl_state);
#if defined(CONFIG_FB_MSM_MDSS_SDC_WXGA_PANEL)
ret = mdss_dsi_panel_power_on(pdata, 0);
if (ret) {
pr_err("%s: Panel power on with 0 failed\n", __func__);
return ret;
}
mdelay(10);
ret = mdss_dsi_panel_power_on(pdata, 1);
if (ret) {
pr_err("%s: Panel power on with 1 failed\n", __func__);
return ret;
}
#endif
mdss_dsi_sw_reset(pdata);
mdss_dsi_host_init(mipi, pdata);
#if RESET_IN_LP11 // add for LP11
// LP11
{
u32 tmp;
tmp = MIPI_INP((ctrl_pdata->ctrl_base) + 0xac);
tmp &= ~(1<<28);
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0xac, tmp);
wmb();
}
// LP11
(ctrl_pdata->panel_data).panel_reset_fn(pdata, 1);
#endif
if (mipi->force_clk_lane_hs) {
u32 tmp;
tmp = MIPI_INP((ctrl_pdata->ctrl_base) + 0xac);
tmp |= (1<<28);
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0xac, tmp);
wmb();
}
mdss_dsi_op_mode_config(mipi->mode, pdata);
if (ctrl_pdata->on_cmds.link_state == DSI_LP_MODE) {
ret = mdss_dsi_unblank(pdata);
if (ret) {
pr_err("%s: unblank failed\n", __func__);
return ret;
}
}
pr_debug("%s-:End\n", __func__);
return ret;
}
