static void op_writemem(dword opcode,int bytes)
{
int a,*d;
a=op_memaddr(opcode);
if(bytes>0x10)
{ // fpu
d =&st.f[OP_RT(opcode)].d;
bytes-=0x10;
}
else
{
d =&st.g[OP_RT(opcode)].d;
}
switch(bytes)
{
case 1:
mem_write8(a,d[0]);
break;
case 2:
mem_write16(a,d[0]);
break;
case 4:
mem_write32(a,d[0]);
break;
case 8:
mem_write32(a,d[1]);
mem_write32(a+4,d[0]);
break;
}
cpu_notify_writemem(a,bytes);
}
static void op_rwmemrl( dword opcode, int write, int right )
{
dword x, y, a, s, m;
a = op_memaddr(opcode);
s = a & 3;
a &= ~3;
if( write )
{
x = mem_read32(a);
y = st.g[OP_RT(opcode)].d;
if( right )
{
m = 0x00ffffff >> (s * 8);
y <<= (3 - s) * 8;
x &= m;
x |= y;
}
else
{
m = 0xffffff00 << ((3 - s) * 8);
y >>= s * 8;
x &= m;
x |= y;
}
mem_write32( a, x );
}
void pad_writedata(dword addr)
{
dword state;
state=*(dword *)&mypad;
// print("pad %08X\n",state);
st.padstate=state;
mem_write32(addr,FLIP32(state));
}
void hw_si_pads(int write)
{
dword base=WSI[0];
int i;
logh("hw-si: dma %08X (write=%i)\n",base,write);
if(!cart.first_pad)
{
print("note: first pad access\n");
cart.first_pad=1;
}
if(write)
{
for(i=0;i<16;i++)
{
RPIF[0x1f0+i]=mem_read32(base+i*4);
}
}
else
{
// 2 dwords for each controller:
// 000000ss bbbbxxyy
// ss=status? !&00C0 or error
// bbbb=buttons
// xx=stick-x
// yy=stick-y
// construct reply
memset(RPIF+0x1f0,0,16*4);
RPIF[0x1f0+1+2*selectpad]=pad_getdata(0);
// copy it
for(i=0;i<16;i++)
{
mem_write32(base+i*4,RPIF[0x1f0+i]);
}
}
/*
for(i=0;i<16;i++)
{
print("%08X ",RPIF[0x1f0+i]);
if((i&3)==3) print("\n");
}
*/
WSI[1]=NULLFILL;
WSI[4]=NULLFILL;
RSI[0]=WSI[0];
RSI[6]=0; // not busy
os_event(OS_EVENT_SI);
}
void writeshort(int *q,dword addr,int bytes)
{
int x,a,b,i;
bytes>>=1;
for(i=0;i<bytes;i+=2)
{
a=q[i+0]&0xffff;
b=q[i+1]&0xffff;
x=(a<<16)+b;
mem_write32(addr+i*2,x);
}
}
int pif_plugin_hoptime_statistics(EXTRACTED_HEADERS_T *headers,
MATCH_DATA_T *match_data)
{
PIF_PLUGIN_hoptime_T *hoptime = pif_plugin_hdr_get_hoptime(headers);
__xread struct hoptime_data in_xfer;
__gpr struct hoptime_data out_reg;
__xwrite struct hoptime_data out_xfer;
uint64_t ctime, ptime;
uint64_t latency;
unsigned port;
/* Get the time at parsing from the intrinsic metadata timestamp
* Note that we do this in two parts __0 being the 32 lsbs and __1 the 16
* msbs
*/
ctime = pif_plugin_meta_get__intrinsic_metadata__ingress_global_tstamp__0(headers);
ctime |= ((uint64_t)pif_plugin_meta_get__intrinsic_metadata__ingress_global_tstamp__1(headers)) << 32;
/* Retrieve ingress port from P4 metadata */
port = pif_plugin_meta_get__standard_metadata__ingress_port(headers);
/* we don't error out here, we just use use a reserved bucket */
if (port >= PORTMAX)
port = PORTMAX;
/* Retrieve the previous hop time from the hoptime header field */
ptime = ((uint64_t)PIF_HEADER_GET_hoptime___time___1(hoptime)) << 32;
ptime |= PIF_HEADER_GET_hoptime___time___0(hoptime);
latency = ctime - ptime;
mem_read32(&in_xfer, &hoptime_data[port], sizeof(in_xfer));
out_reg = in_xfer;
if (latency > out_reg.max_latency)
out_reg.max_latency = latency;
if (latency < out_reg.min_latency || out_reg.min_latency == 0)
out_reg.min_latency = latency;
out_reg.count += 1;
out_reg.total_latency += latency;
out_xfer = out_reg;
mem_write32(&out_xfer, &hoptime_data[port], sizeof(out_xfer));
return PIF_PLUGIN_RETURN_FORWARD;
}
void SaveState(const char *fname)
{
MEMFILE *st=NULL;
TempAddrT=TempAddr;
RefreshAddrT=RefreshAddr;
if(geniestage==1)
{
FCEU_DispMessage("Cannot save FCS in GG screen.");
return;
}
st=mem_fopen_write(fname);
if(st!=NULL)
{
static uint32 totalsize;
static uint8 header[16]="FCS";
memset(header+4,0,13);
header[3]=VERSION_NUMERIC;
mem_fwrite(header,1,16,st);
#ifdef ASM_6502
asmcpu_pack();
#endif
totalsize=WriteStateChunk(st,1,SFCPU);
totalsize+=WriteStateChunk(st,2,SFCPUC);
totalsize+=WriteStateChunk(st,3,FCEUPPU_STATEINFO);
totalsize+=WriteStateChunk(st,4,FCEUCTRL_STATEINFO);
totalsize+=WriteStateChunk(st,5,SFSND);
if(SPreSave) SPreSave();
totalsize+=WriteStateChunk(st,0x10,SFMDATA);
if(SPostSave) SPostSave();
mem_fseek(st,4,SEEK_SET);
mem_write32(totalsize,st);
SaveStateStatus[CurrentState]=1;
mem_fclose(st);
}
}
int main(void){
printf("Initializing\n");
mem_init();
printf("Allocating 1MB\n");
uint32_t loc = mem_dynamic_alloc(1<<20,0);
printf("Got address 0x%X\n",loc);
printf("Writing 192342\n");
mem_write32(loc,192343);
printf("Reading...\n");
uint32_t result = mem_read32(loc);
printf("Read %d\n",result);
printf("Freeing\n");
mem_free(loc);
printf("Cleaning up\n");
mem_cleanup();
return 0;
}
void pad_writedata(dword addr)
{
dword state=pad_getdata(0);
mem_write32(addr,state);
}
u32int process_opcode(farcpu *cpu)
{
u8int op = cpu->regs.IR;
u8int mem_add = 1; //amount to add to memory to get to next OpCode
u32int PC = cpu->regs.PC + 1; //just skip the opcode, to make things easier
char *memory = cpu->memory;
if(op == EXOP) return process_extended_opcode(cpu);
switch(op)
{
case NOP:
asm("nop"); break; //might just remove the asm statement sometime, just fo-sho right now
/*
* Aritmatic functions
* TODO: OVERFLOW, EXCEPTION Handeling
*/
case INC:
set_register(cpu, mem_get8(memory, PC), get_register(cpu, mem_get8(memory, PC)) + 1); mem_add++; break;
case DEC:
set_register(cpu, mem_get8(memory, PC), get_register(cpu, mem_get8(memory, PC)) - 1); mem_add++; break;
case ADD:
set_register(cpu, AL, process_in_loc(cpu, memory, PC, &mem_add) + process_in_loc(cpu, memory, PC + mem_add-1 , &mem_add)); break;
case SUB:
set_register(cpu, AL, process_in_loc(cpu, memory, PC, &mem_add) - process_in_loc(cpu, memory, PC + mem_add-1, &mem_add)); break;
case MUL: //TODO:OPTIMIZE
set_register(cpu, AL, process_in_loc(cpu, memory, PC, &mem_add) * process_in_loc(cpu, memory, PC + mem_add-1, &mem_add)); break;
case DIV: //TODO:OPTIMIZE, DIV BY 0
set_register(cpu, AL, (u32int)(process_in_loc(cpu, memory, PC, &mem_add) / process_in_loc(cpu, memory, PC + mem_add-1, &mem_add))); break;
//Moving data around: TODO:ADD CONTENT!!!
case MOVNM:
switch(mem_read8(cpu->memory, PC)){
case 0: mem_write8(cpu->memory, mem_read32(cpu->memory, PC + 2),mem_read8(cpu->memory, PC + 1)); mem_add+=6; break;
case 1: mem_write16(cpu->memory, mem_read32(cpu->memory, PC + 3), mem_read16(cpu->memory, PC + 1)); mem_add+=7; break;
case 2: mem_write32(cpu->memory, mem_read32(cpu->memory, PC + 6), mem_read32(cpu->memory, PC + 1)); mem_add+=9; break; }
mem_add++; break;
case MOVRM:
switch(reg_sizes[mem_read8(cpu->memory, PC)]){
case 1: mem_write8(cpu->memory, mem_read32(cpu->memory, PC + 1), get_register(cpu, mem_read8(cpu->memory, PC))); break;
case 2: mem_write16(cpu->memory, mem_read32(cpu->memory, PC + 1), get_register(cpu, mem_read8(cpu->memory, PC))); break;
case 4: mem_write32(cpu->memory, mem_read32(cpu->memory, PC + 1), get_register(cpu, mem_read8(cpu->memory, PC))); break;
}
mem_add += 5;
break;
case MOVIM:
mem_write8(cpu->memory, mem_read32(cpu->memory, PC), cpu->IO); mem_add += 4;
break;
case MOVMM:
break;
case MOVMR:
break;
case MOVNR:
switch(mem_read8(cpu->memory, PC)) {
case 0: set_register(cpu, mem_read8(cpu->memory, PC+2), mem_read8(cpu->memory, PC+1)); mem_add += 3; break; //byte
case 1: set_register(cpu, mem_read8(cpu->memory, PC+3), mem_read16(cpu->memory, PC+1)); mem_add += 4; break; //short
case 2: set_register(cpu, mem_read8(cpu->memory, PC+5), mem_read32(cpu->memory, PC+1)); mem_add += 6; break; //long
}
break;
case MOVIR:
set_register(cpu, mem_read8(cpu->memory, PC), cpu->IO); mem_add += 1;
break;
case MOVRR:
set_register(cpu, mem_read8(cpu->memory, PC + 1), get_register(cpu, mem_read8(cpu->memory, PC))); mem_add += 2;
break;
//bit-minipulating:
case SHL:
break;
case SHR:
break;
case AND:
break;
case OR:
break;
case XOR:
break;
case NOT:
break;
//Low-Level:
case HWU:
switch(mem_read16(cpu->memory, PC))
{
case 0x08:
gfx_upd(cpu);
}
mem_add += 2;
break;
//branching:
case JMP:
cpu->regs.PC = mem_read32(cpu->memory, PC); return 1;
case SJP:
cpu->regs.JP = mem_read32(cpu->memory, PC); mem_add += 4; break;
case JZ:
if(cpu->regs.AL == 0){ cpu->regs.PC = cpu->regs.JP; return 1; }break;
case JNZ:
if(cpu->regs.AL != 0){ cpu->regs.PC = cpu->regs.JP; return 1; }break;
case JFE:
if(cpu->regs.AL == cpu->regs.BL){ cpu->regs.PC = cpu->regs.JP; return 1; }break;
case JNE:
if(cpu->regs.AL != cpu->regs.BL){ cpu->regs.PC = cpu->regs.JP; return 1; }break;
case JGT:
if(cpu->regs.AL > cpu->regs.BL){ cpu->regs.PC = cpu->regs.JP; return 1; }break;
break;
case JNG:
if(!(cpu->regs.AL > cpu->regs.BL)){ cpu->regs.PC = cpu->regs.JP; return 1; }break;
case JGE:
if(cpu->regs.AL >= cpu->regs.BL){ cpu->regs.PC = cpu->regs.JP; return 1; }break;
case JNGE:
if(!(cpu->regs.AL >= cpu->regs.BL)){ cpu->regs.PC = cpu->regs.JP; return 1; }break;
case JLT:
if(cpu->regs.AL < cpu->regs.BL){ cpu->regs.PC = cpu->regs.JP; return 1; }break;
case JNL:
if(!(cpu->regs.AL < cpu->regs.BL)){ cpu->regs.PC = cpu->regs.JP; return 1; }break;
break;
case JLE:
if(cpu->regs.AL <= cpu->regs.BL){ cpu->regs.PC = cpu->regs.JP; return 1; }break;
break;
case JNLE:
if(!(cpu->regs.AL <= cpu->regs.BL)){ cpu->regs.PC = cpu->regs.JP; return 1; }break;
break;
case MOVNRM:
switch(mem_read8(cpu->memory, PC)) {
case 0: set_register(cpu, get_register(cpu, mem_get8(cpu->memory, PC + 2)), mem_read8(cpu->memory, PC+1)); mem_add += 4; break; //byte
case 1: set_register(cpu, get_register(cpu, mem_get8(cpu->memory, PC + 3)), mem_read16(cpu->memory, PC+1)); mem_add += 5; break; //short
case 2: set_register(cpu, get_register(cpu, mem_get8(cpu->memory, PC + 5)), mem_read32(cpu->memory, PC+1)); mem_add += 7; break; //long
}
break;
case MOVRRM:
switch(reg_sizes[mem_read8(cpu->memory, PC)]){
case 1: mem_write8(cpu->memory, get_register(cpu, mem_get8(cpu->memory, PC + 1)), get_register(cpu, mem_read8(cpu->memory, PC))); break;
case 2: mem_write16(cpu->memory, get_register(cpu, mem_get8(cpu->memory, PC + 1)), get_register(cpu, mem_read8(cpu->memory, PC))); break;
case 4: mem_write32(cpu->memory, get_register(cpu, mem_get8(cpu->memory, PC + 1)), get_register(cpu, mem_read8(cpu->memory, PC))); break;
} mem_add += 2;
break;
case MOVIRM:
break;
case MOVMRM:
break;
case OUTN:
D("G");
cpu->IO = mem_read8(cpu->memory, PC); D("Y"); mem_add += 1; D("H");
break;
case OUTR:
cpu->IO = get_register(cpu, mem_read8(cpu->memory, PC)); mem_add += 1;
break;
case OUTM:
cpu->IO = mem_read8(cpu->memory, mem_read32(cpu->memory, PC)); mem_add += 4;
break;
case RET:
break;
}
cpu->regs.PC += mem_add + 0;
return 0;
}
