int meson_cpu_kill(unsigned int cpu)
{
unsigned int value;
unsigned int offset=(cpu<<3);
do{
udelay(10);
value=aml_read_reg32(MESON_CPU_POWER_CTRL_REG);
}while((value&(3<<offset)) != (3<<offset));
udelay(10);
meson_set_cpu_power_ctrl(cpu, 0);
return 1;
}
int __cpuinit meson_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
unsigned long timeout;
/*
* Set synchronisation state between this boot processor
* and the secondary one
*/
spin_lock(&boot_lock);
/*
* The secondary processor is waiting to be released from
* the holding pen - release it, then wait for it to flag
* that it has been released by resetting pen_release.
*/
printk("write pen_release: %d\n",cpu_logical_map(cpu));
write_pen_release(cpu_logical_map(cpu));
#ifndef CONFIG_MESON_TRUSTZONE
// check_and_rewrite_cpu_entry();
meson_set_cpu_ctrl_addr(cpu,
(const uint32_t)virt_to_phys(meson_secondary_startup));
meson_set_cpu_power_ctrl(cpu, 1);
timeout = jiffies + (10* HZ);
while(meson_get_cpu_ctrl_addr(cpu));
{
if(!time_before(jiffies, timeout))
return -EPERM;
}
#endif
meson_secondary_set(cpu);
dsb_sev();
// smp_send_reschedule(cpu);
timeout = jiffies + (10* HZ);
while (time_before(jiffies, timeout)) {
smp_rmb();
if (pen_release == -1)
break;
udelay(10);
}
/*
* now the secondary core is starting up let it run its
* calibrations, then wait for it to finish
*/
spin_unlock(&boot_lock);
return pen_release != -1 ? -ENOSYS : 0;
}
