/**
* Implement the hardware-specific portion of \c glFlush.
*
* \param ctx Context to be flushed.
*
* \sa glFlush, mgaFinish, mgaFlushDMA
*/
static void mgaFlush( GLcontext *ctx )
{
mgaContextPtr mmesa = MGA_CONTEXT( ctx );
LOCK_HARDWARE( mmesa );
if ( mmesa->vertex_dma_buffer != NULL ) {
mgaFlushVerticesLocked( mmesa );
}
UPDATE_LOCK( mmesa, DRM_LOCK_FLUSH );
UNLOCK_HARDWARE( mmesa );
}
/**
* Implement the hardware-specific portion of \c glFinish.
*
* Flushes all pending commands to the hardware and wait for them to finish.
*
* \param ctx Context where the \c glFinish command was issued.
*
* \sa glFinish, mgaFlush, mgaFlushDMA
*/
static void mgaFinish( GLcontext *ctx )
{
mgaContextPtr mmesa = MGA_CONTEXT(ctx);
uint32_t fence;
LOCK_HARDWARE( mmesa );
if ( mmesa->vertex_dma_buffer != NULL ) {
mgaFlushVerticesLocked( mmesa );
}
if ( mgaSetFence( mmesa, & fence ) == 0 ) {
UNLOCK_HARDWARE( mmesa );
(void) mgaWaitFence( mmesa, fence, NULL );
}
else {
if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL) {
fprintf(stderr, "mgaRegetLockQuiescent\n");
}
UPDATE_LOCK( mmesa, DRM_LOCK_QUIESCENT | DRM_LOCK_FLUSH );
UNLOCK_HARDWARE( mmesa );
}
}
void mgaFlushVertices( mgaContextPtr mmesa )
{
LOCK_HARDWARE( mmesa );
mgaFlushVerticesLocked( mmesa );
UNLOCK_HARDWARE( mmesa );
}
