void USART6_IRQHandler( void )
{
// Clear all interrupts. It's safe to do so because only RXNE interrupt is enabled
USART6->SR = (uint16_t) (USART6->SR | 0xffff);
// Update tail
uart_interfaces[ STM32_UART_6 ].rx_buffer->tail = uart_interfaces[ STM32_UART_6 ].rx_buffer->size - uart_mapping[ STM32_UART_6 ].rx_dma_stream->NDTR;
// Notify thread if sufficient data are available
if ( ( uart_interfaces[ STM32_UART_6 ].rx_size > 0 ) &&
( ring_buffer_used_space( uart_interfaces[ STM32_UART_6 ].rx_buffer ) >= uart_interfaces[ STM32_UART_6 ].rx_size ) )
{
#ifndef NO_MICO_RTOS
mico_rtos_set_semaphore( &uart_interfaces[ STM32_UART_6 ].rx_complete );
#else
uart_interfaces[ STM32_UART_1 ].rx_complete = true;
#endif
uart_interfaces[ STM32_UART_6 ].rx_size = 0;
}
#ifndef NO_MICO_RTOS
if(uart_interfaces[ STM32_UART_6 ].sem_wakeup)
mico_rtos_set_semaphore(&uart_interfaces[ STM32_UART_6 ].sem_wakeup);
#endif
}
void RptConfigmodeRslt(network_InitTypeDef_st *nwkpara)
{
if(nwkpara == NULL)
{
printf("open easy link\n");
//OpenEasylink(60*5);
context->micoStatus.sys_state = eState_Software_Reset;
mico_rtos_set_semaphore(&context->micoStatus.sys_state_change_sem);
}
else
{
printf("recv config\n");
memcpy(context->flashContentInRam.micoSystemConfig.ssid, nwkpara->wifi_ssid, maxSsidLen);
memset(context->flashContentInRam.micoSystemConfig.bssid, 0x0, 6);
memcpy(context->flashContentInRam.micoSystemConfig.user_key, nwkpara->wifi_key, maxKeyLen);
context->flashContentInRam.micoSystemConfig.user_keyLength = strlen(nwkpara->wifi_key);
context->flashContentInRam.micoSystemConfig.configured = allConfigured;
/*Clear fastlink record*/
MICOUpdateConfiguration(context);
#if (MICO_CONFIG_MODE == CONFIG_MODE_EASYLINK) || (MICO_CONFIG_MODE == CONFIG_MODE_EASYLINK_WITH_SOFTAP)
context->micoStatus.sys_state = eState_Software_Reset;
mico_rtos_set_semaphore(&context->micoStatus.sys_state_change_sem);
#endif
}
}
void platform_uart_irq( platform_uart_driver_t* driver )
{
platform_uart_port_t* uart = (platform_uart_port_t*) driver->peripheral->port;
// Clear all interrupts. It's safe to do so because only RXNE interrupt is enabled
uart->SR = (uint16_t) ( uart->SR | 0xffff );
// Update tail
driver->rx_buffer->tail = driver->rx_buffer->size - driver->peripheral->rx_dma_config.stream->NDTR;
// Notify thread if sufficient data are available
if ( ( driver->rx_size > 0 ) && ( ring_buffer_used_space( driver->rx_buffer ) >= driver->rx_size ) )
{
#ifndef NO_MICO_RTOS
mico_rtos_set_semaphore( &driver->rx_complete );
#else
driver->rx_complete = true;
#endif
driver->rx_size = 0;
}
#ifndef NO_MICO_RTOS
if( driver->sem_wakeup )
mico_rtos_set_semaphore( &driver->sem_wakeup );
#endif
}
OSStatus MicoUartSend( mico_uart_t uart, const void* data, uint32_t size )
{
// /* Reset DMA transmission result. The result is assigned in interrupt handler */
uint32_t Instance = getInstanceBy(uart);
uart_interfaces[uart].tx_dma_result = kGeneralErr;
#ifndef NO_MICO_RTOS
mico_rtos_lock_mutex(&uart_interfaces[uart].tx_mutex);
#endif
MicoMcuPowerSaveConfig(false);
#ifdef UART_IRQ_APP
if (UART_DRV_SendData(Instance, data, size) == kStatus_UART_Success){
#else
if (UART_DRV_EdmaSendData(Instance, data, size) == kStatus_UART_Success){
#endif
#ifndef NO_MICO_RTOS
mico_rtos_set_semaphore( &uart_interfaces[ uart ].tx_complete );
#else
uart_interfaces[ uart ].rx_complete = true;
#endif
}
#ifndef NO_MICO_RTOS
mico_rtos_get_semaphore( &uart_interfaces[ uart ].tx_complete, MICO_NEVER_TIMEOUT );
#else
while(uart_interfaces[ uart ].tx_complete == false);
uart_interfaces[ uart ].tx_complete = false;
#endif
// return uart_interfaces[uart].tx_dma_result;
MicoMcuPowerSaveConfig(true);
#ifndef NO_MICO_RTOS
mico_rtos_unlock_mutex(&uart_interfaces[uart].tx_mutex);
#endif
return kNoErr;
}
void UART_DRV_CompleteReceiveData(uint32_t instance)
{
assert(instance < HW_UART_INSTANCE_COUNT);
uart_state_t * uartState = (uart_state_t *)g_uartStatePtr[instance];
uint32_t baseAddr = g_uartBaseAddr[instance];
mico_uart_t uart = getUartBy(instance);
/* Disable receive data full interrupt */
UART_HAL_SetRxDataRegFullIntCmd(baseAddr, false);
/* Signal the synchronous completion object. */
if (uartState->isRxBlocking)
{
mico_rtos_set_semaphore(&uart_interfaces[uart].rx_complete); //OSA_SemaPost(&uartState->rxIrqSync);
}
/* Update the information of the module driver state */
uartState->isRxBusy = false;
}
void sdio_irq( void )
{
uint32_t intstatus = SDIO->STA;
if ( ( intstatus & ( SDIO_STA_CCRCFAIL | SDIO_STA_DCRCFAIL | SDIO_STA_TXUNDERR | SDIO_STA_RXOVERR | SDIO_STA_STBITERR )) != 0 )
{
sdio_transfer_failed = true;
SDIO->ICR = (uint32_t) 0xffffffff;
mico_rtos_set_semaphore( &sdio_transfer_finished_semaphore );
}
else
{
if ((intstatus & (SDIO_STA_CMDREND | SDIO_STA_CMDSENT)) != 0)
{
if ( ( SDIO->RESP1 & 0x800 ) != 0 )
{
sdio_transfer_failed = true;
mico_rtos_set_semaphore( &sdio_transfer_finished_semaphore );
}
else if (current_command == SDIO_CMD_53)
{
if (current_transfer_direction == BUS_WRITE)
{
DMA2_Stream3->CR = DMA_DIR_MemoryToPeripheral |
DMA_Channel_4 | DMA_PeripheralInc_Disable | DMA_MemoryInc_Enable |
DMA_PeripheralDataSize_Word | DMA_MemoryDataSize_Word |
DMA_Mode_Normal | DMA_Priority_VeryHigh |
DMA_MemoryBurst_INC4 | DMA_PeripheralBurst_INC4 | DMA_SxCR_PFCTRL | DMA_SxCR_EN | DMA_SxCR_TCIE;
}
else
{
DMA2_Stream3->CR = DMA_DIR_PeripheralToMemory |
DMA_Channel_4 | DMA_PeripheralInc_Disable | DMA_MemoryInc_Enable |
DMA_PeripheralDataSize_Word | DMA_MemoryDataSize_Word |
DMA_Mode_Normal | DMA_Priority_VeryHigh |
DMA_MemoryBurst_INC4 | DMA_PeripheralBurst_INC4 | DMA_SxCR_PFCTRL | DMA_SxCR_EN | DMA_SxCR_TCIE;
}
}
/* Clear all command/response interrupts */
SDIO->ICR = (SDIO_STA_CMDREND | SDIO_STA_CMDSENT);
}
}
#ifndef SDIO_1_BIT
/* Check whether the external interrupt was triggered */
if ( ( intstatus & SDIO_STA_SDIOIT ) != 0 )
{
/* Clear the interrupt and then inform WICED thread */
SDIO->ICR = SDIO_ICR_SDIOITC;
platform_mcu_powersave_exit_notify( );
wiced_platform_notify_irq( );
}
#endif
}
void platform_uart_irq( platform_uart_driver_t* driver )
{
uint32_t status = usart_get_status( driver->peripheral->peripheral );
uint32_t mask = usart_get_interrupt_mask( driver->peripheral->peripheral );
Pdc* pdc_register = usart_get_pdc_base( driver->peripheral->peripheral );
/* ENDTX flag is set when Tx DMA transfer is done */
if ( ( mask & US_IMR_ENDTX ) && ( status & US_CSR_ENDTX ) )
{
pdc_packet_t dma_packet;
/* ENDTX is cleared when TCR or TNCR is set to a non-zero value, which effectively
* starts another Tx DMA transaction. To work around this, disable Tx before
* performing a dummy Tx init.
*/
pdc_disable_transfer( usart_get_pdc_base( driver->peripheral->peripheral ), PERIPH_PTCR_TXTDIS );
dma_packet.ul_addr = (uint32_t)0;
dma_packet.ul_size = (uint32_t)1;
pdc_tx_init( usart_get_pdc_base( driver->peripheral->peripheral ), &dma_packet, NULL );
/* Notifies waiting thread that Tx DMA transfer is complete */
mico_rtos_set_semaphore( &driver->tx_complete );
}
/* ENDRX flag is set when RCR is 0. RNPR and RNCR values are then copied into
* RPR and RCR, respectively, while the RX tranfer continues. We now need to
* prepare RNPR and RNCR for the next iteration.
*/
if ( ( mask & US_IMR_ENDRX ) && ( status & US_CSR_ENDRX ) )
{
pdc_register->PERIPH_RNPR = (uint32_t)driver->rx_ring_buffer->buffer;
pdc_register->PERIPH_RNCR = (uint32_t)driver->rx_ring_buffer->size;
}
/* RXRDY interrupt is triggered and flag is set when a new character has been
* received but not yet read from the US_RHR. When this interrupt executes,
* the DMA engine already read the character out from the US_RHR and RXRDY flag
* is no longer asserted. The code below updates the ring buffer parameters
* to keep them current
*/
if ( mask & US_CSR_RXRDY )
{
driver->rx_ring_buffer->tail = driver->rx_ring_buffer->size - pdc_register->PERIPH_RCR;
// Notify thread if sufficient data are available
if ( ( driver->rx_size > 0 ) && ( ring_buffer_used_space( driver->rx_ring_buffer ) >= driver->rx_size ) )
{
mico_rtos_set_semaphore( &driver->rx_complete );
driver->rx_size = 0;
}
}
}
OSStatus _FTCRespondInComingMessage(int fd, HTTPHeader_t* inHeader, mico_Context_t * const inContext)
{
OSStatus err = kUnknownErr;
const char * value;
size_t valueSize;
easylink_log_trace();
switch(inHeader->statusCode){
case kStatusAccept:
easylink_log("Easylink server accepted!");
err = kNoErr;
goto exit;
break;
case kStatusOK:
easylink_log("Easylink server respond status OK!");
err = HTTPGetHeaderField( inHeader->buf, inHeader->len, "Content-Type", NULL, NULL, &value, &valueSize, NULL );
require_noerr(err, exit);
if( strnicmpx( value, valueSize, kMIMEType_JSON ) == 0 ){
easylink_log("Receive JSON config data!");
err = ConfigIncommingJsonMessage( inHeader->extraDataPtr, inContext);
SocketClose(&fd);
inContext->micoStatus.sys_state = eState_Software_Reset;
require(inContext->micoStatus.sys_state_change_sem, exit);
mico_rtos_set_semaphore(&inContext->micoStatus.sys_state_change_sem);
}else if(strnicmpx( value, valueSize, kMIMEType_MXCHIP_OTA ) == 0){
easylink_log("Receive OTA data!");
mico_rtos_lock_mutex(&inContext->flashContentInRam_mutex);
memset(&inContext->flashContentInRam.bootTable, 0, sizeof(boot_table_t));
inContext->flashContentInRam.bootTable.length = inHeader->contentLength;
inContext->flashContentInRam.bootTable.start_address = UPDATE_START_ADDRESS;
inContext->flashContentInRam.bootTable.type = 'A';
inContext->flashContentInRam.bootTable.upgrade_type = 'U';
inContext->flashContentInRam.micoSystemConfig.easyLinkEnable = false;
MICOUpdateConfiguration(inContext);
mico_rtos_unlock_mutex(&inContext->flashContentInRam_mutex);
SocketClose(&fd);
inContext->micoStatus.sys_state = eState_Software_Reset;
require(inContext->micoStatus.sys_state_change_sem, exit);
mico_rtos_set_semaphore(&inContext->micoStatus.sys_state_change_sem);
}else{
return kUnsupportedDataErr;
}
err = kNoErr;
goto exit;
break;
default:
goto exit;
}
exit:
return err;
}
void BuartInterrupt(void)
{
int status;
uint8_t rxData;
status = BuartIOctl(UART_IOCTL_RXSTAT_GET,0);
if(status & 0x1E){
/*
* clear FIFO before clear other flags
*/
BuartIOctl(UART_IOCTL_RXFIFO_CLR,0);
/*
* clear other error flags
*/
BuartIOctl(UART_IOCTL_RXINT_CLR,0);
}
if(status & 0x01)
{
BuartIOctl(UART_IOCTL_RXINT_SET, 0);
BuartIOctl(UART_IOCTL_RXINT_CLR,0);
// Notify thread if sufficient data are available
if ( ( uart_interfaces[ AP80xx_BUART ].rx_size > 0 ) &&
( (uint32_t)BuartIOctl(BUART_IOCTL_RXFIFO_DATLEN_GET, 0) >= uart_interfaces[ AP80xx_BUART ].rx_size ) )
{
#ifndef NO_MICO_RTOS
mico_rtos_set_semaphore( &uart_interfaces[ AP80xx_BUART ].rx_complete );
#else
uart_interfaces[ AP80xx_BUART ].rx_complete = true;
#endif
uart_interfaces[ AP80xx_BUART ].rx_size = 0;
}
}
// #ifndef NO_MICO_RTOS
// if(uart_interfaces[ 0 ].sem_wakeup)
// mico_rtos_set_semaphore(&uart_interfaces[ 0 ].sem_wakeup);
// #endif
if(BuartIOctl(UART_IOCTL_TXSTAT_GET,0) & 0x01)
{
BuartIOctl(UART_IOCTL_TXINT_CLR,0);
#ifndef NO_MICO_RTOS
mico_rtos_set_semaphore( &uart_interfaces[ AP80xx_BUART ].tx_complete );
#else
uart_interfaces[ AP80xx_BUART ].tx_complete = true;
#endif
}
}
//每一分钟超时处理函数
static void cup_timer_timeout_handler( void* inContext )
{
cup_obj *pCpuTimeObj;
pCpuTimeObj = (cup_obj *)inContext;
pCpuTimeObj->unitTimes ++;
if (pCpuTimeObj->unitTimes == pCpuTimeObj->drinkTime)
{
printf("go to drink++++++++++++++\r\n");
mico_rtos_set_semaphore(&pCpuTimeObj->playMp3_sem); //通知播放音乐
mico_rtos_set_semaphore(&pCpuTimeObj->playLed_sem); //通知亮LED灯
TIMER_start();
}
}
void platform_buart_irq( platform_uart_driver_t* driver )
{
int status;
status = BuartIOctl(UART_IOCTL_RXSTAT_GET,0);
if(status & 0x1E){
/*
* clear FIFO before clear other flags
*/
BuartIOctl(UART_IOCTL_RXFIFO_CLR,0);
/*
* clear other error flags
*/
BuartIOctl(UART_IOCTL_RXINT_CLR,0);
}
if(status & 0x01 )
{
BuartIOctl(UART_IOCTL_RXINT_SET, 0);
BuartIOctl(UART_IOCTL_RXINT_CLR, 0);
// Notify thread if sufficient data are available
if ( ( driver->rx_size > 0 ) &&
( (uint32_t)BuartIOctl(BUART_IOCTL_RXFIFO_DATLEN_GET, 0) >= driver->rx_size ) )
{
driver->rx_size = 0;
}
{
#ifndef NO_MICO_RTOS
mico_rtos_set_semaphore( &driver->rx_complete );
#else
driver->rx_complete = true;
#endif
}
}
if(BuartIOctl(UART_IOCTL_TXSTAT_GET,0) & 0x01)
{
BuartIOctl(UART_IOCTL_TXINT_CLR,0);
#ifndef NO_MICO_RTOS
mico_rtos_set_semaphore( &driver->tx_complete );
#else
driver->tx_complete = true;
#endif
}
}
void FuartInterrupt(void)
{
int status;
uint8_t rxData;
status = FuartIOctl(UART_IOCTL_RXSTAT_GET,0);
if(status & 0x1E){
/*
* clear FIFO before clear other flags
*/
FuartIOctl(UART_IOCTL_RXFIFO_CLR,0);
/*
* clear other error flags
*/
FuartIOctl(UART_IOCTL_RXINT_CLR,0);
}
if(status & 0x01)
{
//or,you can receive them in the interrupt directly
while(FuartRecvByte(&rxData) > 0){
ring_buffer_write( uart_interfaces[ AP80xx_FUART ].rx_buffer, &rxData,1 );
}
FuartIOctl(UART_IOCTL_RXINT_CLR,0);
// Notify thread if sufficient data are available
if ( ( uart_interfaces[ 0 ].rx_size > 0 ) &&
( ring_buffer_used_space( uart_interfaces[ AP80xx_FUART ].rx_buffer ) >= uart_interfaces[ AP80xx_FUART ].rx_size ) )
{
#ifndef NO_MICO_RTOS
mico_rtos_set_semaphore( &uart_interfaces[ AP80xx_FUART ].rx_complete );
#else
uart_interfaces[ AP80xx_FUART ].rx_complete = true;
#endif
uart_interfaces[ AP80xx_FUART ].rx_size = 0;
}
}
if(FuartIOctl(UART_IOCTL_TXSTAT_GET,0) & 0x01)
{
FuartIOctl(UART_IOCTL_TXINT_CLR,0);
#ifndef NO_MICO_RTOS
mico_rtos_set_semaphore( &uart_interfaces[ AP80xx_FUART ].tx_complete );
#else
uart_interfaces[ AP80xx_FUART ].tx_complete = true;
#endif
}
}
void stop_edma_loop_putsem(void *parameter, edma_chn_status_t status)
{
/* Stop eDMA channel transfers. */
EDMA_DRV_StopChannel((edma_chn_state_t *)parameter);
/* Increase semaphore to indicate an eDMA channel has completed transfer. */
mico_rtos_set_semaphore( &spi_transfer_finished_semaphore );
}
void SdInterrupt(void)
{
OSStatus result = kNoErr;
uint8_t sdioStatus = 0;
/* Clear interrupt */
SdioDataInterruptClear();
// sdioStatus = SdioGetStatus();
// if( result != kNoErr )
// return;
if(waiting == true){
result = mico_rtos_set_semaphore( &sdio_transfer_finished_semaphore );
waiting = false;
}else{
//platform_log("Unexcepted!");
}
/* check result if in debug mode */
//check_string(result == kNoErr, "failed to set dma semaphore" );
/*@-noeffect@*/
//(void) result; /* ignore result if in release mode */
/*@+noeffect@*/
}
//usart6_tx_dma_irq
void DMA2_Stream6_IRQHandler( void )
{
bool tx_complete = false;
if ( ( DMA2->HISR & DMA_HISR_TCIF6 ) != 0 )
{
DMA2->HIFCR |= DMA_HISR_TCIF6;
uart_interfaces[ STM32_UART_6 ].tx_dma_result = kNoErr;
tx_complete = true;
}
/* TX DMA error */
if ( ( DMA2->HISR & ( DMA_HISR_TEIF6 | DMA_HISR_DMEIF6 | DMA_HISR_FEIF6 ) ) != 0 )
{
/* Clear interrupt */
DMA2->HIFCR |= ( DMA_HISR_TEIF6 | DMA_HISR_DMEIF6 | DMA_HISR_FEIF6 );
if ( tx_complete == false )
{
uart_interfaces[ STM32_UART_6 ].tx_dma_result = kGeneralErr;
}
}
#ifndef NO_MICO_RTOS
/* Set semaphore regardless of result to prevent waiting thread from locking up */
mico_rtos_set_semaphore( &uart_interfaces[ STM32_UART_6 ].tx_complete);
#else
uart_interfaces[ STM32_UART_6 ].tx_complete = true;
#endif
}
USED void PlatformEasyLinkButtonClickedCallback(void)
{
mico_log_trace();
bool needsUpdate = false;
mico_log("PlatformEasyLinkButtonClickedCallback");
if(context->flashContentInRam.micoSystemConfig.easyLinkByPass != EASYLINK_BYPASS_NO){
context->flashContentInRam.micoSystemConfig.easyLinkByPass = EASYLINK_BYPASS_NO;
needsUpdate = true;
}
if(context->flashContentInRam.micoSystemConfig.configured == allConfigured){
context->flashContentInRam.micoSystemConfig.configured = wLanUnConfigured;
needsUpdate = true;
}
if(needsUpdate == true)
MICOUpdateConfiguration(context);
context->micoStatus.sys_state = eState_Software_Reset;
require(context->micoStatus.sys_state_change_sem, exit);
mico_rtos_set_semaphore(&context->micoStatus.sys_state_change_sem);
exit:
return;
}
void RX_PIN_WAKEUP_handler(void *arg)
{
(void)arg;
platform_uart_driver_t* driver = arg;
uint32_t uart_number;
platform_gpio_enable_clock( driver->peripheral->pin_rx );
uart_number = platform_uart_get_port_number( driver->peripheral->port );
uart_peripheral_clock_functions[ uart_number ]( uart_peripheral_clocks[ uart_number ], ENABLE );
/* Enable DMA peripheral clock */
if ( driver->peripheral->tx_dma_config.controller == DMA1 )
{
RCC->AHB1ENR |= RCC_AHB1Periph_DMA1;
}
else
{
RCC->AHB1ENR |= RCC_AHB1Periph_DMA2;
}
platform_gpio_irq_disable( driver->peripheral->pin_rx );
platform_mcu_powersave_disable( );
mico_rtos_set_semaphore( &driver->sem_wakeup );
}
/**
* @brief This function handles TIM5 global interrupt request.
* @param None
* @retval None
*/
void TIM5_IRQHandler(void)
{
if (TIM_GetITStatus(TIM5, TIM_IT_CC4) != RESET)
{
/* Clear CC4 Interrupt pending bit */
TIM_ClearITPendingBit(TIM5, TIM_IT_CC4);
if (CaptureNumber >= 2)
return;
/* Get the Input Capture value */
tmpCC4[CaptureNumber++] = TIM_GetCapture4(TIM5);
if (CaptureNumber == 2)
{
/* Compute the period length */
PeriodValue = (uint16_t)(0xFFFF - tmpCC4[0] + tmpCC4[1] + 1);
if(_measureLSIComplete_SEM != NULL){
#ifndef NO_MICO_RTOS
mico_rtos_set_semaphore(&_measureLSIComplete_SEM);
#else
_measureLSIComplete_SEM = true;
#endif
}
}
}
}
void MVDDevCloudInfoResetThread(void *arg)
{
OSStatus err = kUnknownErr;
mico_Context_t *inContext = (mico_Context_t *)arg;
// stop EasyCloud service first
//err = MVDCloudInterfaceStop(inContext);
//require_noerr_action( err, exit, mvd_log("ERROR: stop EasyCloud service failed!") );
// cloud reset request
MVDDevInterfaceSend(DEFAULT_MVD_RESET_CLOUD_INFO_START_MSG_2MCU,
strlen(DEFAULT_MVD_RESET_CLOUD_INFO_START_MSG_2MCU));
err = easycloud_reset_cloud_info(inContext);
if(kNoErr == err){
//mvd_log("[MVD]MVDDevCloudInfoResetThread: cloud reset success!");
MVDDevInterfaceSend(DEFAULT_MVD_RESET_CLOUD_INFO_OK_MSG_2MCU,
strlen(DEFAULT_MVD_RESET_CLOUD_INFO_OK_MSG_2MCU));
// send ok semaphore
mico_rtos_set_semaphore(&_reset_cloud_info_sem);
}
else{
mvd_log("[MVD]MVDDevCloudInfoResetThread EXIT: err=%d",err);
MVDDevInterfaceSend(DEFAULT_MVD_RESET_CLOUD_INFO_FAILED_MSG_2MCU,
strlen(DEFAULT_MVD_RESET_CLOUD_INFO_FAILED_MSG_2MCU));
}
mico_rtos_delete_thread(NULL);
return;
}
void EasyLinkNotify_EasyLinkGetExtraDataHandler(int datalen, char* data, const int inContext)
{
OSStatus err;
int index ;
char address[16];
char *debugString;
uint32_t *ipInfo, ipInfoCount;
debugString = DataToHexStringWithSpaces( (const uint8_t *)data, datalen );
wifi_easylink_log("Get user info: %s", debugString);
free(debugString);
for(index = datalen - 1; index>=0; index-- ){
if(data[index] == '#' &&( (datalen - index) == 5 || (datalen - index) == 25 ) )
break;
}
require_action(index >= 0, exit, err = kParamErr);
data[index++] = 0x0;
ipInfo = (uint32_t *)&data[index];
ipInfoCount = (datalen - index)/sizeof(uint32_t);
require_action(ipInfoCount >= 1, exit, err = kParamErr);
inet_ntoa( address, *(uint32_t *)(ipInfo) );
wifi_easylink_log("Get auth info: %s, EasyLink server ip address: %s", data, address);
is_easylink_success = 1;
mico_rtos_set_semaphore(&easylink_sem);
return;
exit:
wifi_easylink_log("ERROR, err: %d", err);
}
void mvdNotify_WifiStatusHandler(WiFiEvent event, mico_Context_t * const inContext)
{
mvd_log_trace();
(void)inContext;
switch (event) {
case NOTIFY_STATION_UP:
MVDDevInterfaceSend(DEFAULT_MVD_STATION_UP_MSG_2MCU,
strlen(DEFAULT_MVD_STATION_UP_MSG_2MCU));
if(NULL == _wifi_station_on_sem){
mico_rtos_init_semaphore(&_wifi_station_on_sem, 1);
}
mico_rtos_set_semaphore(&_wifi_station_on_sem);
// set LED to green means station down, data: on/off,H,S,B
LedControlMsgHandler("1,120,100,100", strlen("1,120,100,100"));
break;
case NOTIFY_STATION_DOWN:
MVDDevInterfaceSend(DEFAULT_MVD_STATION_DOWN_MSG_2MCU,
strlen(DEFAULT_MVD_STATION_DOWN_MSG_2MCU));
// set LED to light green means station down, data: on/off,H,S,B
LedControlMsgHandler("1,120,100,10", strlen("1,120,100,10"));
break;
case NOTIFY_AP_UP:
break;
case NOTIFY_AP_DOWN:
break;
default:
break;
}
return;
}
void mvdNotify_WifiStatusHandler(WiFiEvent event, mico_Context_t * const inContext)
{
mvd_log_trace();
(void)inContext;
switch (event) {
case NOTIFY_STATION_UP:
MVDDevInterfaceSend(DEFAULT_MVD_STATION_UP_MSG_2MCU,
strlen(DEFAULT_MVD_STATION_UP_MSG_2MCU));
if(NULL == _wifi_station_on_sem){
mico_rtos_init_semaphore(&_wifi_station_on_sem, 1);
}
mico_rtos_set_semaphore(&_wifi_station_on_sem);
break;
case NOTIFY_STATION_DOWN:
MVDDevInterfaceSend(DEFAULT_MVD_STATION_DOWN_MSG_2MCU,
strlen(DEFAULT_MVD_STATION_DOWN_MSG_2MCU));
break;
case NOTIFY_AP_UP:
break;
case NOTIFY_AP_DOWN:
break;
default:
break;
}
return;
}
void platform_wifi_spi_rx_dma_irq(void)
{
uint8_t junk1;
uint16_t junk2;
pdc_packet_t pdc_spi_packet = { 0, 1 };
Pdc* spi_pdc = spi_get_pdc_base( wifi_spi.port );
uint32_t status = spi_read_status( wifi_spi.port );
uint32_t mask = spi_read_interrupt_mask( wifi_spi.port );
if ( ( mask & SPI_IMR_RXBUFF ) && ( status & SPI_SR_RXBUFF ) )
{
pdc_disable_transfer( spi_pdc, PERIPH_PTCR_RXTDIS | PERIPH_PTCR_TXTDIS );
pdc_rx_init( spi_pdc, &pdc_spi_packet, NULL );
pdc_tx_init( spi_pdc, &pdc_spi_packet, NULL );
spi_disable_interrupt( wifi_spi.port, SPI_IER_RXBUFF );
}
if ( ( mask & SPI_IMR_ENDTX ) && ( status & SPI_SR_ENDTX ) )
{
pdc_disable_transfer( spi_pdc, PERIPH_PTCR_TXTDIS );
pdc_tx_init( spi_pdc, &pdc_spi_packet, NULL );
spi_disable_interrupt( wifi_spi.port, SPI_IER_ENDTX );
/* Clear SPI RX data in a SPI send sequence */
spi_read( wifi_spi.port, &junk2, &junk1);
}
mico_rtos_set_semaphore( &spi_transfer_finished_semaphore );
}
// Data = AuthData#FTCServer(localIp/netMask/gateWay/dnsServer)
void EasyLinkNotify_EasyLinkGetExtraDataHandler(int datalen, char* data, mico_Context_t * const inContext)
{
OSStatus err;
int index ;
char address[16];
easylink_log_trace();
uint32_t *ipInfo, ipInfoCount;
require_action(inContext, exit, err = kParamErr);
char *debugString;
debugString = DataToHexStringWithSpaces( (const uint8_t *)data, datalen );
easylink_log("Get user info: %s", debugString);
free(debugString);
for(index = datalen - 1; index>=0; index-- ){
if(data[index] == '#' &&( (datalen - index) == 5 || (datalen - index) == 25 ) )
break;
}
require_action(index >= 0, exit, err = kParamErr);
data[index++] = 0x0;
ipInfo = (uint32_t *)&data[index];
ipInfoCount = (datalen - index)/sizeof(uint32_t);
require_action(ipInfoCount >= 1, exit, err = kParamErr);
mico_rtos_lock_mutex(&inContext->flashContentInRam_mutex);
inContext->flashContentInRam.micoSystemConfig.easylinkServerIP = *(uint32_t *)(ipInfo);
if(ipInfoCount == 1){
inContext->flashContentInRam.micoSystemConfig.dhcpEnable = true;
inet_ntoa( address, inContext->flashContentInRam.micoSystemConfig.easylinkServerIP);
easylink_log("Get auth info: %s, EasyLink server ip address: %s", data, address);
}else{
inContext->flashContentInRam.micoSystemConfig.dhcpEnable = false;
ipInfo = (uint32_t *)&data[index];
inet_ntoa(inContext->flashContentInRam.micoSystemConfig.localIp, *(uint32_t *)(ipInfo+1));
inet_ntoa(inContext->flashContentInRam.micoSystemConfig.netMask, *(uint32_t *)(ipInfo+2));
inet_ntoa(inContext->flashContentInRam.micoSystemConfig.gateWay, *(uint32_t *)(ipInfo+3));
inet_ntoa(inContext->flashContentInRam.micoSystemConfig.dnsServer, *(uint32_t *)(ipInfo+4));
strcpy((char *)inContext->micoStatus.localIp, inContext->flashContentInRam.micoSystemConfig.localIp);
strcpy((char *)inContext->micoStatus.netMask, inContext->flashContentInRam.micoSystemConfig.netMask);
strcpy((char *)inContext->micoStatus.gateWay, inContext->flashContentInRam.micoSystemConfig.gateWay);
strcpy((char *)inContext->micoStatus.dnsServer, inContext->flashContentInRam.micoSystemConfig.dnsServer);
inet_ntoa( address, inContext->flashContentInRam.micoSystemConfig.easylinkServerIP);
easylink_log("Get auth info: %s, EasyLink server ip address: %s, local IP info:%s %s %s %s ", data, address, inContext->flashContentInRam.micoSystemConfig.localIp,\
inContext->flashContentInRam.micoSystemConfig.netMask, inContext->flashContentInRam.micoSystemConfig.gateWay,inContext->flashContentInRam.micoSystemConfig.dnsServer);
}
mico_rtos_unlock_mutex(&inContext->flashContentInRam_mutex);
require_noerr(ConfigELRecvAuthData(data, inContext), exit);
EasylinkFailed = false;
mico_rtos_set_semaphore(&easylink_sem);
ConfigEasyLinkIsSuccess(inContext);
return;
exit:
easylink_log("ERROR, err: %d", err);
ConfigWillStop(inContext);
MicoSystemReboot();
}
// Key2 clicked callback: next test module in test mode
void user_key2_clicked_callback(void)
{
if(NULL != mfg_test_state_change_sem){
mfg_test_module_number = (mfg_test_module_number+1)%(MFG_TEST_MAX_MODULE_NUM+1);
mico_rtos_set_semaphore(&mfg_test_state_change_sem); // start next module
}
return;
}
void PlatformStandbyButtonClickedCallback(void)
{
mico_log_trace();
context->micoStatus.sys_state = eState_Standby;
require(context->micoStatus.sys_state_change_sem, exit);
mico_rtos_set_semaphore(&context->micoStatus.sys_state_change_sem);
exit:
return;
}
void USARTx_IRQHandler( void )
{
// Clear all interrupts. It's safe to do so because only RXNE interrupt is enabled
USARTx->SR = (uint16_t) (USARTx->SR | 0xffff);
// Update tail
rx_buffer.tail = rx_buffer.size - UART_RX_DMA_Stream->NDTR;
// Notify thread if sufficient data are available
if ( ( rx_size > 0 ) && ( ring_buffer_used_space( &rx_buffer ) >= rx_size ) && sem_init )
{
mico_rtos_set_semaphore( &rx_complete );
rx_size = 0;
}
#ifdef MCULowPowerMode
mico_rtos_set_semaphore(&wakeup);
#endif
}
void PlatformEasyLinkButtonLongPressedCallback(void)
{
mico_log_trace();
MICORestoreDefault(context);
context->micoStatus.sys_state = eState_Software_Reset;
require(context->micoStatus.sys_state_change_sem, exit);
mico_rtos_set_semaphore(&context->micoStatus.sys_state_change_sem);
exit:
return;
}
void Rx_irq_handler(void *arg)
{
init_clocks();
GPIO_CLK_INIT(USARTx_RX_GPIO_CLK, ENABLE);
USARTx_CLK_INIT(USARTx_CLK, ENABLE);
RCC_AHB1PeriphClockCmd(DMA_CLK_INIT,ENABLE);
gpio_irq_disable(USARTx_RX_GPIO_PORT, USARTx_IRQ_PIN);
mico_mcu_powersave_config(mxDisable);
mico_rtos_set_semaphore(&wakeup);
}
void UART_TX_DMA_IRQHandler(void)
{
if ( (UART_TX_DMA->HISR & UART_TX_DMA_TCIF) != 0 ){
UART_TX_DMA->HIFCR |= UART_TX_DMA_TCIF;
if (sem_init)
mico_rtos_set_semaphore( &tx_complete);
} /* TX DMA error */
if ( (UART_TX_DMA->HISR & UART_TX_DMA_TCIF) != 0 ){
/* Clear interrupt */
UART_TX_DMA->HIFCR |= UART_TX_DMA_TCIF;
}
}
void SdInterrupt(void)
{
/* Clear interrupt */
SdioDataInterruptClear();
if(waiting == true){
mico_rtos_set_semaphore( &sdio_transfer_finished_semaphore );
waiting = false;
}else{
//platform_log("Unexcepted!");
}
}
