void
bmac_stop(struct bmac_softc *sc)
{
struct ifnet *ifp = &sc->arpcom.ac_if;
int s;
s = splnet();
/* timeout */
timeout_del(&sc->sc_tick_ch);
mii_down(&sc->sc_mii);
/* Disable TX/RX. */
bmac_reset_bits(sc, TXCFG, TxMACEnable);
bmac_reset_bits(sc, RXCFG, RxMACEnable);
/* Disable all interrupts. */
bmac_write_reg(sc, INTDISABLE, NoEventsMask);
dbdma_stop(sc->sc_txdma);
dbdma_stop(sc->sc_rxdma);
ifp->if_flags &= ~(IFF_UP | IFF_RUNNING);
ifp->if_timer = 0;
splx(s);
}
void
mec_stop(struct ifnet *ifp)
{
struct mec_softc *sc = ifp->if_softc;
struct mec_txsoft *txs;
int i;
DPRINTF(MEC_DEBUG_STOP, ("mec_stop\n"));
ifp->if_timer = 0;
ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
timeout_del(&sc->sc_tick_ch);
mii_down(&sc->sc_mii);
/* Disable DMA. */
bus_space_write_8(sc->sc_st, sc->sc_sh, MEC_DMA_CONTROL, 0);
/* Release any TX buffers. */
for (i = 0; i < MEC_NTXDESC; i++) {
txs = &sc->sc_txsoft[i];
if ((txs->txs_flags & MEC_TXS_TXDPTR1) != 0) {
bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap);
m_freem(txs->txs_mbuf);
txs->txs_mbuf = NULL;
}
}
}
void
bestop(struct be_softc *sc)
{
int n;
bus_space_tag_t t = sc->sc_bustag;
bus_space_handle_t br = sc->sc_br;
timeout_del(&sc->sc_tick_ch);
/* Down the MII. */
mii_down(&sc->sc_mii);
(void)be_intphy_service(sc, &sc->sc_mii, MII_DOWN);
/* Stop the transmitter */
bus_space_write_4(t, br, BE_BRI_TXCFG, 0);
for (n = 32; n > 0; n--) {
if (bus_space_read_4(t, br, BE_BRI_TXCFG) == 0)
break;
DELAY(20);
}
/* Stop the receiver */
bus_space_write_4(t, br, BE_BRI_RXCFG, 0);
for (n = 32; n > 0; n--) {
if (bus_space_read_4(t, br, BE_BRI_RXCFG) == 0)
break;
DELAY(20);
}
}
/*
* Stop transmission on the interface.
*/
void
epic_stop(struct ifnet *ifp, int disable)
{
struct epic_softc *sc = ifp->if_softc;
bus_space_tag_t st = sc->sc_st;
bus_space_handle_t sh = sc->sc_sh;
struct epic_descsoft *ds;
u_int32_t reg;
int i;
/*
* Stop the one second clock.
*/
timeout_del(&sc->sc_mii_timeout);
/*
* Mark the interface down and cancel the watchdog timer.
*/
ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
ifp->if_timer = 0;
/* Down the MII. */
mii_down(&sc->sc_mii);
/* Paranoia... */
epic_fixup_clock_source(sc);
/*
* Disable interrupts.
*/
reg = bus_space_read_4(st, sh, EPIC_GENCTL);
bus_space_write_4(st, sh, EPIC_GENCTL, reg & ~GENCTL_INTENA);
bus_space_write_4(st, sh, EPIC_INTMASK, 0);
/*
* Stop the DMA engine and take the receiver off-line.
*/
bus_space_write_4(st, sh, EPIC_COMMAND, COMMAND_STOP_RDMA |
COMMAND_STOP_TDMA | COMMAND_STOP_RX);
/*
* Release any queued transmit buffers.
*/
for (i = 0; i < EPIC_NTXDESC; i++) {
ds = EPIC_DSTX(sc, i);
if (ds->ds_mbuf != NULL) {
bus_dmamap_unload(sc->sc_dmat, ds->ds_dmamap);
m_freem(ds->ds_mbuf);
ds->ds_mbuf = NULL;
}
}
if (disable)
epic_rxdrain(sc);
}
void
smap_stop(struct ifnet *ifp, int disable)
{
struct smap_softc *sc = ifp->if_softc;
mii_down(&sc->emac3.mii);
ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
if (disable)
emac3_disable();
}
void
bestop(struct ifnet *ifp, int disable)
{
struct be_softc *sc = ifp->if_softc;
callout_stop(&sc->sc_tick_ch);
/* Down the MII. */
mii_down(&sc->sc_mii);
(void)be_intphy_service(sc, &sc->sc_mii, MII_DOWN);
behwreset(sc);
}
/* Stop transmission on the interface */
void
bce_stop(struct ifnet *ifp, int disable)
{
struct bce_softc *sc = ifp->if_softc;
int i;
u_int32_t val;
/* Stop the 1 second timer */
timeout_del(&sc->bce_timeout);
/* Mark the interface down and cancel the watchdog timer. */
ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
ifp->if_timer = 0;
/* Down the MII. */
mii_down(&sc->bce_mii);
/* Disable interrupts. */
bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_INT_MASK, 0);
sc->bce_intmask = 0;
delay(10);
/* Disable emac */
bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_ENET_CTL, EC_ED);
for (i = 0; i < 200; i++) {
val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle,
BCE_ENET_CTL);
if (!(val & EC_ED))
break;
delay(10);
}
/* Stop the DMA */
bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_DMA_RXCTL, 0);
bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_DMA_TXCTL, 0);
delay(10);
/* Release any queued transmit buffers. */
for (i = 0; i < BCE_NTXDESC; i++) {
if (sc->bce_cdata.bce_tx_chain[i] != NULL) {
bus_dmamap_unload(sc->bce_dmatag,
sc->bce_cdata.bce_tx_map[i]);
m_freem(sc->bce_cdata.bce_tx_chain[i]);
sc->bce_cdata.bce_tx_chain[i] = NULL;
}
}
/* drain receive queue */
if (disable)
bce_rxdrain(sc);
}
int
octeon_eth_stop(struct ifnet *ifp, int disable)
{
struct octeon_eth_softc *sc = ifp->if_softc;
timeout_del(&sc->sc_tick_misc_ch);
timeout_del(&sc->sc_tick_free_ch);
timeout_del(&sc->sc_resume_ch);
mii_down(&sc->sc_mii);
cn30xxgmx_port_enable(sc->sc_gmx_port, 0);
/* Mark the interface as down and cancel the watchdog timer. */
CLR(ifp->if_flags, IFF_RUNNING | IFF_OACTIVE);
ifp->if_timer = 0;
return 0;
}
int
octeon_eth_stop(struct ifnet *ifp, int disable)
{
struct octeon_eth_softc *sc = ifp->if_softc;
timeout_del(&sc->sc_tick_misc_ch);
timeout_del(&sc->sc_tick_free_ch);
mii_down(&sc->sc_mii);
cn30xxgmx_port_enable(sc->sc_gmx_port, 0);
/* Mark the interface as down and cancel the watchdog timer. */
CLR(ifp->if_flags, IFF_RUNNING);
ifq_clr_oactive(&ifp->if_snd);
ifp->if_timer = 0;
intr_barrier(octeon_eth_pow_recv_ih);
return 0;
}
/*
* Reset the whole thing.
*/
void
cas_stop(struct ifnet *ifp, int disable)
{
struct cas_softc *sc = (struct cas_softc *)ifp->if_softc;
struct cas_sxd *sd;
u_int32_t i;
DPRINTF(sc, ("%s: cas_stop\n", sc->sc_dev.dv_xname));
timeout_del(&sc->sc_tick_ch);
/*
* Mark the interface down and cancel the watchdog timer.
*/
ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
ifp->if_timer = 0;
mii_down(&sc->sc_mii);
cas_reset_rx(sc);
cas_reset_tx(sc);
/*
* Release any queued transmit buffers.
*/
for (i = 0; i < CAS_NTXDESC; i++) {
sd = &sc->sc_txd[i];
if (sd->sd_mbuf != NULL) {
bus_dmamap_sync(sc->sc_dmatag, sd->sd_map, 0,
sd->sd_map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
bus_dmamap_unload(sc->sc_dmatag, sd->sd_map);
m_freem(sd->sd_mbuf);
sd->sd_mbuf = NULL;
}
}
sc->sc_tx_cnt = sc->sc_tx_prod = sc->sc_tx_cons = 0;
if (disable)
cas_rxdrain(sc);
}
void
dl10019_stop_card(struct dp8390_softc *sc)
{
mii_down(&sc->sc_mii);
}
void
ax88190_stop_card(struct dp8390_softc *sc)
{
mii_down(&sc->sc_mii);
}
void
cpsw_stop(struct ifnet *ifp)
{
struct cpsw_softc * const sc = ifp->if_softc;
struct cpsw_ring_data * const rdp = sc->sc_rdp;
u_int i;
#if 0
/* XXX find where disable comes from */
printf("%s: ifp %p disable %d\n", __func__, ifp, disable);
#endif
if ((ifp->if_flags & IFF_RUNNING) == 0)
return;
timeout_del(&sc->sc_tick);
mii_down(&sc->sc_mii);
bus_space_write_4(sc->sc_bst, sc->sc_bsh, CPSW_CPDMA_TX_INTMASK_CLEAR, 1);
bus_space_write_4(sc->sc_bst, sc->sc_bsh, CPSW_CPDMA_RX_INTMASK_CLEAR, 1);
bus_space_write_4(sc->sc_bst, sc->sc_bsh, CPSW_WR_C_TX_EN(0), 0x0);
bus_space_write_4(sc->sc_bst, sc->sc_bsh, CPSW_WR_C_RX_EN(0), 0x0);
bus_space_write_4(sc->sc_bst, sc->sc_bsh, CPSW_WR_C_MISC_EN(0), 0x1F);
bus_space_write_4(sc->sc_bst, sc->sc_bsh, CPSW_CPDMA_TX_TEARDOWN, 0);
bus_space_write_4(sc->sc_bst, sc->sc_bsh, CPSW_CPDMA_RX_TEARDOWN, 0);
i = 0;
while ((sc->sc_txrun || sc->sc_rxrun) && i < 10000) {
delay(10);
if ((sc->sc_txrun == true) && cpsw_txintr(sc) == 0)
sc->sc_txrun = false;
if ((sc->sc_rxrun == true) && cpsw_rxintr(sc) == 0)
sc->sc_rxrun = false;
i++;
}
/* printf("%s toredown complete in %u\n", __func__, i); */
/* Reset wrapper */
bus_space_write_4(sc->sc_bst, sc->sc_bsh, CPSW_WR_SOFT_RESET, 1);
while(bus_space_read_4(sc->sc_bst, sc->sc_bsh, CPSW_WR_SOFT_RESET) & 1);
/* Reset SS */
bus_space_write_4(sc->sc_bst, sc->sc_bsh, CPSW_SS_SOFT_RESET, 1);
while(bus_space_read_4(sc->sc_bst, sc->sc_bsh, CPSW_SS_SOFT_RESET) & 1);
for (i = 0; i < 2; i++) {
bus_space_write_4(sc->sc_bst, sc->sc_bsh, CPSW_SL_SOFT_RESET(i), 1);
while(bus_space_read_4(sc->sc_bst, sc->sc_bsh, CPSW_SL_SOFT_RESET(i)) & 1);
}
/* Reset CPDMA */
bus_space_write_4(sc->sc_bst, sc->sc_bsh, CPSW_CPDMA_SOFT_RESET, 1);
while(bus_space_read_4(sc->sc_bst, sc->sc_bsh, CPSW_CPDMA_SOFT_RESET) & 1);
/* Release any queued transmit buffers. */
for (i = 0; i < CPSW_NTXDESCS; i++) {
bus_dmamap_unload(sc->sc_bdt, rdp->tx_dm[i]);
m_freem(rdp->tx_mb[i]);
rdp->tx_mb[i] = NULL;
}
ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE);
ifp->if_timer = 0;
/* XXX Not sure what this is doing calling disable here
where is disable set?
*/
#if 0
if (!disable)
return;
#endif
for (i = 0; i < CPSW_NRXDESCS; i++) {
bus_dmamap_unload(sc->sc_bdt, rdp->rx_dm[i]);
m_freem(rdp->rx_mb[i]);
rdp->rx_mb[i] = NULL;
}
}
