void mips_isa_SLTIU_impl(struct mips_ctx_t *ctx)
{
if ((unsigned int)mips_gpr_get_value(ctx,RS) < (unsigned int)SEXT32(IMM,16))
mips_gpr_set_value(ctx,RT, 1);
else
mips_gpr_set_value(ctx,RT, 0);
}
void mips_isa_SLTI_impl(struct mips_ctx_t *ctx)
{
if ((int)(mips_gpr_get_value(ctx,RS)) < IMM)
mips_gpr_set_value(ctx,RT, 1);
else
mips_gpr_set_value(ctx,RT, 0);
}
void mips_isa_LL_impl(struct mips_ctx_t *ctx)
{
unsigned int temp;
mem_read(ctx->mem, mips_gpr_get_value(ctx,RS) + IMM, sizeof(unsigned int), &temp);
mips_gpr_set_value(ctx,RT, temp);
// FIXME: add details from m2s-1.3/src/kernel/machine.def
}
void mips_isa_LHU_impl(struct mips_ctx_t *ctx)
{
unsigned short int temp;
unsigned int addr = mips_gpr_get_value(ctx,RS) + IMM;
mem_read(ctx->mem, addr, sizeof(unsigned short int), &temp);
mips_gpr_set_value(ctx,RT, temp);
}
void mips_isa_LB_impl(struct mips_ctx_t *ctx)
{
unsigned char temp;
unsigned int addr = mips_gpr_get_value(ctx,RS) + SEXT32(IMM,16);
mem_read(ctx->mem, addr, sizeof(unsigned char), &temp);
mips_gpr_set_value(ctx,RT, SEXT32(temp, 8));
}
void mips_isa_SC_impl(struct mips_ctx_t *ctx) {
unsigned int temp = mips_gpr_get_value(ctx, RT);
// if()
mem_write(ctx->mem, mips_gpr_get_value(ctx, RS) + IMM, 4, &temp);
mips_gpr_set_value(ctx, RT, 1);
// FIXME: revisit details in m2s-1.3/srs/kernel/machine.def
}
void mips_isa_LBU_impl(struct mips_ctx_t *ctx) {
unsigned char temp;
unsigned int addr = mips_gpr_get_value(ctx, RS) + SEXT32(IMM, 16);
mem_read(ctx->mem, addr, sizeof(unsigned char), &temp);
mips_gpr_set_value(ctx, RT, (unsigned)temp);
mips_isa_inst_debug(" r%d=0x%x", RT, mips_gpr_get_value(ctx, RT));
}
void mips_isa_ADDI_impl(struct mips_ctx_t *ctx)
{
int temp;
temp = (int)mips_gpr_get_value(ctx,RS) + (int)(OFFSET);
mips_gpr_set_value(ctx,RT, temp);
mips_isa_inst_debug(" r%d -> 0x%x", RT, temp);
}
void mips_isa_JAL_impl(struct mips_ctx_t *ctx) {
unsigned int reg_no = 31;
unsigned int value = ctx->regs->pc + 8;
unsigned int dest = (BITS32(ctx->regs->pc + 4, 31, 28) << 28) | (TARGET << 2);
// mips_gpr_set_value(ctx,31, ctx->regs->pc + 8);
mips_gpr_set_value(ctx, reg_no, value);
mips_isa_branch(ctx, dest);
}
void mips_isa_LW_impl(struct mips_ctx_t *ctx)
{
unsigned int temp;
unsigned int addr = mips_gpr_get_value(ctx,RS) + SEXT32((signed)IMM,16);
if ((BITS32(addr, 1, 0) | 0) == 1 )
fatal("LW: address error, effective address must be naturallty-aligned\n");
mem_read(ctx->mem, addr, 4, &temp);
mips_gpr_set_value(ctx,RT, temp);
mips_isa_inst_debug(" $0x%x=>tmp0, tmp0+r%d=>tmp0, tmp0=>r%d\n", SEXT32(IMM,16), RS, RT);
mips_isa_inst_debug(" value loaded: %x", temp);
}
void mips_isa_ADDIU_impl(struct mips_ctx_t *ctx)
{
mips_gpr_set_value(ctx,RT, mips_gpr_get_value(ctx,RS) + SEXT32((signed)IMM, 16));
mips_isa_inst_debug(" r%d -> r%d+0x%x", RT, RS, SEXT32(IMM, 16));
}
void mips_isa_SLL_impl(struct mips_ctx_t *ctx)
{
mips_gpr_set_value(ctx,RD, (mips_gpr_get_value(ctx,RT) << SA));
mips_isa_inst_debug(" %x=%x<<%x", mips_gpr_get_value(ctx,RD), mips_gpr_get_value(ctx,RT), SA);
}
void mips_isa_LUI_impl(struct mips_ctx_t *ctx)
{
mips_gpr_set_value(ctx,RT, (int)(IMM << 16));
mips_isa_inst_debug(" r%d: $0x%x", RT, mips_gpr_get_value(ctx,RT));
}
void mips_isa_XORI_impl(struct mips_ctx_t *ctx)
{
mips_gpr_set_value(ctx,RT, mips_gpr_get_value(ctx,RS) ^ (unsigned int) IMM);
}
void mips_isa_ORI_impl(struct mips_ctx_t *ctx)
{
mips_gpr_set_value(ctx,RT, mips_gpr_get_value(ctx,RS) | ((unsigned int) (IMM) & ((1U << (16)) - 1)));
// (unsigned int) IMM);
mips_isa_inst_debug(" r%d=0x%x", RT, mips_gpr_get_value(ctx,RT));
}
