/*!
\brief Syscall handler
Support for some syscalls required by project spec.
*/
int mips_syscall(MIPS *m, int code)
{
switch ( code )
{
case 1 :
{
MIPS_Native a0 = mips_get_reg(m, A0);
mipsim_printf(IO_MONITOR, "%d", a0);
break;
}
case 4 :
{
MIPS_Native a0 = mips_get_reg(m, A0);
char *s = fetch_str(m, a0);
mipsim_printf(IO_MONITOR, "%s", s);
free(s);
break;
}
case 5 :
{
char buf[SYSCALL_BUF_SZ];
mipsim_read(IO_MONITOR, 0, buf, SYSCALL_BUF_SZ);
mips_set_reg(m, V0, str_to_num(buf, NULL, NULL));
break;
}
case 8 :
{
MIPS_Native a0 = mips_get_reg(m, A0);
MIPS_Native a1 = mips_get_reg(m, A1);
char *buffer = (char*)malloc(a1);
mipsim_read(IO_MONITOR, 0, buffer, a1);
for ( MIPS_Native i = 0; i < a1; ++i )
mips_write_b(m, a0 + i, buffer[i], NULL);
free(buffer);
break;
}
case 10 :
mips_stop(m, MIPS_QUIT);
return MIPS_QUIT;
break;
default:
mipsim_printf(IO_WARNING, "Unknown syscall %d\n", code);
break;
}
return MIPS_OK;
}
static OPBASE_HANDLER( psx_setopbase )
{
if( address == 0x80030000 )
{
UINT8 *p_ram;
UINT8 *p_psxexe;
UINT32 n_stack;
UINT32 n_ram;
UINT32 n_left;
UINT32 n_address;
logerror( "psx_exe_load: pc %08x\n", m_psxexe_header.pc0 );
logerror( "psx_exe_load: org %08x\n", m_psxexe_header.t_addr );
logerror( "psx_exe_load: len %08x\n", m_psxexe_header.t_size );
logerror( "psx_exe_load: sp %08x\n", m_psxexe_header.s_addr );
logerror( "psx_exe_load: len %08x\n", m_psxexe_header.s_size );
p_ram = (UINT8 *)g_p_n_psxram;
n_ram = g_n_psxramsize;
p_psxexe = m_p_psxexe;
n_address = m_psxexe_header.t_addr;
n_left = m_psxexe_header.t_size;
while( n_left != 0 )
{
p_ram[ BYTE4_XOR_LE( n_address ) % n_ram ] = *( p_psxexe );
n_address++;
p_psxexe++;
n_left--;
}
free( m_p_psxexe );
activecpu_set_reg( MIPS_PC, m_psxexe_header.pc0 );
activecpu_set_reg( MIPS_R28, m_psxexe_header.gp0 );
n_stack = m_psxexe_header.s_addr + m_psxexe_header.s_size;
if( n_stack != 0 )
{
activecpu_set_reg( MIPS_R29, n_stack );
activecpu_set_reg( MIPS_R30, n_stack );
}
memory_set_opbase_handler( 0, NULL );
mips_stop();
return ~0;
}
return address;
}
/*!
\brief Monitor handler
Support for some idt/pmon entry points required for C/newlib support.
*/
int mips_monitor(MIPS *m, int entry)
{
MIPSIM_Config *cfg = mipsim_config();
switch ( entry )
{
case 12 :
{
/* int open(char *path,int flags) */
MIPS_Native a0 = mips_get_reg(m, A0);
MIPS_Native a1 = mips_get_reg(m, A1);
mipsim_printf(IO_TRACE, "open : %08x, %08x\n", a0, a1);
char *s = fetch_str(m, a0);
mips_set_reg(m, V0, mipsim_open(IO_MONITOR, s, a1));
free(s);
break;
}
case 14 :
{
/* int read(int file,char *ptr,int len) */
MIPS_Native a0 = mips_get_reg(m, A0);
MIPS_Native a1 = mips_get_reg(m, A1);
MIPS_Native a2 = mips_get_reg(m, A2);
mipsim_printf(IO_TRACE, "read : %08x, %08x, %08x\n", a0, a1, a2);
char *buffer = (char*)malloc(a2);
mips_set_reg(m, V0, mipsim_read(IO_MONITOR, a0, buffer, a2));
for ( MIPS_Native i = 0; i < a2; ++i )
mips_write_b(m, a1 + i, buffer[i], NULL);
free(buffer);
break;
}
case 16 :
{
/* int write(int file,char *ptr,int len) */
MIPS_Native a0 = mips_get_reg(m, A0);
MIPS_Native a1 = mips_get_reg(m, A1);
MIPS_Native a2 = mips_get_reg(m, A2);
mipsim_printf(IO_TRACE, "write : %08x, %08x, %08x\n", a0, a1, a2);
char *buffer = (char*)malloc(a2);
for ( MIPS_Native i = 0; i < a2; ++i )
buffer[i] = mips_read_b(m, a1 + i, NULL);
mips_set_reg(m, V0, mipsim_write(IO_MONITOR, a0, buffer, a2));
free(buffer);
break;
}
case 20 :
{
/* int close(int file) */
MIPS_Native a0 = mips_get_reg(m, A0);
mipsim_printf(IO_TRACE, "close : %08x\n", a0);
mips_set_reg(m, V0, mipsim_close(IO_MONITOR, a0));
break;
}
case 22 :
/* char inbyte(void) */
mipsim_printf(IO_TRACE, "inbyte\n");
mips_set_reg(m, V0, mipsim_inbyte(IO_MONITOR));
break;
case 24 :
{
/* void outbyte(char chr) : write a byte to "stdout" */
MIPS_Native a0 = mips_get_reg(m, A0);
mipsim_printf(IO_TRACE, "outbyte : %08x\n", a0);
mipsim_outbyte(IO_MONITOR, a0);
break;
}
case 34 :
/* void _exit() */
mipsim_printf(IO_TRACE, "_exit");
mips_stop(m, MIPS_QUIT);
return MIPS_QUIT;
case 110 :
{
/* void get_mem_info(unsigned int *ptr) */
/* in: A0 = pointer to three word memory location */
/* out: [A0 + 0] = size */
/* [A0 + 4] = instruction cache size */
/* [A0 + 8] = data cache size */
MIPS_Native a = mips_get_reg(m, A0);
mipsim_printf(IO_TRACE, "get_mem_info : 0x%08x", a);
mips_write_w(m, a + 0, cfg->newlib_stack_size, NULL);
mips_write_w(m, a + 4, 0, NULL);
mips_write_w(m, a + 8, 0, NULL);
break;
}
case 316 :
{
/* PMON printf */
/* in: A0 = pointer to format string */
/* A1 = optional argument 1 */
/* A2 = optional argument 2 */
/* A3 = optional argument 3 */
/* out: void */
MIPS_Addr a0 = mips_get_reg(m, A0);
mipsim_printf(IO_TRACE, "printf : %08x\n", a0);
break;
}
default:
mipsim_printf(IO_WARNING, "mon : %d\n", entry);
break;
}
return 0;
}
