static void msm_hsl_release_port(struct uart_port *port)
{
struct msm_hsl_port *msm_hsl_port = UART_TO_MSM(port);
struct platform_device *pdev = to_platform_device(port->dev);
struct resource *uart_resource;
struct resource *gsbi_resource;
resource_size_t size;
uart_resource = platform_get_resource_byname(pdev, IORESOURCE_MEM,
"uartdm_resource");
if (unlikely(!uart_resource))
return;
size = uart_resource->end - uart_resource->start + 1;
release_mem_region(port->mapbase, size);
iounmap(port->membase);
port->membase = NULL;
if (msm_serial_hsl_has_gsbi()) {
iowrite32(GSBI_PROTOCOL_IDLE, msm_hsl_port->mapped_gsbi +
GSBI_CONTROL_ADDR);
gsbi_resource = platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"gsbi_resource");
size = gsbi_resource->end - gsbi_resource->start + 1;
iounmap(msm_hsl_port->mapped_gsbi);
msm_hsl_port->mapped_gsbi = NULL;
}
}
static void msm_hsl_release_port_irda(struct uart_port *port)
{
struct msm_hsl_port *msm_hsl_port = UART_TO_MSM(port);
struct platform_device *pdev = to_platform_device(port->dev);
struct resource *uart_resource;
resource_size_t size;
D("%s () :port->line %d, ir\n", __func__, port->line);
uart_resource = platform_get_resource_byname(pdev, IORESOURCE_MEM,
"uartdm_resource");
if (!uart_resource) {
D("%s () uart_resource:port->line %d, ir\n", __func__, port->line);
uart_resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
}
if (unlikely(!uart_resource))
return;
size = uart_resource->end - uart_resource->start + 1;
release_mem_region(port->mapbase, size);
iounmap(port->membase);
port->membase = NULL;
if (msm_serial_hsl_has_gsbi(port)) {
D("%s () msm_serial_hsl_has_gsbi :port->line %d, ir\n", __func__, port->line);
iowrite32(GSBI_PROTOCOL_IDLE, msm_hsl_port->mapped_gsbi +
GSBI_CONTROL_ADDR);
iounmap(msm_hsl_port->mapped_gsbi);
msm_hsl_port->mapped_gsbi = NULL;
}
D("%s () ok :port->line %d, ir\n", __func__, port->line);
}
static void msm_hsl_config_port_irda(struct uart_port *port, int flags)
{
struct msm_hsl_port *msm_hsl_port = UART_TO_MSM(port);
D("%s () :port->line %d, ir\n", __func__, port->line);
if (flags & UART_CONFIG_TYPE) {
port->type = PORT_MSM;
if (msm_hsl_request_port_irda(port)) {
D("%s () request_port_irda return:port->line %d, ir\n", __func__, port->line);
return;
}
}
if (msm_serial_hsl_has_gsbi(port)) {
if (msm_hsl_port->pclk)
clk_prepare_enable(msm_hsl_port->pclk);
if ((ioread32(msm_hsl_port->mapped_gsbi + GSBI_CONTROL_ADDR) &
GSBI_PROTOCOL_I2C_UART) != GSBI_PROTOCOL_I2C_UART)
iowrite32(GSBI_PROTOCOL_I2C_UART,
msm_hsl_port->mapped_gsbi + GSBI_CONTROL_ADDR);
D("%s: irda line[%d] GSBI_CONTROL_ADDR-%x\n", __func__,
port->line, ioread32(msm_hsl_port->mapped_gsbi + GSBI_CONTROL_ADDR));
D("%s () GSBI_CONTROL_ADDR:port->line %d, ir\n", __func__, port->line);
if (msm_hsl_port->pclk)
clk_disable_unprepare(msm_hsl_port->pclk);
}
}
static int msm_hsl_startup_cir(struct uart_port *port)
{
struct msm_hsl_port *msm_hsl_port = UART_TO_MSM(port);
unsigned int data, rfr_level;
unsigned int vid;
int ret;
unsigned long flags;
snprintf(msm_hsl_port->name, sizeof(msm_hsl_port->name),
"msm_serial_hsl%d", port->line);
D("%s () :port->line %d, ir\n", __func__, port->line);
if (!(is_console(port)) || (!port->cons) ||
(port->cons && (!(port->cons->flags & CON_ENABLED)))) {
if (msm_serial_hsl_has_gsbi(port)) {
D("%s () serial_hsl_has_gsbi:port->line %d, ir\n", __func__, port->line);
if ((ioread32(msm_hsl_port->mapped_gsbi +
GSBI_CONTROL_ADDR) & GSBI_PROTOCOL_I2C_UART)
!= GSBI_PROTOCOL_I2C_UART){
D("%s () iowrite32i:port->line %d, ir\n", __func__, port->line);
iowrite32(GSBI_PROTOCOL_I2C_UART,
msm_hsl_port->mapped_gsbi +
GSBI_CONTROL_ADDR);
}
}
}
#ifndef CONFIG_PM_RUNTIME
msm_hsl_init_clock(port);
#endif
pm_runtime_get_sync(port->dev);
if (likely(port->fifosize > 48))
rfr_level = port->fifosize - 16;
else
rfr_level = port->fifosize;
rfr_level = (rfr_level / 4);
spin_lock_irqsave(&port->lock, flags);
vid = msm_hsl_port->ver_id;
data = msm_hsl_read(port, regmap[vid][UARTDM_MR1]);
data &= ~UARTDM_MR1_AUTO_RFR_LEVEL1_BMSK;
data &= ~UARTDM_MR1_AUTO_RFR_LEVEL0_BMSK;
data |= UARTDM_MR1_AUTO_RFR_LEVEL1_BMSK & (rfr_level << 2);
data |= UARTDM_MR1_AUTO_RFR_LEVEL0_BMSK & rfr_level;
msm_hsl_write(port, data, regmap[vid][UARTDM_MR1]);
spin_unlock_irqrestore(&port->lock, flags);
ret = request_irq(port->irq, msm_hsl_irq, IRQF_TRIGGER_HIGH,
msm_hsl_port->name, port);
if (unlikely(ret)) {
printk(KERN_ERR "%s: failed to request_irq\n", __func__);
return ret;
}
return 0;
}
static int msm_hsl_request_port(struct uart_port *port)
{
struct msm_hsl_port *msm_hsl_port = UART_TO_MSM(port);
struct platform_device *pdev = to_platform_device(port->dev);
struct resource *uart_resource;
struct resource *gsbi_resource;
resource_size_t size;
uart_resource = platform_get_resource_byname(pdev, IORESOURCE_MEM,
"uartdm_resource");
if (unlikely(!uart_resource)) {
pr_err("%s: can't get uartdm resource\n", __func__);
return -ENXIO;
}
size = uart_resource->end - uart_resource->start + 1;
if (unlikely(!request_mem_region(port->mapbase, size,
"msm_serial_hsl"))) {
pr_err("%s: can't get mem region for uartdm\n", __func__);
return -EBUSY;
}
port->membase = ioremap(port->mapbase, size);
if (!port->membase) {
release_mem_region(port->mapbase, size);
return -EBUSY;
}
if (msm_serial_hsl_has_gsbi()) {
gsbi_resource = platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"gsbi_resource");
if (unlikely(!gsbi_resource)) {
pr_err("%s: can't get gsbi resource\n", __func__);
return -ENXIO;
}
size = gsbi_resource->end - gsbi_resource->start + 1;
if (unlikely(!request_mem_region(gsbi_resource->start, size,
"msm_serial_hsl"))) {
pr_err("%s: can't get mem region for gsbi\n", __func__);
return -EBUSY;
}
msm_hsl_port->mapped_gsbi = ioremap(gsbi_resource->start,
size);
if (!msm_hsl_port->mapped_gsbi) {
release_mem_region(gsbi_resource->start, size);
return -EBUSY;
}
}
return 0;
}
static void msm_hsl_config_port(struct uart_port *port, int flags)
{
struct msm_hsl_port *msm_hsl_port = UART_TO_MSM(port);
if (flags & UART_CONFIG_TYPE) {
port->type = PORT_MSM;
if (msm_hsl_request_port(port))
return;
}
if (msm_serial_hsl_has_gsbi())
if ((ioread32(msm_hsl_port->mapped_gsbi + GSBI_CONTROL_ADDR) &
GSBI_PROTOCOL_I2C_UART) != GSBI_PROTOCOL_I2C_UART)
iowrite32(GSBI_PROTOCOL_I2C_UART,
msm_hsl_port->mapped_gsbi + GSBI_CONTROL_ADDR);
}
static int msm_hsl_startup(struct uart_port *port)
{
struct msm_hsl_port *msm_hsl_port = UART_TO_MSM(port);
struct platform_device *pdev = to_platform_device(port->dev);
const struct msm_serial_hslite_platform_data *pdata =
pdev->dev.platform_data;
unsigned int data, rfr_level;
int ret;
unsigned long flags;
snprintf(msm_hsl_port->name, sizeof(msm_hsl_port->name),
"msm_serial_hsl%d", port->line);
if (!(is_console(port)) || (!port->cons) ||
(port->cons && (!(port->cons->flags & CON_ENABLED)))) {
if (msm_serial_hsl_has_gsbi())
if ((ioread32(msm_hsl_port->mapped_gsbi +
GSBI_CONTROL_ADDR) & GSBI_PROTOCOL_I2C_UART)
!= GSBI_PROTOCOL_I2C_UART)
iowrite32(GSBI_PROTOCOL_I2C_UART,
msm_hsl_port->mapped_gsbi +
GSBI_CONTROL_ADDR);
if (pdata && pdata->config_gpio) {
ret = gpio_request(pdata->uart_tx_gpio,
"UART_TX_GPIO");
if (unlikely(ret)) {
pr_err("%s: gpio request failed for:%d\n",
__func__, pdata->uart_tx_gpio);
return ret;
}
ret = gpio_request(pdata->uart_rx_gpio, "UART_RX_GPIO");
if (unlikely(ret)) {
pr_err("%s: gpio request failed for:%d\n",
__func__, pdata->uart_rx_gpio);
gpio_free(pdata->uart_tx_gpio);
return ret;
}
}
}
#ifndef CONFIG_PM_RUNTIME
msm_hsl_init_clock(port);
#endif
pm_runtime_get_sync(port->dev);
if (likely(port->fifosize > 12))
rfr_level = port->fifosize - 12;
else
rfr_level = port->fifosize;
spin_lock_irqsave(&port->lock, flags);
/* set automatic RFR level */
data = msm_hsl_read(port, UARTDM_MR1_ADDR);
data &= ~UARTDM_MR1_AUTO_RFR_LEVEL1_BMSK;
data &= ~UARTDM_MR1_AUTO_RFR_LEVEL0_BMSK;
data |= UARTDM_MR1_AUTO_RFR_LEVEL1_BMSK & (rfr_level << 2);
data |= UARTDM_MR1_AUTO_RFR_LEVEL0_BMSK & rfr_level;
msm_hsl_write(port, data, UARTDM_MR1_ADDR);
spin_unlock_irqrestore(&port->lock, flags);
ret = request_irq(port->irq, msm_hsl_irq, IRQF_TRIGGER_HIGH,
msm_hsl_port->name, port);
if (unlikely(ret)) {
printk(KERN_ERR "%s: failed to request_irq\n", __func__);
return ret;
}
return 0;
}
static int __devinit msm_serial_hsl_probe(struct platform_device *pdev)
{
struct msm_hsl_port *msm_hsl_port;
struct resource *uart_resource;
struct resource *gsbi_resource;
struct uart_port *port;
int ret;
if (unlikely(pdev->id < 0 || pdev->id >= UART_NR))
return -ENXIO;
printk(KERN_INFO "msm_serial_hsl: detected port #%d\n", pdev->id);
port = get_port_from_line(pdev->id);
port->dev = &pdev->dev;
msm_hsl_port = UART_TO_MSM(port);
if (msm_serial_hsl_has_gsbi()) {
gsbi_resource =
platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"gsbi_resource");
if (unlikely(!gsbi_resource))
return -ENXIO;
msm_hsl_port->clk = clk_get(&pdev->dev, "gsbi_uart_clk");
msm_hsl_port->pclk = clk_get(&pdev->dev, "gsbi_pclk");
} else {
msm_hsl_port->clk = clk_get(&pdev->dev, "uartdm_clk");
msm_hsl_port->pclk = NULL;
}
if (unlikely(IS_ERR(msm_hsl_port->clk))) {
printk(KERN_ERR "%s: Error getting clk\n", __func__);
return PTR_ERR(msm_hsl_port->clk);
}
if (unlikely(IS_ERR(msm_hsl_port->pclk))) {
printk(KERN_ERR "%s: Error getting pclk\n", __func__);
return PTR_ERR(msm_hsl_port->pclk);
}
uart_resource = platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"uartdm_resource");
if (unlikely(!uart_resource)) {
printk(KERN_ERR "getting uartdm_resource failed\n");
return -ENXIO;
}
port->mapbase = uart_resource->start;
port->irq = platform_get_irq(pdev, 0);
if (unlikely(port->irq < 0)) {
printk(KERN_ERR "%s: getting irq failed\n", __func__);
return -ENXIO;
}
device_set_wakeup_capable(&pdev->dev, 1);
platform_set_drvdata(pdev, port);
pm_runtime_enable(port->dev);
msm_hsl_debugfs_init(msm_hsl_port, pdev->id);
ret = uart_add_one_port(&msm_hsl_uart_driver, port);
return ret;
}
static int __init msm_serial_hsl_probe(struct platform_device *pdev)
{
struct msm_hsl_port *msm_hsl_port;
struct resource *uart_resource;
struct resource *gsbi_resource;
struct uart_port *port;
struct msm_serial_hslite_platform_data *pdata = pdev->dev.platform_data;
int ret;
if (unlikely(pdev->id < 0 || pdev->id >= UART_NR))
return -ENXIO;
printk(KERN_INFO "msm_serial_hsl: detected port #%d\n", pdev->id);
port = get_port_from_line(pdev->id);
port->dev = &pdev->dev;
msm_hsl_port = UART_TO_MSM(port);
if (pdata && pdata->config_gpio) {
ret = gpio_request(pdata->uart_tx_gpio, "UART_TX_GPIO");
if (unlikely(ret)) {
printk(KERN_ERR "%s: gpio request failed for:"
"%d\n", __func__, pdata->uart_tx_gpio);
return ret;
}
ret = gpio_request(pdata->uart_rx_gpio, "UART_RX_GPIO");
if (unlikely(ret)) {
printk(KERN_ERR "%s: gpio request failed for:"
"%d\n", __func__, pdata->uart_rx_gpio);
gpio_free(pdata->uart_tx_gpio);
return ret;
}
}
if (msm_serial_hsl_has_gsbi()) {
gsbi_resource =
platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"gsbi_resource");
if (unlikely(!gsbi_resource))
return -ENXIO;
msm_hsl_port->clk = clk_get(&pdev->dev, "gsbi_uart_clk");
msm_hsl_port->pclk = clk_get(&pdev->dev, "gsbi_pclk");
} else {
msm_hsl_port->clk = clk_get(&pdev->dev, "uartdm_clk");
msm_hsl_port->pclk = NULL;
}
if (unlikely(IS_ERR(msm_hsl_port->clk))) {
printk(KERN_ERR "%s: Error getting clk\n", __func__);
return PTR_ERR(msm_hsl_port->clk);
}
if (unlikely(IS_ERR(msm_hsl_port->pclk))) {
printk(KERN_ERR "%s: Error getting pclk\n", __func__);
return PTR_ERR(msm_hsl_port->pclk);
}
/* Set up the MREG/NREG/DREG/MNDREG */
ret = clk_set_rate(msm_hsl_port->clk, 7372800);
if (ret) {
printk(KERN_WARNING "Error setting clock rate on UART\n");
return ret;
}
uart_resource = platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"uartdm_resource");
if (unlikely(!uart_resource)) {
printk(KERN_ERR "getting uartdm_resource failed\n");
return -ENXIO;
}
port->mapbase = uart_resource->start;
port->irq = platform_get_irq(pdev, 0);
if (unlikely(port->irq < 0)) {
printk(KERN_ERR "%s: getting irq failed\n", __func__);
return -ENXIO;
}
device_set_wakeup_capable(&pdev->dev, 1);
platform_set_drvdata(pdev, port);
pm_runtime_enable(port->dev);
ret = uart_add_one_port(&msm_hsl_uart_driver, port);
return ret;
}
static int msm_hsl_startup(struct uart_port *port)
{
struct msm_hsl_port *msm_hsl_port = UART_TO_MSM(port);
struct platform_device *pdev = to_platform_device(port->dev);
struct msm_serial_hslite_platform_data *pdata = pdev->dev.platform_data;
unsigned int data, rfr_level;
int ret;
unsigned long flags;
snprintf(msm_hsl_port->name, sizeof(msm_hsl_port->name),
"msm_serial_hsl%d", port->line);
if (!(is_console(port)) || (!port->cons) ||
(port->cons && (!(port->cons->flags & CON_ENABLED)))) {
if (msm_serial_hsl_has_gsbi())
if ((ioread32(msm_hsl_port->mapped_gsbi +
GSBI_CONTROL_ADDR) & GSBI_PROTOCOL_I2C_UART)
!= GSBI_PROTOCOL_I2C_UART)
iowrite32(GSBI_PROTOCOL_I2C_UART,
msm_hsl_port->mapped_gsbi +
GSBI_CONTROL_ADDR);
if (pdata && pdata->config_gpio) {
ret = gpio_request(pdata->uart_tx_gpio,
"UART_TX_GPIO");
if (unlikely(ret)) {
pr_err("%s: gpio request failed for:%d\n",
__func__, pdata->uart_tx_gpio);
return ret;
}
ret = gpio_request(pdata->uart_rx_gpio, "UART_RX_GPIO");
if (unlikely(ret)) {
pr_err("%s: gpio request failed for:%d\n",
__func__, pdata->uart_rx_gpio);
gpio_free(pdata->uart_tx_gpio);
return ret;
}
}
}
#ifndef CONFIG_PM_RUNTIME
msm_hsl_init_clock(port);
#endif
pm_runtime_get_sync(port->dev);
if (likely(port->fifosize > 12))
rfr_level = port->fifosize - 12;
else
rfr_level = port->fifosize;
spin_lock_irqsave(&port->lock, flags);
/* set automatic RFR level */
data = msm_hsl_read(port, UARTDM_MR1_ADDR);
data &= ~UARTDM_MR1_AUTO_RFR_LEVEL1_BMSK;
data &= ~UARTDM_MR1_AUTO_RFR_LEVEL0_BMSK;
data |= UARTDM_MR1_AUTO_RFR_LEVEL1_BMSK & (rfr_level << 2);
data |= UARTDM_MR1_AUTO_RFR_LEVEL0_BMSK & rfr_level;
msm_hsl_write(port, data, UARTDM_MR1_ADDR);
/* Make sure IPR is not 0 to start with*/
msm_hsl_write(port, UARTDM_IPR_STALE_LSB_BMSK, UARTDM_IPR_ADDR);
data = 0;
if (!(is_console(port)) || (!port->cons) ||
(port->cons && (!(port->cons->flags & CON_ENABLED)))) {
msm_hsl_write(port, CR_PROTECTION_EN, UARTDM_CR_ADDR);
msm_hsl_write(port, UARTDM_MR2_BITS_PER_CHAR_8 | STOP_BIT_ONE,
UARTDM_MR2_ADDR); /* 8N1 */
msm_hsl_reset(port);
data = UARTDM_CR_TX_EN_BMSK;
}
data |= UARTDM_CR_RX_EN_BMSK;
msm_hsl_write(port, data, UARTDM_CR_ADDR); /* enable TX & RX */
/* turn on RX and CTS interrupts */
msm_hsl_port->imr = UARTDM_ISR_RXSTALE_BMSK
| UARTDM_ISR_DELTA_CTS_BMSK | UARTDM_ISR_RXLEV_BMSK;
spin_unlock_irqrestore(&port->lock, flags);
ret = request_irq(port->irq, msm_hsl_irq, IRQF_TRIGGER_HIGH,
msm_hsl_port->name, port);
if (unlikely(ret)) {
printk(KERN_ERR "%s: failed to request_irq\n", __func__);
return ret;
}
spin_lock_irqsave(&port->lock, flags);
msm_hsl_write(port, RESET_STALE_INT, UARTDM_CR_ADDR);
msm_hsl_write(port, 6500, UARTDM_DMRX_ADDR);
msm_hsl_write(port, STALE_EVENT_ENABLE, UARTDM_CR_ADDR);
msm_hsl_write(port, msm_hsl_port->imr, UARTDM_IMR_ADDR);
spin_unlock_irqrestore(&port->lock, flags);
return 0;
}
static int __init msm_serial_hsl_probe(struct platform_device *pdev)
{
struct msm_hsl_port *msm_hsl_port;
struct resource *uart_resource;
struct resource *gsbi_resource;
struct uart_port *port;
int ret;
if (unlikely(pdev->id < 0 || pdev->id >= UART_NR))
return -ENXIO;
printk(KERN_INFO "msm_serial_hsl: detected port #%d\n", pdev->id);
port = get_port_from_line(pdev->id);
port->dev = &pdev->dev;
msm_hsl_port = UART_TO_MSM(port);
if (msm_serial_hsl_has_gsbi()) {
gsbi_resource =
platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"gsbi_resource");
if (unlikely(!gsbi_resource))
return -ENXIO;
msm_hsl_port->clk = clk_get(&pdev->dev, "gsbi_uart_clk");
msm_hsl_port->pclk = clk_get(&pdev->dev, "gsbi_pclk");
} else {
msm_hsl_port->clk = clk_get(&pdev->dev, "uartdm_clk");
msm_hsl_port->pclk = NULL;
}
if (unlikely(IS_ERR(msm_hsl_port->clk))) {
printk(KERN_ERR "%s: Error getting clk\n", __func__);
return PTR_ERR(msm_hsl_port->clk);
}
if (unlikely(IS_ERR(msm_hsl_port->pclk))) {
printk(KERN_ERR "%s: Error getting pclk\n", __func__);
return PTR_ERR(msm_hsl_port->pclk);
}
/* Set up the MREG/NREG/DREG/MNDREG */
#ifdef CONFIG_LGE_FELICA
ret = clk_set_rate(msm_hsl_port->clk, 7372800);
if (ret) {
printk(KERN_WARNING "Error setting clock rate on UART\n");
return ret;
}
#else // [email protected] 30550g original, remove clk_set_rate
#endif
uart_resource = platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"uartdm_resource");
if (unlikely(!uart_resource)) {
printk(KERN_ERR "getting uartdm_resource failed\n");
return -ENXIO;
}
port->mapbase = uart_resource->start;
port->irq = platform_get_irq(pdev, 0);
if (unlikely(port->irq < 0)) {
printk(KERN_ERR "%s: getting irq failed\n", __func__);
return -ENXIO;
}
device_set_wakeup_capable(&pdev->dev, 1);
platform_set_drvdata(pdev, port);
pm_runtime_enable(port->dev);
ret = uart_add_one_port(&msm_hsl_uart_driver, port);
return ret;
}
static int msm_hsl_request_port_irda(struct uart_port *port)
{
struct msm_hsl_port *msm_hsl_port = UART_TO_MSM(port);
struct platform_device *pdev = to_platform_device(port->dev);
struct resource *uart_resource;
struct resource *gsbi_resource;
resource_size_t size;
uart_resource = platform_get_resource_byname(pdev, IORESOURCE_MEM,
"uartdm_resource");
if (!uart_resource) {
D("%s ():uart_resource :port->line %d, ir\n", __func__, port->line);
uart_resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
}
if (unlikely(!uart_resource)) {
E("%s: can't get uartdm resource\n", __func__);
return -ENXIO;
}
size = uart_resource->end - uart_resource->start + 1;
if (unlikely(!request_mem_region(port->mapbase, size,
"msm_serial_irda"))) {
E("%s: can't get mem region for uartdm\n", __func__);
return -EBUSY;
}
port->membase = ioremap(port->mapbase, size);
if (!port->membase) {
release_mem_region(port->mapbase, size);
return -EBUSY;
}
D("%s: memory map for base 0x%x\n", __func__, port->mapbase);
D("%s ():uart_resource :port->line %d, memory map for base 0x%x ir\n", __func__, port->line, port->mapbase);
if (msm_serial_hsl_has_gsbi(port)) {
gsbi_resource = platform_get_resource_byname(pdev,
IORESOURCE_MEM,
"gsbi_resource");
if (!gsbi_resource) {
gsbi_resource = platform_get_resource(pdev,
IORESOURCE_MEM, 1);
D("%s ():gsbi_resource :port->line %d, ir\n", __func__, port->line);
}
if (unlikely(!gsbi_resource)) {
E("%s: can't get gsbi resource\n", __func__);
return -ENXIO;
}
D("%s: get gsbi_resource for port[%d]\n", __func__, port->line);
size = gsbi_resource->end - gsbi_resource->start + 1;
msm_hsl_port->mapped_gsbi = ioremap(gsbi_resource->start,
size);
if (!msm_hsl_port->mapped_gsbi)
return -EBUSY;
}
D("%s () ok:port->line %d, ir\n", __func__, port->line);
return 0;
}
