MV_U32 mvSocUnitMapFillFlagFormTable(void)
{
int i;
MV_U32 flag = 0;
for (i = 0; mv_res_table[i].cpuId != -1; i++)
{
if (mvSocUnitMapGet(i) == 0)//SLAVE_CPU)
{
switch (i)
{
case UART0: flag |= UART0_T0_CPU1; break;
case UART1: flag |= UART1_TO_CPU1; break;
case PEX00: flag |= PEX0_TO_CPU1; break;
case PEX10: flag |= PEX1_TO_CPU1; break;
case GIGA0: flag |= GIGA0_TO_CPU1; break;
case GIGA1: flag |= GIGA1_TO_CPU1; break;
case GIGA2: flag |= GIGA2_TO_CPU1; break;
case GIGA3: flag |= GIGA3_TO_CPU1; break;
case SATA: flag |= SATA_TO_CPU1; break;
case XOR: flag |= XOR_TO_CPU1; break;
case IDMA: flag |= IDMA_TO_CPU1; break;
case USB0: flag |= USB0_TO_CPU1; break;
case USB1: flag |= USB1_TO_CPU1; break;
case USB2: flag |= USB2_TO_CPU1; break;
case CESA: flag |= CESA_TO_CPU1; break;
case NOR_FLASH: flag |= NOR_TO_CPU1; break;
case NAND_FLASH: flag |= NAND_TO_CPU1; break;
case SPI_FLASH: flag |= SPI_TO_CPU1; break;
case TDM: flag |= TDM_TO_CPU1; break;
default:
break;
}
}
}
return flag;
}*/
MV_BOOL mvSocUnitIsMappedToThisCpu(MV_SOC_UNIT unit)
{
return (mvSocUnitMapGet(unit) == whoAmI());
}
