Beispiel #1
0
RegisterString registerMaskBit(Location l, fint stackLocs, fint nonRegisterArgs) {
  if (isRegister(l)) {
    if (l >= I0 && l < I0 + NumInRegisters) {
      // an in register
      return nthBit(l - I0 + NumLocalRegisters);
    } else {
      assert(l >= L0 && l < L0 + NumLocalRegisters, "unexpected register");
      return nthBit(l - L0);
    }
  } else if (isStackRegister(l)) {
    l = Location(l - StackLocations);
    if (l < BitsPerWord - (NumInRegisters + NumLocalRegisters)) {
      return nthBit(l + NumInRegisters + NumLocalRegisters);
    }
  } else if (isExtraArgRegister(l)) {
    fint which = ExtraArgLocations - l;
    assert(which <= nonRegisterArgs, "nonRegisterArgs too small");
    which = stackLocs + (nonRegisterArgs - which);  // translate into stack temp
    assert(which >= 0, "should be non-negative");
    if (which < BitsPerWord - (NumInRegisters + NumLocalRegisters)) {
      return nthBit(which + NumInRegisters + NumLocalRegisters);
    }
  }
  return 0;
}
Beispiel #2
0
 void CodeGen::testStackOverflow(RegisterState* s) {
   a.Comment("stack overflow/interrupt check");
   a.SubCCR(SP, SPLimitReg, G0);    // test for stack overflow
   Label* l = a.BgeForward(false);            // no overflow
   a.Nop();
   assert(s->mask() != 0, "should have non-zero mask");
   assert((s->allocated & nthBit(IReceiverReg)) != 0,
          "should have at least ReceiverReg allocated");
   (void)cPrimCall(intrCheck(), s, true, true, 0);
   l->define();
 }
Beispiel #3
0
RegisterString registerMaskBit(Location l, fint stackLocs, fint nonRegisterArgs) {
  Unused(nonRegisterArgs);
  if (isRegister(l)) {
    assert(l >= LowestLocalNonVolReg && l <= HighestNonVolReg, "unexpected register");
    return nthBit(l);
  } else {
    // The Sparc version of this function returns a mask bit for some stack locations.
    // But it seems that on the PPC, we only return mask bits for registers (i.e. not
    // for stack locations).
    // A look at registerState{,_ppc}.cpp shows that the NIC's mask only contains
    // registers, not stack locations.  See RegisterState::mask for a supporting comment.
    
    // Dave: why don't we put stack loc's info in the registerMask?  I haven't
    // looked at the GC code too closely.  Even on the Sparc, I'm confused because if the
    // required mask bit doesn't fit in a word, we don't return it.  Do we manually
    // go through the stack locations at GC for locations not contained in the mask?
    
    // Mike: the compiler must initialize all stack locations, that way they are always GC'ed.
    // This was an optimization on the SPARC. -- dmu
    return 0;
  }
}
Beispiel #4
0
static const fint fractSize = 23;
static const fint expSize = 8;
static const fint expOffset = fractSize;

# ifdef FAST_FLOATS
  floatOop infinityOop = floatOop(nthMask(expSize) << expOffset
                                  |  Float_Tag);
# else

  static const fint signSize = 1;
  static const fint signOffset = fractSize + expSize;
  
  static const fint selfExpSize   = fint(expSize   - Tag_Size);
  static const fint selfExpOffset = fint(expOffset + Tag_Size);
  
  static const fint bias = nthBit(expSize) / 2  -  1;
  static const fint selfBias = nthBit(selfExpSize) / 2  -  1;
  
  floatOop infinityOop = floatOop(nthMask(selfExpSize) << selfExpOffset
                                  |  Float_Tag);
  
  floatOop as_floatOop(float value) {
    union { float f; uint32 i; } x;
    x.f = value;
    uint32 i = x.i;
    int32 exp     = i >> expOffset  &  nthMask(expSize);
    int32 selfExp = exp - bias + selfBias;
    int32 fract   = i & nthMask(fractSize);
    int32 r       = (i & (nthMask(signSize) << signOffset)) | Float_Tag;
    
    if (selfExp <= 0) {