Beispiel #1
0
static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{
	struct adf_accel_dev *accel_dev;
	struct adf_accel_pci *accel_pci_dev;
	struct adf_hw_device_data *hw_data;
	char name[ADF_DEVICE_NAME_LENGTH];
	unsigned int i, bar_nr;
	int ret;

	switch (ent->device) {
	case ADF_DH895XCC_PCI_DEVICE_ID:
		break;
	default:
		dev_err(&pdev->dev, "Invalid device 0x%x.\n", ent->device);
		return -ENODEV;
	}

	if (num_possible_nodes() > 1 && dev_to_node(&pdev->dev) < 0) {
		/* If the accelerator is connected to a node with no memory
		 * there is no point in using the accelerator since the remote
		 * memory transaction will be very slow. */
		dev_err(&pdev->dev, "Invalid NUMA configuration.\n");
		return -EINVAL;
	}

	accel_dev = kzalloc_node(sizeof(*accel_dev), GFP_KERNEL,
				 dev_to_node(&pdev->dev));
	if (!accel_dev)
		return -ENOMEM;

	INIT_LIST_HEAD(&accel_dev->crypto_list);

	/* Add accel device to accel table.
	 * This should be called before adf_cleanup_accel is called */
	if (adf_devmgr_add_dev(accel_dev)) {
		dev_err(&pdev->dev, "Failed to add new accelerator device.\n");
		kfree(accel_dev);
		return -EFAULT;
	}

	accel_dev->owner = THIS_MODULE;
	/* Allocate and configure device configuration structure */
	hw_data = kzalloc_node(sizeof(*hw_data), GFP_KERNEL,
			       dev_to_node(&pdev->dev));
	if (!hw_data) {
		ret = -ENOMEM;
		goto out_err;
	}

	accel_dev->hw_device = hw_data;
	switch (ent->device) {
	case ADF_DH895XCC_PCI_DEVICE_ID:
		adf_init_hw_data_dh895xcc(accel_dev->hw_device);
		break;
	default:
		return -ENODEV;
	}
	accel_pci_dev = &accel_dev->accel_pci_dev;
	pci_read_config_byte(pdev, PCI_REVISION_ID, &accel_pci_dev->revid);
	pci_read_config_dword(pdev, ADF_DH895XCC_FUSECTL_OFFSET,
			      &hw_data->fuses);

	/* Get Accelerators and Accelerators Engines masks */
	hw_data->accel_mask = hw_data->get_accel_mask(hw_data->fuses);
	hw_data->ae_mask = hw_data->get_ae_mask(hw_data->fuses);
	accel_pci_dev->sku = hw_data->get_sku(hw_data);
	accel_pci_dev->pci_dev = pdev;
	/* If the device has no acceleration engines then ignore it. */
	if (!hw_data->accel_mask || !hw_data->ae_mask ||
	    ((~hw_data->ae_mask) & 0x01)) {
		dev_err(&pdev->dev, "No acceleration units found");
		ret = -EFAULT;
		goto out_err;
	}

	/* Create dev top level debugfs entry */
	snprintf(name, sizeof(name), "%s%s_dev%d", ADF_DEVICE_NAME_PREFIX,
		 hw_data->dev_class->name, hw_data->instance_id);
	accel_dev->debugfs_dir = debugfs_create_dir(name, NULL);
	if (!accel_dev->debugfs_dir) {
		dev_err(&pdev->dev, "Could not create debugfs dir\n");
		ret = -EINVAL;
		goto out_err;
	}

	/* Create device configuration table */
	ret = adf_cfg_dev_add(accel_dev);
	if (ret)
		goto out_err;

	pcie_set_readrq(pdev, 1024);

	/* enable PCI device */
	if (pci_enable_device(pdev)) {
		ret = -EFAULT;
		goto out_err;
	}

	/* set dma identifier */
	if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
		if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) {
			dev_err(&pdev->dev, "No usable DMA configuration\n");
			ret = -EFAULT;
			goto out_err;
		} else {
			pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
		}

	} else {
		pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
	}

	if (pci_request_regions(pdev, adf_driver_name)) {
		ret = -EFAULT;
		goto out_err;
	}

	/* Read accelerator capabilities mask */
	pci_read_config_dword(pdev, ADF_DH895XCC_LEGFUSE_OFFSET,
			      &hw_data->accel_capabilities_mask);

	/* Find and map all the device's BARS */
	for (i = 0; i < ADF_PCI_MAX_BARS; i++) {
		struct adf_bar *bar = &accel_pci_dev->pci_bars[i];

		bar_nr = i * 2;
		bar->base_addr = pci_resource_start(pdev, bar_nr);
		if (!bar->base_addr)
			break;
		bar->size = pci_resource_len(pdev, bar_nr);
		bar->virt_addr = pci_iomap(accel_pci_dev->pci_dev, bar_nr, 0);
		if (!bar->virt_addr) {
			dev_err(&pdev->dev, "Failed to map BAR %d\n", i);
			ret = -EFAULT;
			goto out_err;
		}
	}
	pci_set_master(pdev);

	if (adf_enable_aer(accel_dev, &adf_driver)) {
		dev_err(&pdev->dev, "Failed to enable aer\n");
		ret = -EFAULT;
		goto out_err;
	}

	if (pci_save_state(pdev)) {
		dev_err(&pdev->dev, "Failed to save pci state\n");
		ret = -ENOMEM;
		goto out_err;
	}

	ret = adf_dev_configure(accel_dev);
	if (ret)
		goto out_err;

	ret = adf_dev_init(accel_dev);
	if (ret)
		goto out_err;

	ret = adf_dev_start(accel_dev);
	if (ret) {
		adf_dev_stop(accel_dev);
		goto out_err;
	}

	return 0;
out_err:
	adf_cleanup_accel(accel_dev);
	return ret;
}
/* TODO - Read fdt to get this info, add BCM65500 platform driver detection */
static int __init xlp_find_pci_dev(void)
{
	uint16_t i, j, base_id, id, num_devices, maxdevice=0;
	int idx;
	uint64_t mmio;
	uint32_t val, devid, irt, irq;
	struct platform_device* pplatdev;
	struct resource pres[2] = { {0} };
	int total=num_possible_nodes();

	for(i=0; i<total; i++) {
		j=node_online(i);
		if(!j)     continue; 
		maxdevice += XLP_MAX_DEVICE;
	}	

	printk(KERN_DEBUG "XLP platform devices:\n");

	for (i=0; i<maxdevice; i++) {

		for (j=0; j<XLP_MAX_FUNC; j++) {

			mmio = nlm_hal_get_dev_base(0, 0, i, j);
			val  = nlm_hal_read_32bit_reg(mmio, 0);

			if(val == 0xFFFFFFFF)
				continue;		// No PCI device

			devid = (val & 0xFFFF0000) >> 16;
//			printk("PCI-e Device ID 0x%04X found at bus 0, device %d, function %d\n", devid, i, j);

			idx = get_dev2drv(devid);
			if(idx < 0)
				continue;		// Not found in table

			/* Register NAND only for other nodes.
			 * Remove if condition when other devices are supported on other nodes as well.
			 * */
			if(!((i>8 && (devid == XLP_DEVID_NAND) ) || (i<8)))
				continue;

			num_devices = 1;

			/* Handle PCI-e devices with multiple platform devices */
			if (devid == XLP2XX_DEVID_I2C) {
				if (is_nlm_xlp108() || is_nlm_xlp104() || is_nlm_xlp101())
					num_devices = 2;
				else
					num_devices = 4;
			}

			while(num_devices--) {		// Handle multiple IDs per PCI device

				base_id = dev2drv_table[idx].id++;
				id = base_id;

				/* Funny UART exception */
				if (devid == XLP_DEVID_UART)
					id += PLAT8250_DEV_PLATFORM;

				pplatdev = platform_device_alloc((const char*)dev2drv_table[idx].drvname, id);
				if (!pplatdev) {
					printk(KERN_WARNING "platform_device_alloc failed\n");
					continue;
				}

				if(devid == XLP_DEVID_UART) {
					pplatdev->dev.platform_data = &xlp_uart_port[base_id];
					xlp_init_uart(base_id);
				}


				irt = (nlm_hal_read_32bit_reg(mmio, DEV_IRT_INFO) & 0xFFFF);
				irq = xlp_irt_to_irq(0, irt);
				pres[0].start = irq;
				pres[0].end   = irq;
				pres[0].flags = IORESOURCE_IRQ;

				/* XLP2xx I2C devices share I/O memory - so let the platform driver manage
				 * it instead of each platform device (I2C bus).
				 */
				if(devid == XLP2XX_DEVID_I2C) {

					printk(KERN_DEBUG "%12s.%d (PCIe B/D/F = 0/0x%02X/%d), IRQ = %3d\n",
							dev2drv_table[idx].drvname, base_id, devid, j, irq);

					platform_device_add_resources(pplatdev, pres, 1);
				} else {
					pres[1].start = mmio;
					pres[1].end   = mmio + 0xFFF;
					pres[1].flags = IORESOURCE_MEM;

					printk(KERN_DEBUG "%12s.%d (PCIe B/D/F = 0/0x%02X/%d), IRQ = %3d, "
							"mem = 0x%llX-0x%llX,\n",
							dev2drv_table[idx].drvname, base_id, devid, j, irq,
							mmio, mmio + 0xFFF);

					platform_device_add_resources(pplatdev, pres, 2);
				}
				if (devid == XLP_DEVID_MMC){
					mmc_pplat_dev = pplatdev;
				}
				pplatdev->dev.dma_mask = &xlp_dev_dmamask;
				pplatdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
				platform_device_add(pplatdev);
			}
		}
	}

	return 0;
}