static int msenc_dma_pa_to_internal_256b(struct platform_device *dev,
u32 offset, u32 internal_offset, bool imem)
{
u32 cmd = msenc_dmatrfcmd_size_256b_f();
u32 pa_offset = msenc_dmatrffboffs_offs_f(offset);
u32 i_offset = msenc_dmatrfmoffs_offs_f(internal_offset);
u32 timeout = 0; /* default*/
if (imem)
cmd |= msenc_dmatrfcmd_imem_true_f();
nvhost_device_writel(dev, msenc_dmatrfmoffs_r(), i_offset);
nvhost_device_writel(dev, msenc_dmatrffboffs_r(), pa_offset);
nvhost_device_writel(dev, msenc_dmatrfcmd_r(), cmd);
return msenc_dma_wait_idle(dev, &timeout);
}
int msenc_boot(struct platform_device *dev)
{
u32 timeout;
u32 offset;
int err = 0;
struct msenc *m = get_msenc(dev);
/* check if firmware is loaded or not */
if (!m || !m->valid)
return -ENOMEDIUM;
nvhost_device_writel(dev, msenc_dmactl_r(), 0);
nvhost_device_writel(dev, msenc_dmatrfbase_r(),
(sg_dma_address(m->pa->sgl) + m->os.bin_data_offset) >> 8);
for (offset = 0; offset < m->os.data_size; offset += 256)
msenc_dma_pa_to_internal_256b(dev,
m->os.data_offset + offset,
offset, false);
msenc_dma_pa_to_internal_256b(dev, m->os.code_offset, 0, true);
/* setup msenc interrupts and enable interface */
nvhost_device_writel(dev, msenc_irqmset_r(),
(msenc_irqmset_ext_f(0xff) |
msenc_irqmset_swgen1_set_f() |
msenc_irqmset_swgen0_set_f() |
msenc_irqmset_exterr_set_f() |
msenc_irqmset_halt_set_f() |
msenc_irqmset_wdtmr_set_f()));
nvhost_device_writel(dev, msenc_irqdest_r(),
(msenc_irqdest_host_ext_f(0xff) |
msenc_irqdest_host_swgen1_host_f() |
msenc_irqdest_host_swgen0_host_f() |
msenc_irqdest_host_exterr_host_f() |
msenc_irqdest_host_halt_host_f()));
nvhost_device_writel(dev, msenc_itfen_r(),
(msenc_itfen_mthden_enable_f() |
msenc_itfen_ctxen_enable_f()));
/* boot msenc */
nvhost_device_writel(dev, msenc_bootvec_r(), msenc_bootvec_vec_f(0));
nvhost_device_writel(dev, msenc_cpuctl_r(),
msenc_cpuctl_startcpu_true_f());
timeout = 0; /* default */
err = msenc_wait_idle(dev, &timeout);
if (err != 0) {
dev_err(&dev->dev, "boot failed due to timeout");
return err;
}
return 0;
}
