int board_late_init(void)
{
int ret;
omap_nand_switch_ecc(1, 8);
#ifdef CONFIG_FACTORYSET
if (factory_dat.asn[0] != 0) {
char tmp[2 * MAX_STRING_LENGTH + 2];
if (strncmp((const char *)factory_dat.asn, "PXM50", 5) == 0)
factory_dat.pxm50 = 1;
else
factory_dat.pxm50 = 0;
sprintf(tmp, "%s_%s", factory_dat.asn,
factory_dat.comp_version);
ret = setenv("boardid", tmp);
if (ret)
printf("error setting board id\n");
} else {
factory_dat.pxm50 = 1;
ret = setenv("boardid", "PXM50_1.0");
if (ret)
printf("error setting board id\n");
}
debug("PXM50: %d\n", factory_dat.pxm50);
#endif
return 0;
}
/******************************************************************************
* OMAP3 specific command to switch between NAND HW and SW ecc
*****************************************************************************/
static int do_switch_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
if (argc != 2)
goto usage;
if (strncmp(argv[1], "hw", 2) == 0)
omap_nand_switch_ecc(1);
else if (strncmp(argv[1], "sw", 2) == 0)
omap_nand_switch_ecc(0);
else
goto usage;
return 0;
usage:
printf ("Usage: nandecc %s\n", cmdtp->usage);
return 1;
}
int board_late_init(void)
{
int ret;
char tmp[2 * MAX_STRING_LENGTH + 2];
omap_nand_switch_ecc(1, 8);
if (factory_dat.asn[0] != 0)
sprintf(tmp, "%s_%s", factory_dat.asn,
factory_dat.comp_version);
else
strcpy(tmp, "QMX7.E38_4.0");
ret = env_set("boardid", tmp);
if (ret)
printf("error setting board id\n");
return 0;
}
int board_late_init(void)
{
omap_nand_switch_ecc(1, 8);
return 0;
}
static void board_init_ddr(void)
{
struct emif_regs draco_ddr3_emif_reg_data = {
.zq_config = 0x50074BE4,
};
struct ddr_data draco_ddr3_data = {
};
struct cmd_control draco_ddr3_cmd_ctrl_data = {
};
struct ctrl_ioregs draco_ddr3_ioregs = {
};
/* pass values from eeprom */
draco_ddr3_emif_reg_data.sdram_tim1 = settings.ddr3.sdram_tim1;
draco_ddr3_emif_reg_data.sdram_tim2 = settings.ddr3.sdram_tim2;
draco_ddr3_emif_reg_data.sdram_tim3 = settings.ddr3.sdram_tim3;
draco_ddr3_emif_reg_data.emif_ddr_phy_ctlr_1 =
settings.ddr3.emif_ddr_phy_ctlr_1;
draco_ddr3_emif_reg_data.sdram_config = settings.ddr3.sdram_config;
draco_ddr3_emif_reg_data.ref_ctrl = settings.ddr3.ref_ctrl;
draco_ddr3_data.datardsratio0 = settings.ddr3.dt0rdsratio0;
draco_ddr3_data.datawdsratio0 = settings.ddr3.dt0wdsratio0;
draco_ddr3_data.datafwsratio0 = settings.ddr3.dt0fwsratio0;
draco_ddr3_data.datawrsratio0 = settings.ddr3.dt0wrsratio0;
draco_ddr3_cmd_ctrl_data.cmd0csratio = settings.ddr3.ddr3_sratio;
draco_ddr3_cmd_ctrl_data.cmd0iclkout = settings.ddr3.iclkout;
draco_ddr3_cmd_ctrl_data.cmd1csratio = settings.ddr3.ddr3_sratio;
draco_ddr3_cmd_ctrl_data.cmd1iclkout = settings.ddr3.iclkout;
draco_ddr3_cmd_ctrl_data.cmd2csratio = settings.ddr3.ddr3_sratio;
draco_ddr3_cmd_ctrl_data.cmd2iclkout = settings.ddr3.iclkout;
draco_ddr3_ioregs.cm0ioctl = settings.ddr3.ioctr_val,
draco_ddr3_ioregs.cm1ioctl = settings.ddr3.ioctr_val,
draco_ddr3_ioregs.cm2ioctl = settings.ddr3.ioctr_val,
draco_ddr3_ioregs.dt0ioctl = settings.ddr3.ioctr_val,
draco_ddr3_ioregs.dt1ioctl = settings.ddr3.ioctr_val,
config_ddr(DDR_PLL_FREQ, &draco_ddr3_ioregs, &draco_ddr3_data,
&draco_ddr3_cmd_ctrl_data, &draco_ddr3_emif_reg_data, 0);
}
static void spl_siemens_board_init(void)
{
return;
}
#endif /* if def CONFIG_SPL_BUILD */
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
omap_nand_switch_ecc(1, 8);
#ifdef CONFIG_FACTORYSET
/* Set ASN in environment*/
if (factory_dat.asn[0] != 0) {
setenv("dtb_name", (char *)factory_dat.asn);
} else {
/* dtb suffix gets added in load script */
setenv("dtb_name", "am335x-draco");
}
#else
setenv("dtb_name", "am335x-draco");
#endif
return 0;
}
