void load_i()
{
stgwrite("\tload.i\n");
code_idx+=opcodes(1);
}
void move_alt(void)
{
stgwrite("\tmove.alt\n");
code_idx+=opcodes(1)+opargs(0);
}
/*
* nop
*/
SC_FUNC void nooperation(void)
{
stgwrite("\tnop\n");
code_idx+=opcodes(1);
}
/*
* two's complement primary register
*/
SC_FUNC void neg(void)
{
stgwrite("\tneg\n");
code_idx+=opcodes(1);
}
/*
* test ALT<PRI (signed)
*/
SC_FUNC void os_lt(void)
{
stgwrite("\txchg\n");
stgwrite("\tsless\n");
code_idx+=opcodes(2);
}
/*
* test ALT!=PRI
*/
SC_FUNC void ob_ne(void)
{
stgwrite("\tneq\n");
code_idx+=opcodes(1);
}
/*
* "exclusive or" of primary and alternate registers (result in primary)
*/
SC_FUNC void ob_xor(void)
{
stgwrite("\txor\n");
code_idx+=opcodes(1);
}
/*
* arithmic shift left alternate register the number of bits
* given in the primary register (result in primary).
* There is no need for a "logical shift left" routine, since
* logical shift left is identical to arithmic shift left.
*/
SC_FUNC void ob_sal(void)
{
stgwrite("\txchg\n");
stgwrite("\tshl\n");
code_idx+=opcodes(2);
}
/*
* swap the top-of-stack with the value in primary register
*/
SC_FUNC void swap1(void)
{
stgwrite("\tswap.pri\n");
code_idx+=opcodes(1);
}
/*
* Push a constant value onto the stack
*/
SC_FUNC void pushval(cell val)
{
stgwrite("\tpush.c ");
outval(val, TRUE);
code_idx+=opcodes(1)+opargs(1);
}
/* Copy value in alternate register to the primary register */
SC_FUNC void moveto1(void)
{
stgwrite("\tmove.pri\n");
code_idx+=opcodes(1)+opargs(0);
}
/* dereference
*
* Get a cell from a memory address stored in the primary register
*/
SC_FUNC void dereference(void)
{
stgwrite("\tload.i\n");
code_idx+=opcodes(1);
}
/* When a subroutine returns to address 0, the AMX must halt. In earlier
* releases, the RET and RETN opcodes checked for the special case 0 address.
* Today, the compiler simply generates a HALT instruction at address 0. So
* a subroutine can savely return to 0, and then encounter a HALT.
*/
SC_FUNC void writeleader(symbol *root)
{
int lbl_nostate,lbl_table;
int statecount;
symbol *sym;
constvalue *fsa, *state, *stlist;
int fsa_id,listid;
char lbl_default[sNAMEMAX+1];
assert(code_idx==0);
begcseg();
stgwrite(";program exit point\n");
stgwrite("\thalt 0\n\n");
code_idx+=opcodes(1)+opargs(1); /* calculate code length */
/* check whether there are any functions that have states */
for (sym=root->next; sym!=NULL; sym=sym->next)
if (sym->ident==iFUNCTN && (sym->usage & (uPUBLIC | uREAD))!=0 && sym->states!=NULL)
break;
if (sym==NULL)
return; /* no function has states, nothing to do next */
/* generate an error function that is called for an undefined state */
stgwrite("\n;exit point for functions called from the wrong state\n");
lbl_nostate=getlabel();
setlabel(lbl_nostate);
stgwrite("\thalt ");
outval(AMX_ERR_INVSTATE,TRUE);
code_idx+=opcodes(1)+opargs(1); /* calculate code length */
/* write the "state-selectors" table with all automatons (update the
* automatons structure too, as we are now assigning the address to
* each automaton state-selector variable)
*/
assert(glb_declared==0);
begdseg();
for (fsa=sc_automaton_tab.next; fsa!=NULL; fsa=fsa->next) {
defstorage();
stgwrite("0\t; automaton ");
if (strlen(fsa->name)==0)
stgwrite("(anonymous)");
else
stgwrite(fsa->name);
stgwrite("\n");
fsa->value=glb_declared*sizeof(cell);
glb_declared++;
} /* for */
/* write stubs and jump tables for all state functions */
begcseg();
for (sym=root->next; sym!=NULL; sym=sym->next) {
if (sym->ident==iFUNCTN && (sym->usage & (uPUBLIC | uREAD))!=0 && sym->states!=NULL) {
stlist=sym->states->next;
assert(stlist!=NULL); /* there should be at least one state item */
listid=stlist->index;
assert(listid==-1 || listid>0);
if (listid==-1 && stlist->next!=NULL) {
/* first index is the "fallback", take the next one (if available) */
stlist=stlist->next;
listid=stlist->index;
} /* if */
if (listid==-1) {
/* first index is the fallback, there is no second... */
strcpy(stlist->name,"0"); /* insert dummy label number */
/* this is an error, but we postpone adding the error message until the
* function definition
*/
continue;
} /* if */
/* generate label numbers for all statelist ids */
for (stlist=sym->states->next; stlist!=NULL; stlist=stlist->next) {
assert(strlen(stlist->name)==0);
strcpy(stlist->name,itoh(getlabel()));
} /* for */
if (strcmp(sym->name,uENTRYFUNC)==0)
continue; /* do not generate stubs for this special function */
sym->addr=code_idx; /* fix the function address now */
/* get automaton id for this function */
assert(listid>0);
fsa_id=state_getfsa(listid);
assert(fsa_id>=0); /* automaton 0 exists */
fsa=automaton_findid(fsa_id);
/* count the number of states actually used; at the sane time, check
* whether there is a default state function
*/
statecount=0;
strcpy(lbl_default,itoh(lbl_nostate));
for (stlist=sym->states->next; stlist!=NULL; stlist=stlist->next) {
if (stlist->index==-1) {
assert(strlen(stlist->name)<sizeof lbl_default);
strcpy(lbl_default,stlist->name);
} else {
statecount+=state_count(stlist->index);
} /* if */
} /* for */
/* generate a stub entry for the functions */
stgwrite("\tload.pri ");
outval(fsa->value,FALSE);
stgwrite("\t; ");
stgwrite(sym->name);
stgwrite("\n");
code_idx+=opcodes(1)+opargs(1); /* calculate code length */
lbl_table=getlabel();
ffswitch(lbl_table);
/* generate the jump table */
setlabel(lbl_table);
ffcase(statecount,lbl_default,TRUE);
for (state=sc_state_tab.next; state!=NULL; state=state->next) {
if (state->index==fsa_id) {
/* find the label for this list id */
for (stlist=sym->states->next; stlist!=NULL; stlist=stlist->next) {
if (stlist->index!=-1 && state_inlist(stlist->index,(int)state->value)) {
ffcase(state->value,stlist->name,FALSE);
break;
} /* if */
} /* for */
if (stlist==NULL && strtol(lbl_default,NULL,16)==lbl_nostate)
error(230,state->name,sym->name); /* unimplemented state, no fallback */
} /* if (state belongs to automaton of function) */
} /* for (state) */
stgwrite("\n");
} /* if (is function, used & having states) */
} /* for (sym) */
}
SC_FUNC void modheap_i()
{
stgwrite("\ttracker.pop.setheap\n");
code_idx+=opcodes(1);
}
SC_FUNC void stradjust(regid reg)
{
assert(reg==sPRI);
stgwrite("\tstradjust.pri\n");
code_idx+=opcodes(1);
}
/*
* modulus of (alternate % primary), result in primary (signed)
*/
SC_FUNC void os_mod(void)
{
stgwrite("\tsdiv.alt\n");
stgwrite("\tmove.pri\n"); /* move ALT to PRI */
code_idx+=opcodes(2);
}
/*
* subtract primary register from alternate register (result in primary)
*/
SC_FUNC void ob_sub(void)
{
stgwrite("\tsub.alt\n");
code_idx+=opcodes(1);
}
/* Switch statements
* The "switch" statement generates a "case" table using the "CASE" opcode.
* The case table contains a list of records, each record holds a comparison
* value and a label to branch to on a match. The very first record is an
* exception: it holds the size of the table (excluding the first record) and
* the label to branch to when none of the values in the case table match.
* The case table is sorted on the comparison value. This allows more advanced
* abstract machines to sift the case table with a binary search.
*/
SC_FUNC void ffswitch(int label)
{
stgwrite("\tswitch ");
outval(label,TRUE); /* the label is the address of the case table */
code_idx+=opcodes(1)+opargs(1);
}
/*
* logical (unsigned) shift right of the alternate register by the
* number of bits given in the primary register (result in primary).
*/
SC_FUNC void ou_sar(void)
{
stgwrite("\txchg\n");
stgwrite("\tshr\n");
code_idx+=opcodes(2);
}
SC_FUNC void ffabort(int reason)
{
stgwrite("\thalt ");
outval(reason,TRUE);
code_idx+=opcodes(1)+opargs(1);
}
/*
* "and" of primary and secundairy registers (result in primary)
*/
SC_FUNC void ob_and(void)
{
stgwrite("\tand\n");
code_idx+=opcodes(1);
}
/*
* Jump to local label number (the number is converted to a name)
*/
SC_FUNC void jumplabel(int number)
{
stgwrite("\tjump ");
outval(number,TRUE);
code_idx+=opcodes(1)+opargs(1);
}
/* Relational operator prefix for chained relational expressions. The
* "suffix" code restores the stack.
* For chained relational operators, the goal is to keep the comparison
* result "so far" in PRI and the value of the most recent operand in
* ALT, ready for a next comparison.
* The "prefix" instruction pushed the comparison result (PRI) onto the
* stack and moves the value of ALT into PRI. If there is a next comparison,
* PRI can now serve as the "left" operand of the relational operator.
*/
SC_FUNC void relop_prefix(void)
{
stgwrite("\tpush.pri\n");
stgwrite("\tmove.pri\n");
code_idx+=opcodes(2);
}
SC_FUNC void getfrm(void)
{
stgwrite("\tlctrl 5\n");
code_idx+=opcodes(1)+opargs(1);
}
/*
* test ALT>=PRI (signed)
*/
SC_FUNC void os_ge(void)
{
stgwrite("\txchg\n");
stgwrite("\tsgeq\n");
code_idx+=opcodes(2);
}
/* Align PRI (which should hold a character index) to an address.
* The first character in a "pack" occupies the highest bits of
* the cell. This is at the lower memory address on Big Endian
* computers and on the higher address on Little Endian computers.
* The ALIGN.pri/alt instructions must solve this machine dependence;
* that is, on Big Endian computers, ALIGN.pri/alt shuold do nothing
* and on Little Endian computers they should toggle the address.
*/
SC_FUNC void charalign(void)
{
stgwrite("\talign.pri ");
outval(sCHARBITS/8,TRUE,TRUE);
code_idx+=opcodes(1)+opargs(1);
}
/*
* one's complement of primary register
*/
SC_FUNC void invert(void)
{
stgwrite("\tinvert\n");
code_idx+=opcodes(1);
}
/*
* signed multiply of primary and secundairy registers (result in primary)
*/
SC_FUNC void os_mult(void)
{
stgwrite("\tsmul\n");
code_idx+=opcodes(1);
}
/*
* Jumps to "label" if PRI != 0
*/
SC_FUNC void jmp_ne0(int number)
{
stgwrite("\tjnz ");
outval(number,TRUE,TRUE);
code_idx+=opcodes(1)+opargs(1);
}
/*
* signed divide of alternate register by primary register (quotient in
* primary; remainder in alternate)
*/
SC_FUNC void os_div(void)
{
stgwrite("\tsdiv.alt\n");
code_idx+=opcodes(1);
}
