/* mallocs the array of nf2device structs and
* populates them */
void open_interfaces(struct nf2device **nf2devices, int num_netfpgas) {
int i;
for (i=0; i<num_netfpgas; i++) {
/* allocate memory for struct */
nf2devices[i] = (struct nf2device *) malloc(sizeof(struct nf2device));
if (nf2devices[i] == NULL) {
fprintf(stderr, "Error: Do not have enough memory to open %u interfaces.\n", num_netfpgas);
close_interfaces(nf2devices, i);
exit(1);
}
/* allocate enough memory for "nf2cXX". Don't forget '\0' */
nf2devices[i]->device_name = (char *) malloc(7);
if (nf2devices[i] == NULL) {
fprintf(stderr, "Error: Do not have enough memory to open %u interfaces.\n", num_netfpgas);
free(nf2devices[i]);
close_interfaces(nf2devices, i);
exit(1);
}
/* copy interface name */
sprintf(nf2devices[i]->device_name, "%s%d", NF2C, i*4);
if (check_iface(nf2devices[i]) || openDescriptor(nf2devices[i])) {
fprintf(stderr, "Error: check_iface or openDescriptor %s\n", nf2devices[i]->device_name);
free(nf2devices[i]->device_name);
free(nf2devices[i]);
close_interfaces(nf2devices, i);
exit(1);
}
}
}
int main(int argc, char *argv[])
{
unsigned val;
for (val=0;val<8;val++) { lost[val] = 0; stored[val]=0; removed[val]=0; }
nf2.device_name = DEFAULT_IFACE;
if (check_iface(&nf2))
{
exit(1);
}
if (openDescriptor(&nf2))
{
exit(1);
}
w = initscr(); cbreak(); noecho();
show_stats();
closeDescriptor(&nf2);
endwin();
return 0;
}
/* Function declarations */
int main(int argc, char *argv[])
{
unsigned value;
nf2.device_name = DEFAULT_IFACE;
// Open the interface if possible
if (check_iface(&nf2))
{
exit(1);
}
if (openDescriptor(&nf2))
{
exit(1);
}
// FIXME: Perform the actual register read and print the value
readReg(&nf2, CRYPTO_KEY_REG, &value);
printf("Register Key is %x", value);
closeDescriptor(&nf2);
return 0;
}
int main(int argc, char *argv[])
{
nf2.device_name = DEFAULT_IFACE;
processArgs(argc, argv);
// Open the interface if possible
if (check_iface(&nf2))
{
exit(1);
}
if (openDescriptor(&nf2))
{
exit(1);
}
if(argc > 5){
printf("Numero de argumentos deve ser < 4\n");
argc=5;
}
for(int i=0; i< argc-1; i++){
pdrop[i] = atoi(argv[i+1]);
}
dumpCounts();
closeDescriptor(&nf2);
return 0;
}
void router_init( router_t* router ) {
#ifdef _CPUMODE_
init_registers(router);
router->nf.device_name = "nf10";
check_iface( &router->nf );
if( openDescriptor( &router->nf ) != 0 )
die( "Error: failed to connect to the hardware" );
else {
/* wait for the reset to complete */
struct timespec pause;
pause.tv_sec = 0;
pause.tv_nsec = 5000 * 1000; /* 5ms */
nanosleep( &pause, NULL );
}
#endif
router->num_interfaces = 1;
router->use_ospf = TRUE;
pthread_mutex_init( &router->intf_lock, NULL );
#ifndef _THREAD_PER_PACKET_
debug_println( "Initializing the router work queue with %u worker threads",
NUM_WORKER_THREADS );
wq_init( &router->work_queue, NUM_WORKER_THREADS, &router_handle_work );
#else
debug_println( "Router initialized (will use one thread per packet)" );
#endif
}
/* Function declarations */
int main(int argc, char *argv[])
{
unsigned value;
nf2.device_name = DEFAULT_IFACE;
// Open the interface if possible
if (check_iface(&nf2))
{
exit(1);
}
if (openDescriptor(&nf2))
{
exit(1);
}
// FIXME: Perform the actual register read and print the value
//readReg(&nf2, addr, &value);
//printf(...)
closeDescriptor(&nf2);
return 0;
}
int main(int argc, char *argv[])
{
unsigned val;
nf2.device_name = DEFAULT_IFACE;
processArgs(argc, argv);
// Open the interface if possible
if (check_iface(&nf2))
{
exit(1);
}
if (openDescriptor(&nf2))
{
exit(1);
}
// Increment the argument pointer
argc -= optind;
argv += optind;
// Read the registers
readRegisters(argc, argv);
closeDescriptor(&nf2);
return 0;
}
/*
Checks for commandline args, intializes globals, then begins code download.
*/
int main(int argc, char **argv) {
nf2.device_name = DEFAULT_IFACE;
processArgs(argc, argv);
if (check_iface(&nf2))
{
exit(1);
}
if (openDescriptor(&nf2))
{
exit(1);
}
if (strncmp(log_file_name, "stdout",6)) {
if ((log_file = fopen(log_file_name, "w")) == NULL) {
printf("Error: unable to open logfile %s for writing.\n",
log_file_name);
exit(1);
}
}
else
log_file = stdout;
InitGlobals();
BeginCodeDownload(bin_file_name);
if (!cpci_reprog)
ResetDevice();
/* reset the PHYs */
NF2_WR32(MDIO_0_CONTROL_REG, 0x8000);
NF2_WR32(MDIO_1_CONTROL_REG, 0x8000);
NF2_WR32(MDIO_2_CONTROL_REG, 0x8000);
NF2_WR32(MDIO_3_CONTROL_REG, 0x8000);
/* wait until the resets have been completed */
usleep(100);
if (intr_enable)
{
/* PHY interrupt mask off for link status change */
NF2_WR32(MDIO_0_INTERRUPT_MASK_REG, 0xfffd);
NF2_WR32(MDIO_1_INTERRUPT_MASK_REG, 0xfffd);
NF2_WR32(MDIO_2_INTERRUPT_MASK_REG, 0xfffd);
NF2_WR32(MDIO_3_INTERRUPT_MASK_REG, 0xfffd);
}
VerifyDevInfo();
fclose(log_file);
closeDescriptor(&nf2);
return SUCCESS;
}
void set_register(unsigned reg, unsigned val) {
struct nf2device nf2;
nf2.device_name = "nf2c0";
check_iface(&nf2);
openDescriptor(&nf2);
writeReg(&nf2, reg, val);
closeDescriptor(&nf2);
}
unsigned get_register(unsigned reg) {
struct nf2device nf2;
unsigned val;
nf2.device_name = "nf2c0";
check_iface(&nf2);
openDescriptor(&nf2);
readReg(&nf2, reg, &val);
closeDescriptor(&nf2);
return val;
}
void connectnf2() {
nf2.device_name = DEFAULT_IFACE;
check_iface( &nf2 );
if( openDescriptor( &nf2 ) != 0 ) {
printf( "Error: failed to connect to the hardware\n" );
exit(1);
}
/* wait for the reset to complete */
struct timespec pause;
pause.tv_sec = 0;
pause.tv_nsec = 5000 * 1000; /* 5ms */
nanosleep( &pause, NULL );
}
int main (int argc,char *argv[])
{
unsigned long q0_val, q1_val, q2_val, q3_val, ewma_val;
unsigned long q0_val_old, q1_val_old, q2_val_old, q3_val_old;
unsigned long b0, b1, b2, b3;
unsigned long overall;
pthread_t governor_thread;
struct struct_thread *param_thread = NULL;
/********* NF2 INITIALIZATION **********************/
nf2.device_name = DEFAULT_IFACE;
if (check_iface(&nf2))
{
exit(1);
}
if (openDescriptor(&nf2))
{
exit(1);
}
/********* END NF2 INITIALIZATION ******************/
param_thread = (struct struct_thread *)malloc(sizeof(struct struct_thread));
param_thread->nf2 = nf2;
param_thread->microseconds_to_sleep = MICROSECONDS_TO_SLEEP;
param_thread->reg_to_write = 0x0000050;
/**** POPULATE param_thread *****/
param_thread->th1 = 500000000.0 * 4;
param_thread->th2 = 0;
param_thread->th3 = 0;
param_thread->th4 = 0;
/**** END POPULATE param_thread *****/
if(pthread_create(&governor_thread,NULL,governor_function,param_thread)<0) {
printf("pthread_create error for thread 1\n");
exit(1);
}
// Call pthread_join if we want to wait for the termination of governor_thread. Else comment it
int retcode = pthread_join(governor_thread,NULL);
closeDescriptor(&nf2);
free(param_thread);
return 0;
}
int main(int argc, char *argv[])
{
unsigned val;
nf2.device_name = DEFAULT_IFACE;
if (check_iface(&nf2))
{
exit(1);
}
if (openDescriptor(&nf2))
{
exit(1);
}
print();
closeDescriptor(&nf2);
return 0;
}
int main(int argc, char *argv[])
{
nf2.device_name = DEFAULT_IFACE;
processArgs(argc, argv);
if (check_iface(&nf2))
{
exit(1);
}
if (openDescriptor(&nf2))
{
exit(1);
}
nf2_read_info(&nf2);
display_info(&nf2);
closeDescriptor(&nf2);
return 0;
}
int main(int argc, char *argv[])
{
unsigned val, log_depth;
int i;
nf2.device_name = DEFAULT_IFACE;
if (check_iface(&nf2))
{
exit(1);
}
if (openDescriptor(&nf2))
{
exit(1);
}
// Read the status register
readReg(&nf2, PHY_TEST_PHY_0_RX_LOG_STATUS_REG, &val);
if (!(val & 0x1))
printf("No data in the log\n");
else {
log_depth = (val & 0xffffff00) >> 8;
// Read the expected data register
printf("Expected data:\n");
for (i = 0; i < log_depth; i++) {
readReg(&nf2, PHY_TEST_PHY_0_RX_LOG_EXP_DATA_REG, &val);
if (i % 4 == 0)
printf("%08x:", i * 4);
printf(" %02x %02x %02x %02x",
(val >> 24) & 0xff,
(val >> 16) & 0xff,
(val >> 8) & 0xff,
(val) & 0xff);
if (i % 4 == 3)
printf("\n");
}
printf("\n");
printf("\n");
// Read the rx data register
printf("Received data:\n");
for (i = 0; i < log_depth; i++) {
readReg(&nf2, PHY_TEST_PHY_0_RX_LOG_RX_DATA_REG, &val);
if (i % 4 == 0)
printf("%08x:", i * 4);
printf(" %02x %02x %02x %02x",
(val >> 24) & 0xff,
(val >> 16) & 0xff,
(val >> 8) & 0xff,
(val) & 0xff);
if (i % 4 == 3)
printf("\n");
}
printf("\n");
printf("\n");
// Clear the log
writeReg(&nf2, PHY_TEST_PHY_0_RX_LOG_CTRL_REG, 1);
}
/*for (j = 0; j < 250; j++) {
readReg(&nf2, NF2_REG_TEST_BASE + j * 4, &val);
printf("Read value %x in address %d\n", val, j*4);
}*/
}
void init(struct sr_instance* sr)
{
unsigned int iseed = (unsigned int)time(NULL);
srand(iseed+1);
router_state* rs = (router_state*)malloc(sizeof(router_state));//router_state，一个结构体，在or_data_types.h定义
assert(rs);
bzero(rs, sizeof(router_state));
rs->sr = sr;
#ifdef _CPUMODE_
init_rawsockets(rs);
#endif
/** INITIALIZE LOCKS **/
rs->write_lock = (pthread_mutex_t*)malloc(sizeof(pthread_mutex_t));
if (pthread_mutex_init(rs->write_lock, NULL) != 0) {
perror("Lock init error");
exit(1);
}
rs->arp_cache_lock = (pthread_rwlock_t*)malloc(sizeof(pthread_rwlock_t));
if (pthread_rwlock_init(rs->arp_cache_lock, NULL) != 0) {
perror("Lock init error");
exit(1);
}
rs->arp_queue_lock = (pthread_rwlock_t*)malloc(sizeof(pthread_rwlock_t));
if (pthread_rwlock_init(rs->arp_queue_lock, NULL) != 0) {
perror("Lock init error");
exit(1);
}
rs->if_list_lock = (pthread_rwlock_t*)malloc(sizeof(pthread_rwlock_t));
if (pthread_rwlock_init(rs->if_list_lock, NULL) != 0) {
perror("Lock init error");
exit(1);
}
rs->rtable_lock = (pthread_rwlock_t*)malloc(sizeof(pthread_rwlock_t));
if (pthread_rwlock_init(rs->rtable_lock, NULL) != 0) {
perror("Lock init error");
exit(1);
}
// --- CCDN lock
rs->ctable_lock = (pthread_rwlock_t*)malloc(sizeof(pthread_rwlock_t));
if (pthread_rwlock_init(rs->ctable_lock, NULL) != 0) {
perror("Lock init error");
exit(1);
}
rs->cli_commands_lock = (pthread_rwlock_t*)malloc(sizeof(pthread_rwlock_t));
if (pthread_rwlock_init(rs->cli_commands_lock, NULL) != 0) {
perror("Lock init error");
exit(1);
}
rs->nat_table_mutex = (pthread_mutex_t*)malloc(sizeof(pthread_mutex_t));
if (pthread_mutex_init(rs->nat_table_mutex, NULL) != 0) {
perror("Mutex init error");
exit(1);
}
rs->nat_table_cond = (pthread_cond_t*)malloc(sizeof(pthread_cond_t));
if (pthread_cond_init(rs->nat_table_cond, NULL) != 0) {
perror("Nat Table cond init error");
exit(1);
}
rs->local_ip_filter_list_mutex = (pthread_mutex_t*)malloc(sizeof(pthread_mutex_t));
if (pthread_mutex_init(rs->local_ip_filter_list_mutex, NULL) != 0) {
perror("Local IP Filter Mutex init error");
exit(1);
}
rs->log_dumper_mutex = (pthread_mutex_t*)malloc(sizeof(pthread_mutex_t));
if (pthread_mutex_init(rs->log_dumper_mutex, NULL) != 0) {
perror("Log dumper mutex init error");
exit(1);
}
rs->sr = sr;
rs->area_id = PWOSPF_AREA_ID;
rs->pwospf_hello_interval = PWOSPF_NEIGHBOR_TIMEOUT;
rs->pwospf_lsu_interval = PWOSPF_LSUINT;
rs->pwospf_lsu_broadcast = 1;
rs->arp_ttl = INITIAL_ARP_TIMEOUT;
rs->nat_timeout = 120;
/* clear stats */
int i, j;
for (i = 0; i < 8; ++i) {
for (j = 0; j < 4; ++j) {
rs->stats_last[i][j] = 0;
}
for (j = 0; j < 2; ++j) {
rs->stats_avg[i][j] = 0.0;
}
}
rs->stats_last_time.tv_sec = 0;
rs->stats_last_time.tv_usec = 0;
#ifdef _CPUMODE_
rs->is_netfpga = 1;
char* name = (char*)calloc(1, 32);
strncpy(name, sr->interface, 32);
rs->netfpga.device_name = name;
rs->netfpga.fd = 0;
rs->netfpga.net_iface = 0;
if (check_iface(&(rs->netfpga))) {
printf("Failure connecting to NETFPGA\n");
exit(1);
}
if (openDescriptor(&(rs->netfpga))) {
printf("Failure connecting to NETFPGA\n");
exit(1);
}
/* initialize the hardware */
init_hardware(rs);
#else
rs->is_netfpga = 0;
#endif
if (rs->is_netfpga) {
/* Add 224.0.0.5 as a local IP Filter */
struct in_addr ip;
inet_pton(AF_INET, "224.0.0.5", &ip);
add_local_ip_filter(rs, &ip, "pwospf");
}
/* Initialize SPING data */
rs->sping_mutex = (pthread_mutex_t*)malloc(sizeof(pthread_mutex_t));
if (pthread_mutex_init(rs->sping_mutex, NULL) != 0) {
perror("Sping mutex init error");
exit(1);
}
rs->sping_cond = (pthread_cond_t*)malloc(sizeof(pthread_cond_t));
if (pthread_cond_init(rs->sping_cond, NULL) != 0) {
perror("Sping cond init error");
exit(1);
}
/* Initialize LSU data */
rs->pwospf_router_list_lock = (pthread_mutex_t*)malloc(sizeof(pthread_mutex_t));
if (pthread_mutex_init(rs->pwospf_router_list_lock, NULL) != 0) {
perror("Routing list mutex init error");
exit(1);
}
rs->pwospf_lsu_bcast_mutex = (pthread_mutex_t*)malloc(sizeof(pthread_mutex_t));
if (pthread_mutex_init(rs->pwospf_lsu_bcast_mutex, NULL) != 0) {
perror("LSU bcast mutex init error");
exit(1);
}
rs->pwospf_lsu_bcast_cond = (pthread_cond_t*)malloc(sizeof(pthread_cond_t));
if (pthread_cond_init(rs->pwospf_lsu_bcast_cond, NULL) != 0) {
perror("LSU bcast cond init error");
exit(1);
}
rs->pwospf_lsu_queue_lock = (pthread_mutex_t*)malloc(sizeof(pthread_mutex_t));
if (pthread_mutex_init(rs->pwospf_lsu_queue_lock, NULL) != 0) {
perror("Lsu queue mutex init error");
exit(1);
}
/* Initialize PWOSPF Dijkstra Thread Mutex/Cond Var */
rs->dijkstra_mutex = (pthread_mutex_t*)malloc(sizeof(pthread_mutex_t));
if (pthread_mutex_init(rs->dijkstra_mutex, NULL) != 0) {
perror("Dijkstra mutex init error");
exit(1);
}
rs->dijkstra_cond = (pthread_cond_t*)malloc(sizeof(pthread_cond_t));
if (pthread_cond_init(rs->dijkstra_cond, NULL) != 0) {
perror("Dijkstra cond init error");
exit(1);
}
/* Initialize WWW Mutex/Cond Var */
rs->www_mutex = (pthread_mutex_t*)malloc(sizeof(pthread_mutex_t));
if (pthread_mutex_init(rs->www_mutex, NULL) != 0) {
perror("WWW mutex init error");
exit(1);
}
rs->www_cond = (pthread_cond_t*)malloc(sizeof(pthread_cond_t));
if (pthread_cond_init(rs->www_cond, NULL) != 0) {
perror("WWW cond init error");
exit(1);
}
/* Initialize Stats Mutex */
rs->stats_mutex = (pthread_mutex_t*)malloc(sizeof(pthread_mutex_t));
if (pthread_mutex_init(rs->stats_mutex, NULL) != 0) {
perror("Stats mutex init error");
exit(1);
}
// --- CCDN , sr里面有一个指针是sr->interface_subsystem = rs，而main函数的最前面，rs->sr=sr
sr_set_subsystem(sr, (void*)rs);
// --- CCDN , pthread_create用于创建一个线程，第一个参数返回线程id，第二个设置线程属性（NULL表默认），第三个指向线程调用的函数，第四个传递参数
/** SPAWN THE ARP QUEUE THREAD **/
rs->arp_thread = (pthread_t*)malloc(sizeof(pthread_t));
if(pthread_create(rs->arp_thread, NULL, arp_thread, (void *)sr) != 0) {
perror("Thread create error");
}
/** SPAWN THE PWOSPF HELLO BROADCAST THREAD **/
rs->pwospf_hello_thread = (pthread_t*)malloc(sizeof(pthread_t));
if(pthread_create(rs->pwospf_hello_thread, NULL, pwospf_hello_thread, (void *)sr) != 0) {
perror("Thread create error");
}
/** SPAWN THE PWOSPF LSU BROADCAST THREAD **/
rs->pwospf_lsu_thread = (pthread_t*)malloc(sizeof(pthread_t));
if(pthread_create(rs->pwospf_lsu_thread, NULL, pwospf_lsu_thread, (void *)sr) != 0) {
perror("Thread create error");
}
/** SPAWN THE PWOSPF LSU BCAST TIMEOUT THREAD **/
rs->pwospf_lsu_timeout_thread = (pthread_t*)malloc(sizeof(pthread_t));
if(pthread_create(rs->pwospf_lsu_timeout_thread, NULL, pwospf_lsu_timeout_thread, (void*)sr) != 0) {
perror("Thread create error");
}
/** SPAWN THE DIJKSTRA THREAD **/
rs->pwospf_dijkstra_thread = (pthread_t*)malloc(sizeof(pthread_t));
if(pthread_create(rs->pwospf_dijkstra_thread, NULL, dijkstra_thread, (void*)get_router_state(sr)) != 0) {
perror("Thread create error");
}
/** SPAWN THE PWOSPF LSU BCAST THREAD **/
rs->pwospf_lsu_bcast_thread = (pthread_t*)malloc(sizeof(pthread_t));
if(pthread_create(rs->pwospf_lsu_bcast_thread, NULL, pwospf_lsu_bcast_thread, (void*)sr) != 0) {
perror("Thread create error");
}
/** Spawn the NAT Maintenance Thread **/
/*
rs->nat_maintenance_thread = (pthread_t*)malloc(sizeof(pthread_t));
if(pthread_create(rs->nat_maintenance_thread, NULL, nat_maintenance_thread, (void*)rs) != 0) {
perror("Thread create error");
}
*/
/* if we are on the NETFPGA spawn the stats thread */
if (rs->is_netfpga) {
rs->stats_thread = (pthread_t*)malloc(sizeof(pthread_t));
if(pthread_create(rs->stats_thread, NULL, netfpga_stats, (void*)rs) != 0) {
perror("Thread create error");
}
}
}
int main(int argc, char *argv[])
{
nf2.device_name = DEFAULT_IFACE;
/* Default */
sprintf(ip,"127.0.0.1");
porta = 7777;
processArgs(argc, argv);
// Open the interface if possible
if (check_iface(&nf2))
{
exit(1);
}
if (openDescriptor(&nf2))
{
exit(1);
}
/* SOCKET */
int fd;
if((fd = socket(AF_INET,SOCK_DGRAM,0)) < 0) {
printf("ERROR! socket\n");
goto exit_thread;
}
/* THREAD - dumpCount() */
int rc;
pthread_t thread;
rc = pthread_create(&thread,NULL,dumpCounts,NULL);
if(rc) {
printf("ERROR! Return code from pthread_create is %d\n", rc);
goto exit_no_thread;
}
bzero((void*)&servidor, sizeof(servidor));
servidor.sin_family = AF_INET;
inet_pton(AF_INET,ip,(void*)&(servidor.sin_addr.s_addr));
servidor.sin_port = htons(porta);
int rb;
if((rb = bind(fd, (struct sockaddr *)&servidor, sizeof(servidor))) < 0) {
printf("ERROR! bind\n");
goto exit_thread;
}
printf("listener: waiting to recvfrom\n");
char buf[MAXBUFLEN];
int numbytes;
struct sockaddr_storage their_addr;
socklen_t addr_len;
while(1) {
if((numbytes = recvfrom(fd, buf, MAXBUFLEN-1, 0,
(struct sockaddr *)&their_addr, &addr_len)) == -1) {
printf("ERROR! recvfrom\n");
goto exit_thread;
}
buf[numbytes] = '\0';
printf("DADOS DO PACOTE: \n%s\n\n",buf);
}
exit_thread:
pthread_exit(NULL);
exit_no_thread:
closeDescriptor(&nf2);
close(fd);
return 0;
}
/*
Checks for commandline args, intializes globals, then begins code download.
*/
int download_very_fast(int frequency) {
nf2.device_name = DEFAULT_IFACE;
struct in_addr ip[32], mask[32], gw[32], gw_arp[32], ip_filter[32];
unsigned int mac_hi[32];
unsigned int mac_lo[32];
unsigned int mac0_hi,mac0_lo;
unsigned int mac1_hi,mac1_lo;
unsigned int mac2_hi,mac2_lo;
unsigned int mac3_hi,mac3_lo;
/*if(argc<2) {
printf("run <command> <0/1> (0 down; 1 up)\n");
exit(1);
}*/
freq = frequency;
if(freq!=0 && freq!=1) {
printf("argument must be either 0 or 1!!!\n");
exit(1);
}
if (check_iface(&nf2))
{
exit(1);
}
if (openDescriptor(&nf2))
{
exit(1);
}
int i;
char iface;
unsigned int port[32];
readReg(&nf2,ROUTER_OP_LUT_MAC_0_HI_REG,&mac0_hi);
readReg(&nf2,ROUTER_OP_LUT_MAC_1_HI_REG,&mac1_hi);
readReg(&nf2,ROUTER_OP_LUT_MAC_2_HI_REG,&mac2_hi);
readReg(&nf2,ROUTER_OP_LUT_MAC_3_HI_REG,&mac3_hi);
readReg(&nf2,ROUTER_OP_LUT_MAC_0_LO_REG,&mac0_lo);
readReg(&nf2,ROUTER_OP_LUT_MAC_1_LO_REG,&mac1_lo);
readReg(&nf2,ROUTER_OP_LUT_MAC_2_LO_REG,&mac2_lo);
readReg(&nf2,ROUTER_OP_LUT_MAC_3_LO_REG,&mac3_lo);
for(i=0; i<32;i++) {
bzero(&ip_filter[i], sizeof(struct in_addr));
writeReg(&nf2, ROUTER_OP_LUT_DST_IP_FILTER_TABLE_RD_ADDR_REG, i);
readReg(&nf2, ROUTER_OP_LUT_DST_IP_FILTER_TABLE_ENTRY_IP_REG, &ip_filter[i].s_addr);
bzero(&gw_arp[i], sizeof(struct in_addr));
/* write the row number */
writeReg(&nf2, ROUTER_OP_LUT_ARP_TABLE_RD_ADDR_REG, i);
/* read the four-touple (mac hi, mac lo, gw, num of misses) */
readReg(&nf2, ROUTER_OP_LUT_ARP_TABLE_ENTRY_MAC_HI_REG, &mac_hi[i]);
readReg(&nf2, ROUTER_OP_LUT_ARP_TABLE_ENTRY_MAC_LO_REG, &mac_lo[i]);
readReg(&nf2, ROUTER_OP_LUT_ARP_TABLE_ENTRY_NEXT_HOP_IP_REG, &gw_arp[i].s_addr);
bzero(&ip[i], sizeof(struct in_addr));
bzero(&mask[i], sizeof(struct in_addr));
bzero(&gw[i], sizeof(struct in_addr));
/* write the row number */
writeReg(&nf2, ROUTER_OP_LUT_ROUTE_TABLE_RD_ADDR_REG, i);
/* read the four-tuple (ip, gw, mask, iface) from the hw registers */
readReg(&nf2, ROUTER_OP_LUT_ROUTE_TABLE_ENTRY_IP_REG, &ip[i].s_addr);
readReg(&nf2, ROUTER_OP_LUT_ROUTE_TABLE_ENTRY_MASK_REG, &mask[i].s_addr);
readReg(&nf2, ROUTER_OP_LUT_ROUTE_TABLE_ENTRY_NEXT_HOP_IP_REG, &gw[i].s_addr);
readReg(&nf2, ROUTER_OP_LUT_ROUTE_TABLE_ENTRY_OUTPUT_PORT_REG, &port[i]);
}
ResetDevice();
writeReg(&nf2,ROUTER_OP_LUT_MAC_0_HI_REG,mac0_hi);
writeReg(&nf2,ROUTER_OP_LUT_MAC_1_HI_REG,mac1_hi);
writeReg(&nf2,ROUTER_OP_LUT_MAC_2_HI_REG,mac2_hi);
writeReg(&nf2,ROUTER_OP_LUT_MAC_3_HI_REG,mac3_hi);
writeReg(&nf2,ROUTER_OP_LUT_MAC_0_LO_REG,mac0_lo);
writeReg(&nf2,ROUTER_OP_LUT_MAC_1_LO_REG,mac1_lo);
writeReg(&nf2,ROUTER_OP_LUT_MAC_2_LO_REG,mac2_lo);
writeReg(&nf2,ROUTER_OP_LUT_MAC_3_LO_REG,mac3_lo);
for(i=0; i<32;i++) {
writeReg(&nf2, ROUTER_OP_LUT_DST_IP_FILTER_TABLE_ENTRY_IP_REG, ip_filter[i].s_addr);
writeReg(&nf2, ROUTER_OP_LUT_DST_IP_FILTER_TABLE_WR_ADDR_REG, i);
/* read the four-tuple (ip, gw, mask, iface) from the hw registers */
writeReg(&nf2, ROUTER_OP_LUT_ARP_TABLE_ENTRY_MAC_HI_REG, mac_hi[i]);
writeReg(&nf2, ROUTER_OP_LUT_ARP_TABLE_ENTRY_MAC_LO_REG, mac_lo[i]);
writeReg(&nf2, ROUTER_OP_LUT_ARP_TABLE_ENTRY_NEXT_HOP_IP_REG, gw_arp[i].s_addr);
/* write the row number */
writeReg(&nf2, ROUTER_OP_LUT_ARP_TABLE_WR_ADDR_REG, i);
/* read the four-tuple (ip, gw, mask, iface) from the hw registers */
writeReg(&nf2, ROUTER_OP_LUT_ROUTE_TABLE_ENTRY_IP_REG, ip[i].s_addr);
writeReg(&nf2, ROUTER_OP_LUT_ROUTE_TABLE_ENTRY_MASK_REG, mask[i].s_addr);
writeReg(&nf2, ROUTER_OP_LUT_ROUTE_TABLE_ENTRY_NEXT_HOP_IP_REG, gw[i].s_addr);
writeReg(&nf2, ROUTER_OP_LUT_ROUTE_TABLE_ENTRY_OUTPUT_PORT_REG, port[i]);
/* write the row number */
writeReg(&nf2, ROUTER_OP_LUT_ROUTE_TABLE_WR_ADDR_REG, i);
}
/* wait until the resets have been completed */
usleep(1);
closeDescriptor(&nf2);
return SUCCESS;
}
int
main() {
unsigned val;
int i;
uint32_t queue_addr_offset = OQ_QUEUE_1_ADDR_LO_REG - OQ_QUEUE_0_ADDR_LO_REG;
uint32_t curr_addr = 0;
uint32_t rx_queue_size = (MEM_SIZE - 4*XMIT_QUEUE_SIZE)/8;
uint32_t src_port = 0, dst_port = 0x100;
uint32_t word_len = 0, len = 0x100;
uint32_t queue_base_addr[] = {0,0,0,0};
char *data;
uint32_t data_len, rate_limit_offset;
uint32_t pointer = 0, pkt_pointer = 0;
uint32_t drop;
nf2.device_name = DEFAULT_IFACE;
if (check_iface(&nf2))
exit(1);
if (openDescriptor(&nf2))
exit(1);
// Disable the output queues by writing 0x0 to the enable register
writeReg(&nf2, PKT_GEN_CTRL_ENABLE_REG, 0x00);
//generate the data we want to send
init_data(&det);
innitialize_generator_packet(&state, &det);
// Disable output queues
// Note: 3 queues per port -- rx, tx and tx-during-setup
for (i = 0; i < 3 * NUM_PORTS; i++) {
writeReg (&nf2, (OQ_QUEUE_0_CTRL_REG + i*queue_addr_offset), 0x00);
}
//Set queue sizes thourght the relevant registers
for (i = 0; i<NUM_PORTS; i++) {
//set queue sizes for tx-during-setup
writeReg (&nf2, (OQ_QUEUE_0_ADDR_LO_REG + (i*2)*queue_addr_offset), curr_addr);
writeReg (&nf2, (OQ_QUEUE_0_ADDR_HI_REG + (i*2)*queue_addr_offset), curr_addr + XMIT_QUEUE_SIZE - 1);
writeReg (&nf2, (OQ_QUEUE_0_CTRL_REG + (i*2)*queue_addr_offset), 0x02);
curr_addr += XMIT_QUEUE_SIZE;
//Set queue sizes for RX queues
writeReg (&nf2,OQ_QUEUE_0_ADDR_LO_REG + (i*2+1)*queue_addr_offset, curr_addr);
writeReg (&nf2,OQ_QUEUE_0_ADDR_HI_REG + (i*2+1)*queue_addr_offset, curr_addr+rx_queue_size-1);
writeReg (&nf2,OQ_QUEUE_0_CTRL_REG + (i*2+1)*queue_addr_offset, 0x02);
curr_addr += rx_queue_size;
}
for (i = 0; i < NUM_PORTS; i++) {
//Set queue sizes for TX queues
writeReg (&nf2, OQ_QUEUE_0_ADDR_LO_REG + (i + 2*NUM_PORTS)*queue_addr_offset, curr_addr);
writeReg (&nf2, OQ_QUEUE_0_ADDR_HI_REG + (i + 2*NUM_PORTS)*queue_addr_offset, curr_addr + ((i == 3)?
det.pkt_size + ceil(det.pkt_size/8) + 1:1) - 1);
writeReg (&nf2,OQ_QUEUE_0_CTRL_REG + (i+2*NUM_PORTS)*queue_addr_offset, 0x02);
queue_base_addr[i] = curr_addr;
curr_addr += ((i == 3)? det.pkt_size + ceil(det.pkt_size/8) + 1:1);
//$queue_base_addr[$i] = $curr_addr;
//$curr_addr += $queue_size;
}
//data + netfpga packet length + 1 byte for the ctrl part for each word
data_len = state.data_len + 9 + ceil((float)state.data_len/8);
data = malloc(data_len);
bzero(data, data_len);
pointer = 0;
pkt_pointer = 0;
//append netfpga header
data[pointer] = IO_QUEUE_STAGE_NUM;
pointer++;
*(uint16_t *)(data + pointer ) = 0x0;
pointer+=2;
*(uint16_t *)(data + pointer ) = (uint16_t)ceil((float)state.data_len/8);
pointer+=2;
*(uint16_t *)(data + pointer ) = (uint16_t)(0x100 << 3);
pointer+=2;
*(uint16_t *)(data + pointer ) = (uint16_t)state.data_len;
pointer+=2;
printf("size: %d %d output: %d\n", (uint16_t)ceil((float)state.data_len/8), state.data_len, (uint16_t)(0x100 << 3));
//put data
queue_addr_offset = OQ_QUEUE_GROUP_INST_OFFSET;
for(i = 0; i < floor((float)state.data_len/8); i++) {
data[pointer] = 0x0;
pointer++;
memcpy(data+pointer, state.data + pkt_pointer, 8);
pkt_pointer += 8;
pointer += 8;
}
data[pointer] = state.data_len - pkt_pointer;
pointer++;
memcpy(data+pointer, state.data + pkt_pointer, state.data_len - pkt_pointer);
pointer+= state.data_len - pkt_pointer;
uint32_t sram_addr = SRAM_BASE_ADDR + queue_base_addr[3]*16;
//finally copy data on the SRAM
for (i = 0; i < data_len; i+=3) {
writeReg (&nf2,sram_addr + 0x0, *((uint32_t *)(data + 4*i)));
writeReg (&nf2,sram_addr + 0x4, *((uint32_t *)(data + 4*(i + 1))));
writeReg (&nf2,sram_addr + 0x8, *((uint32_t *)(data + 4*(i + 2))));
int j;
if (4*i < 64) {
for (j = 4*i; (j < 4*i+16); j+=4) {
printf("%02x%02x%02x%02x ", (uint8_t)data[j], (uint8_t)data[j+1], (uint8_t)data[j+2], (uint8_t)data[j+3]);
}
printf("\n");
}
sram_addr += 12;
}
//ff 0000 af00 0008 7805 0000 15
// Set the rate limiter for CPU queues
/* for (i = 0; i < 4; i++) { */
/* rate_limiter_set(i * 2 + 1, 200000); */
/* } */
queue_addr_offset = OQ_QUEUE_GROUP_INST_OFFSET;
// Set the number of iterations for the queues with pcap files
for (i = 0; i < NUM_PORTS; i++) {
// rate_limiter_disable($i * 2);
rate_limit_offset = RATE_LIMIT_1_CTRL_REG - RATE_LIMIT_0_CTRL_REG;
//disable repetition
writeReg(&nf2, OQ_QUEUE_0_CTRL_REG + (i + 2 * NUM_PORTS) * queue_addr_offset, 0x0);
//
writeReg (&nf2, RATE_LIMIT_0_CTRL_REG + 2 * i * rate_limit_offset, 0x0);
// disable rate limit on CPU queues
writeReg (&nf2, RATE_LIMIT_0_CTRL_REG + (2*i + 1) * rate_limit_offset, 0x0);
}
//set queue 3 to repeat once
writeReg(&nf2, OQ_QUEUE_0_CTRL_REG + (3 + 2 * NUM_PORTS) * queue_addr_offset, 0x1);
writeReg(&nf2, OQ_QUEUE_0_MAX_ITER_REG + (3 + 2 * NUM_PORTS) * queue_addr_offset, 1);
//Enable the packet generator hardware to send the packets
drop = 0;
/* for (i = 0; i < NUM_PORTS; i++) { */
/* drop = drop | (1 << i); */
/* drop = drop << 8; */
/* } */
printf("drop 0x%X...\n", drop | 0xF);
//packet_generator_enable (drop | 0xF);
writeReg(&nf2, PKT_GEN_CTRL_ENABLE_REG, drop | 0xF);
sleep(10);
//Finish up
writeReg(&nf2, PKT_GEN_CTRL_ENABLE_REG, 0x0);
for (i = 0; i < 1024; i++) {
// reset_delay();
writeReg(&nf2, DELAY_RESET_REG, 1);
}
//display_xmit_metrics();
printf("Transmit statistics:\n");
printf("====================\n\n");
for (i = 0; i < NUM_PORTS; i++) {
uint32_t pkt_cnt, iter_cnt;
readReg(&nf2, OQ_QUEUE_0_NUM_PKTS_REMOVED_REG + (i + 8) * queue_addr_offset, &pkt_cnt);
readReg(&nf2, OQ_QUEUE_0_CURR_ITER_REG + (i + 8) * queue_addr_offset, &iter_cnt);
printf("%d:\n", i + 8);
printf("\tPackets: %u\n", pkt_cnt);
printf("\tCompleted iterations: %u\n", iter_cnt);
}
printf("\n\n");
//display_capture_metrics();
printf("sending packet completed...");
closeDescriptor(&nf2);
printf("Test successful\n");
}
